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Diffstat (limited to 'hw/xfree86/vgahw/vgaHW.c')
-rw-r--r--hw/xfree86/vgahw/vgaHW.c1385
1 files changed, 691 insertions, 694 deletions
diff --git a/hw/xfree86/vgahw/vgaHW.c b/hw/xfree86/vgahw/vgaHW.c
index 4036a01f5..e044682c7 100644
--- a/hw/xfree86/vgahw/vgaHW.c
+++ b/hw/xfree86/vgahw/vgaHW.c
@@ -75,7 +75,6 @@
#define BLACK_VALUE 0x00
#define OVERSCAN_VALUE 0x01
-
/* Use a private definition of this here */
#undef VGAHWPTR
#define VGAHWPTRLVAL(p) (p)->privates[vgaHWPrivateIndex].ptr
@@ -88,74 +87,73 @@ static int vgaHWPrivateIndex = -1;
#ifdef NEED_SAVED_CMAP
/* This default colourmap is used only when it can't be read from the VGA */
-static CARD8 defaultDAC[768] =
-{
- 0, 0, 0, 0, 0, 42, 0, 42, 0, 0, 42, 42,
- 42, 0, 0, 42, 0, 42, 42, 21, 0, 42, 42, 42,
- 21, 21, 21, 21, 21, 63, 21, 63, 21, 21, 63, 63,
- 63, 21, 21, 63, 21, 63, 63, 63, 21, 63, 63, 63,
- 0, 0, 0, 5, 5, 5, 8, 8, 8, 11, 11, 11,
- 14, 14, 14, 17, 17, 17, 20, 20, 20, 24, 24, 24,
- 28, 28, 28, 32, 32, 32, 36, 36, 36, 40, 40, 40,
- 45, 45, 45, 50, 50, 50, 56, 56, 56, 63, 63, 63,
- 0, 0, 63, 16, 0, 63, 31, 0, 63, 47, 0, 63,
- 63, 0, 63, 63, 0, 47, 63, 0, 31, 63, 0, 16,
- 63, 0, 0, 63, 16, 0, 63, 31, 0, 63, 47, 0,
- 63, 63, 0, 47, 63, 0, 31, 63, 0, 16, 63, 0,
- 0, 63, 0, 0, 63, 16, 0, 63, 31, 0, 63, 47,
- 0, 63, 63, 0, 47, 63, 0, 31, 63, 0, 16, 63,
- 31, 31, 63, 39, 31, 63, 47, 31, 63, 55, 31, 63,
- 63, 31, 63, 63, 31, 55, 63, 31, 47, 63, 31, 39,
- 63, 31, 31, 63, 39, 31, 63, 47, 31, 63, 55, 31,
- 63, 63, 31, 55, 63, 31, 47, 63, 31, 39, 63, 31,
- 31, 63, 31, 31, 63, 39, 31, 63, 47, 31, 63, 55,
- 31, 63, 63, 31, 55, 63, 31, 47, 63, 31, 39, 63,
- 45, 45, 63, 49, 45, 63, 54, 45, 63, 58, 45, 63,
- 63, 45, 63, 63, 45, 58, 63, 45, 54, 63, 45, 49,
- 63, 45, 45, 63, 49, 45, 63, 54, 45, 63, 58, 45,
- 63, 63, 45, 58, 63, 45, 54, 63, 45, 49, 63, 45,
- 45, 63, 45, 45, 63, 49, 45, 63, 54, 45, 63, 58,
- 45, 63, 63, 45, 58, 63, 45, 54, 63, 45, 49, 63,
- 0, 0, 28, 7, 0, 28, 14, 0, 28, 21, 0, 28,
- 28, 0, 28, 28, 0, 21, 28, 0, 14, 28, 0, 7,
- 28, 0, 0, 28, 7, 0, 28, 14, 0, 28, 21, 0,
- 28, 28, 0, 21, 28, 0, 14, 28, 0, 7, 28, 0,
- 0, 28, 0, 0, 28, 7, 0, 28, 14, 0, 28, 21,
- 0, 28, 28, 0, 21, 28, 0, 14, 28, 0, 7, 28,
- 14, 14, 28, 17, 14, 28, 21, 14, 28, 24, 14, 28,
- 28, 14, 28, 28, 14, 24, 28, 14, 21, 28, 14, 17,
- 28, 14, 14, 28, 17, 14, 28, 21, 14, 28, 24, 14,
- 28, 28, 14, 24, 28, 14, 21, 28, 14, 17, 28, 14,
- 14, 28, 14, 14, 28, 17, 14, 28, 21, 14, 28, 24,
- 14, 28, 28, 14, 24, 28, 14, 21, 28, 14, 17, 28,
- 20, 20, 28, 22, 20, 28, 24, 20, 28, 26, 20, 28,
- 28, 20, 28, 28, 20, 26, 28, 20, 24, 28, 20, 22,
- 28, 20, 20, 28, 22, 20, 28, 24, 20, 28, 26, 20,
- 28, 28, 20, 26, 28, 20, 24, 28, 20, 22, 28, 20,
- 20, 28, 20, 20, 28, 22, 20, 28, 24, 20, 28, 26,
- 20, 28, 28, 20, 26, 28, 20, 24, 28, 20, 22, 28,
- 0, 0, 16, 4, 0, 16, 8, 0, 16, 12, 0, 16,
- 16, 0, 16, 16, 0, 12, 16, 0, 8, 16, 0, 4,
- 16, 0, 0, 16, 4, 0, 16, 8, 0, 16, 12, 0,
- 16, 16, 0, 12, 16, 0, 8, 16, 0, 4, 16, 0,
- 0, 16, 0, 0, 16, 4, 0, 16, 8, 0, 16, 12,
- 0, 16, 16, 0, 12, 16, 0, 8, 16, 0, 4, 16,
- 8, 8, 16, 10, 8, 16, 12, 8, 16, 14, 8, 16,
- 16, 8, 16, 16, 8, 14, 16, 8, 12, 16, 8, 10,
- 16, 8, 8, 16, 10, 8, 16, 12, 8, 16, 14, 8,
- 16, 16, 8, 14, 16, 8, 12, 16, 8, 10, 16, 8,
- 8, 16, 8, 8, 16, 10, 8, 16, 12, 8, 16, 14,
- 8, 16, 16, 8, 14, 16, 8, 12, 16, 8, 10, 16,
- 11, 11, 16, 12, 11, 16, 13, 11, 16, 15, 11, 16,
- 16, 11, 16, 16, 11, 15, 16, 11, 13, 16, 11, 12,
- 16, 11, 11, 16, 12, 11, 16, 13, 11, 16, 15, 11,
- 16, 16, 11, 15, 16, 11, 13, 16, 11, 12, 16, 11,
- 11, 16, 11, 11, 16, 12, 11, 16, 13, 11, 16, 15,
- 11, 16, 16, 11, 15, 16, 11, 13, 16, 11, 12, 16,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+static CARD8 defaultDAC[768] = {
+ 0, 0, 0, 0, 0, 42, 0, 42, 0, 0, 42, 42,
+ 42, 0, 0, 42, 0, 42, 42, 21, 0, 42, 42, 42,
+ 21, 21, 21, 21, 21, 63, 21, 63, 21, 21, 63, 63,
+ 63, 21, 21, 63, 21, 63, 63, 63, 21, 63, 63, 63,
+ 0, 0, 0, 5, 5, 5, 8, 8, 8, 11, 11, 11,
+ 14, 14, 14, 17, 17, 17, 20, 20, 20, 24, 24, 24,
+ 28, 28, 28, 32, 32, 32, 36, 36, 36, 40, 40, 40,
+ 45, 45, 45, 50, 50, 50, 56, 56, 56, 63, 63, 63,
+ 0, 0, 63, 16, 0, 63, 31, 0, 63, 47, 0, 63,
+ 63, 0, 63, 63, 0, 47, 63, 0, 31, 63, 0, 16,
+ 63, 0, 0, 63, 16, 0, 63, 31, 0, 63, 47, 0,
+ 63, 63, 0, 47, 63, 0, 31, 63, 0, 16, 63, 0,
+ 0, 63, 0, 0, 63, 16, 0, 63, 31, 0, 63, 47,
+ 0, 63, 63, 0, 47, 63, 0, 31, 63, 0, 16, 63,
+ 31, 31, 63, 39, 31, 63, 47, 31, 63, 55, 31, 63,
+ 63, 31, 63, 63, 31, 55, 63, 31, 47, 63, 31, 39,
+ 63, 31, 31, 63, 39, 31, 63, 47, 31, 63, 55, 31,
+ 63, 63, 31, 55, 63, 31, 47, 63, 31, 39, 63, 31,
+ 31, 63, 31, 31, 63, 39, 31, 63, 47, 31, 63, 55,
+ 31, 63, 63, 31, 55, 63, 31, 47, 63, 31, 39, 63,
+ 45, 45, 63, 49, 45, 63, 54, 45, 63, 58, 45, 63,
+ 63, 45, 63, 63, 45, 58, 63, 45, 54, 63, 45, 49,
+ 63, 45, 45, 63, 49, 45, 63, 54, 45, 63, 58, 45,
+ 63, 63, 45, 58, 63, 45, 54, 63, 45, 49, 63, 45,
+ 45, 63, 45, 45, 63, 49, 45, 63, 54, 45, 63, 58,
+ 45, 63, 63, 45, 58, 63, 45, 54, 63, 45, 49, 63,
+ 0, 0, 28, 7, 0, 28, 14, 0, 28, 21, 0, 28,
+ 28, 0, 28, 28, 0, 21, 28, 0, 14, 28, 0, 7,
+ 28, 0, 0, 28, 7, 0, 28, 14, 0, 28, 21, 0,
+ 28, 28, 0, 21, 28, 0, 14, 28, 0, 7, 28, 0,
+ 0, 28, 0, 0, 28, 7, 0, 28, 14, 0, 28, 21,
+ 0, 28, 28, 0, 21, 28, 0, 14, 28, 0, 7, 28,
+ 14, 14, 28, 17, 14, 28, 21, 14, 28, 24, 14, 28,
+ 28, 14, 28, 28, 14, 24, 28, 14, 21, 28, 14, 17,
+ 28, 14, 14, 28, 17, 14, 28, 21, 14, 28, 24, 14,
+ 28, 28, 14, 24, 28, 14, 21, 28, 14, 17, 28, 14,
+ 14, 28, 14, 14, 28, 17, 14, 28, 21, 14, 28, 24,
+ 14, 28, 28, 14, 24, 28, 14, 21, 28, 14, 17, 28,
+ 20, 20, 28, 22, 20, 28, 24, 20, 28, 26, 20, 28,
+ 28, 20, 28, 28, 20, 26, 28, 20, 24, 28, 20, 22,
+ 28, 20, 20, 28, 22, 20, 28, 24, 20, 28, 26, 20,
+ 28, 28, 20, 26, 28, 20, 24, 28, 20, 22, 28, 20,
+ 20, 28, 20, 20, 28, 22, 20, 28, 24, 20, 28, 26,
+ 20, 28, 28, 20, 26, 28, 20, 24, 28, 20, 22, 28,
+ 0, 0, 16, 4, 0, 16, 8, 0, 16, 12, 0, 16,
+ 16, 0, 16, 16, 0, 12, 16, 0, 8, 16, 0, 4,
+ 16, 0, 0, 16, 4, 0, 16, 8, 0, 16, 12, 0,
+ 16, 16, 0, 12, 16, 0, 8, 16, 0, 4, 16, 0,
+ 0, 16, 0, 0, 16, 4, 0, 16, 8, 0, 16, 12,
+ 0, 16, 16, 0, 12, 16, 0, 8, 16, 0, 4, 16,
+ 8, 8, 16, 10, 8, 16, 12, 8, 16, 14, 8, 16,
+ 16, 8, 16, 16, 8, 14, 16, 8, 12, 16, 8, 10,
+ 16, 8, 8, 16, 10, 8, 16, 12, 8, 16, 14, 8,
+ 16, 16, 8, 14, 16, 8, 12, 16, 8, 10, 16, 8,
+ 8, 16, 8, 8, 16, 10, 8, 16, 12, 8, 16, 14,
+ 8, 16, 16, 8, 14, 16, 8, 12, 16, 8, 10, 16,
+ 11, 11, 16, 12, 11, 16, 13, 11, 16, 15, 11, 16,
+ 16, 11, 16, 16, 11, 15, 16, 11, 13, 16, 11, 12,
+ 16, 11, 11, 16, 12, 11, 16, 13, 11, 16, 15, 11,
+ 16, 16, 11, 15, 16, 11, 13, 16, 11, 12, 16, 11,
+ 11, 16, 11, 11, 16, 12, 11, 16, 13, 11, 16, 15,
+ 11, 16, 16, 11, 15, 16, 11, 13, 16, 11, 12, 16,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
};
-#endif /* NEED_SAVED_CMAP */
+#endif /* NEED_SAVED_CMAP */
/*
* Standard VGA versions of the register access functions.
@@ -223,16 +221,16 @@ stdReadFCR(vgaHWPtr hwp)
static void
stdWriteFCR(vgaHWPtr hwp, CARD8 value)
{
- pci_io_write8(hwp->io, hwp->IOBase + VGA_FEATURE_W_OFFSET,value);
+ pci_io_write8(hwp->io, hwp->IOBase + VGA_FEATURE_W_OFFSET, value);
}
static void
stdWriteAttr(vgaHWPtr hwp, CARD8 index, CARD8 value)
{
if (hwp->paletteEnabled)
- index &= ~0x20;
+ index &= ~0x20;
else
- index |= 0x20;
+ index |= 0x20;
(void) pci_io_read8(hwp->io, hwp->IOBase + VGA_IN_STAT_1_OFFSET);
pci_io_write8(hwp->io, VGA_ATTR_INDEX, index);
@@ -243,9 +241,9 @@ static CARD8
stdReadAttr(vgaHWPtr hwp, CARD8 index)
{
if (hwp->paletteEnabled)
- index &= ~0x20;
+ index &= ~0x20;
else
- index |= 0x20;
+ index |= 0x20;
(void) pci_io_read8(hwp->io, hwp->IOBase + VGA_IN_STAT_1_OFFSET);
pci_io_write8(hwp->io, VGA_ATTR_INDEX, index);
@@ -331,30 +329,30 @@ stdWriteEnable(vgaHWPtr hwp, CARD8 value)
void
vgaHWSetStdFuncs(vgaHWPtr hwp)
{
- hwp->writeCrtc = stdWriteCrtc;
- hwp->readCrtc = stdReadCrtc;
- hwp->writeGr = stdWriteGr;
- hwp->readGr = stdReadGr;
- hwp->readST00 = stdReadST00;
- hwp->readST01 = stdReadST01;
- hwp->readFCR = stdReadFCR;
- hwp->writeFCR = stdWriteFCR;
- hwp->writeAttr = stdWriteAttr;
- hwp->readAttr = stdReadAttr;
- hwp->writeSeq = stdWriteSeq;
- hwp->readSeq = stdReadSeq;
- hwp->writeMiscOut = stdWriteMiscOut;
- hwp->readMiscOut = stdReadMiscOut;
- hwp->enablePalette = stdEnablePalette;
- hwp->disablePalette = stdDisablePalette;
- hwp->writeDacMask = stdWriteDacMask;
- hwp->readDacMask = stdReadDacMask;
- hwp->writeDacWriteAddr = stdWriteDacWriteAddr;
- hwp->writeDacReadAddr = stdWriteDacReadAddr;
- hwp->writeDacData = stdWriteDacData;
- hwp->readDacData = stdReadDacData;
- hwp->readEnable = stdReadEnable;
- hwp->writeEnable = stdWriteEnable;
+ hwp->writeCrtc = stdWriteCrtc;
+ hwp->readCrtc = stdReadCrtc;
+ hwp->writeGr = stdWriteGr;
+ hwp->readGr = stdReadGr;
+ hwp->readST00 = stdReadST00;
+ hwp->readST01 = stdReadST01;
+ hwp->readFCR = stdReadFCR;
+ hwp->writeFCR = stdWriteFCR;
+ hwp->writeAttr = stdWriteAttr;
+ hwp->readAttr = stdReadAttr;
+ hwp->writeSeq = stdWriteSeq;
+ hwp->readSeq = stdReadSeq;
+ hwp->writeMiscOut = stdWriteMiscOut;
+ hwp->readMiscOut = stdReadMiscOut;
+ hwp->enablePalette = stdEnablePalette;
+ hwp->disablePalette = stdDisablePalette;
+ hwp->writeDacMask = stdWriteDacMask;
+ hwp->readDacMask = stdReadDacMask;
+ hwp->writeDacWriteAddr = stdWriteDacWriteAddr;
+ hwp->writeDacReadAddr = stdWriteDacReadAddr;
+ hwp->writeDacData = stdWriteDacData;
+ hwp->readDacData = stdReadDacData;
+ hwp->readEnable = stdReadEnable;
+ hwp->writeEnable = stdWriteEnable;
hwp->io = pci_legacy_open_io(hwp->dev, 0, 64 * 1024);
}
@@ -431,16 +429,16 @@ mmioReadFCR(vgaHWPtr hwp)
static void
mmioWriteFCR(vgaHWPtr hwp, CARD8 value)
{
- moutb(hwp->IOBase + VGA_FEATURE_W_OFFSET,value);
+ moutb(hwp->IOBase + VGA_FEATURE_W_OFFSET, value);
}
static void
mmioWriteAttr(vgaHWPtr hwp, CARD8 index, CARD8 value)
{
if (hwp->paletteEnabled)
- index &= ~0x20;
+ index &= ~0x20;
else
- index |= 0x20;
+ index |= 0x20;
(void) minb(hwp->IOBase + VGA_IN_STAT_1_OFFSET);
moutb(VGA_ATTR_INDEX, index);
@@ -451,9 +449,9 @@ static CARD8
mmioReadAttr(vgaHWPtr hwp, CARD8 index)
{
if (hwp->paletteEnabled)
- index &= ~0x20;
+ index &= ~0x20;
else
- index |= 0x20;
+ index |= 0x20;
(void) minb(hwp->IOBase + VGA_IN_STAT_1_OFFSET);
moutb(VGA_ATTR_INDEX, index);
@@ -539,32 +537,32 @@ mmioWriteEnable(vgaHWPtr hwp, CARD8 value)
void
vgaHWSetMmioFuncs(vgaHWPtr hwp, CARD8 *base, int offset)
{
- hwp->writeCrtc = mmioWriteCrtc;
- hwp->readCrtc = mmioReadCrtc;
- hwp->writeGr = mmioWriteGr;
- hwp->readGr = mmioReadGr;
- hwp->readST00 = mmioReadST00;
- hwp->readST01 = mmioReadST01;
- hwp->readFCR = mmioReadFCR;
- hwp->writeFCR = mmioWriteFCR;
- hwp->writeAttr = mmioWriteAttr;
- hwp->readAttr = mmioReadAttr;
- hwp->writeSeq = mmioWriteSeq;
- hwp->readSeq = mmioReadSeq;
- hwp->writeMiscOut = mmioWriteMiscOut;
- hwp->readMiscOut = mmioReadMiscOut;
- hwp->enablePalette = mmioEnablePalette;
- hwp->disablePalette = mmioDisablePalette;
- hwp->writeDacMask = mmioWriteDacMask;
- hwp->readDacMask = mmioReadDacMask;
- hwp->writeDacWriteAddr = mmioWriteDacWriteAddr;
- hwp->writeDacReadAddr = mmioWriteDacReadAddr;
- hwp->writeDacData = mmioWriteDacData;
- hwp->readDacData = mmioReadDacData;
- hwp->MMIOBase = base;
- hwp->MMIOOffset = offset;
- hwp->readEnable = mmioReadEnable;
- hwp->writeEnable = mmioWriteEnable;
+ hwp->writeCrtc = mmioWriteCrtc;
+ hwp->readCrtc = mmioReadCrtc;
+ hwp->writeGr = mmioWriteGr;
+ hwp->readGr = mmioReadGr;
+ hwp->readST00 = mmioReadST00;
+ hwp->readST01 = mmioReadST01;
+ hwp->readFCR = mmioReadFCR;
+ hwp->writeFCR = mmioWriteFCR;
+ hwp->writeAttr = mmioWriteAttr;
+ hwp->readAttr = mmioReadAttr;
+ hwp->writeSeq = mmioWriteSeq;
+ hwp->readSeq = mmioReadSeq;
+ hwp->writeMiscOut = mmioWriteMiscOut;
+ hwp->readMiscOut = mmioReadMiscOut;
+ hwp->enablePalette = mmioEnablePalette;
+ hwp->disablePalette = mmioDisablePalette;
+ hwp->writeDacMask = mmioWriteDacMask;
+ hwp->readDacMask = mmioReadDacMask;
+ hwp->writeDacWriteAddr = mmioWriteDacWriteAddr;
+ hwp->writeDacReadAddr = mmioWriteDacReadAddr;
+ hwp->writeDacData = mmioWriteDacData;
+ hwp->readDacData = mmioReadDacData;
+ hwp->MMIOBase = base;
+ hwp->MMIOOffset = offset;
+ hwp->readEnable = mmioReadEnable;
+ hwp->writeEnable = mmioWriteEnable;
}
/*
@@ -575,38 +573,41 @@ vgaHWSetMmioFuncs(vgaHWPtr hwp, CARD8 *base, int offset)
void
vgaHWProtect(ScrnInfoPtr pScrn, Bool on)
{
- vgaHWPtr hwp = VGAHWPTR(pScrn);
-
- unsigned char tmp;
-
- if (pScrn->vtSema) {
- if (on) {
- /*
- * Turn off screen and disable sequencer.
- */
- tmp = hwp->readSeq(hwp, 0x01);
-
- vgaHWSeqReset(hwp, TRUE); /* start synchronous reset */
- hwp->writeSeq(hwp, 0x01, tmp | 0x20); /* disable the display */
-
- hwp->enablePalette(hwp);
- } else {
- /*
- * Reenable sequencer, then turn on screen.
- */
-
- tmp = hwp->readSeq(hwp, 0x01);
-
- hwp->writeSeq(hwp, 0x01, tmp & ~0x20); /* reenable display */
- vgaHWSeqReset(hwp, FALSE); /* clear synchronousreset */
-
- hwp->disablePalette(hwp);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ unsigned char tmp;
+
+ if (pScrn->vtSema) {
+ if (on) {
+ /*
+ * Turn off screen and disable sequencer.
+ */
+ tmp = hwp->readSeq(hwp, 0x01);
+
+ vgaHWSeqReset(hwp, TRUE); /* start synchronous reset */
+ hwp->writeSeq(hwp, 0x01, tmp | 0x20); /* disable the display */
+
+ hwp->enablePalette(hwp);
+ }
+ else {
+ /*
+ * Reenable sequencer, then turn on screen.
+ */
+
+ tmp = hwp->readSeq(hwp, 0x01);
+
+ hwp->writeSeq(hwp, 0x01, tmp & ~0x20); /* reenable display */
+ vgaHWSeqReset(hwp, FALSE); /* clear synchronousreset */
+
+ hwp->disablePalette(hwp);
+ }
}
- }
}
-vgaHWProtectProc *vgaHWProtectWeak(void) {
- return vgaHWProtect;
+vgaHWProtectProc *
+vgaHWProtectWeak(void)
+{
+ return vgaHWProtect;
}
/*
@@ -616,25 +617,28 @@ vgaHWProtectProc *vgaHWProtectWeak(void) {
void
vgaHWBlankScreen(ScrnInfoPtr pScrn, Bool on)
{
- vgaHWPtr hwp = VGAHWPTR(pScrn);
- unsigned char scrn;
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ unsigned char scrn;
- scrn = hwp->readSeq(hwp, 0x01);
+ scrn = hwp->readSeq(hwp, 0x01);
- if (on) {
- scrn &= ~0x20; /* enable screen */
- } else {
- scrn |= 0x20; /* blank screen */
- }
+ if (on) {
+ scrn &= ~0x20; /* enable screen */
+ }
+ else {
+ scrn |= 0x20; /* blank screen */
+ }
- vgaHWSeqReset(hwp, TRUE);
- hwp->writeSeq(hwp, 0x01, scrn); /* change mode */
- vgaHWSeqReset(hwp, FALSE);
+ vgaHWSeqReset(hwp, TRUE);
+ hwp->writeSeq(hwp, 0x01, scrn); /* change mode */
+ vgaHWSeqReset(hwp, FALSE);
}
-vgaHWBlankScreenProc *vgaHWBlankScreenWeak(void) {
- return vgaHWBlankScreen;
-}
+vgaHWBlankScreenProc *
+vgaHWBlankScreenWeak(void)
+{
+ return vgaHWBlankScreen;
+}
/*
* vgaHWSaveScreen -- blank the screen.
@@ -643,26 +647,25 @@ vgaHWBlankScreenProc *vgaHWBlankScreenWeak(void) {
Bool
vgaHWSaveScreen(ScreenPtr pScreen, int mode)
{
- ScrnInfoPtr pScrn = NULL;
- Bool on;
+ ScrnInfoPtr pScrn = NULL;
+ Bool on;
- if (pScreen != NULL)
- pScrn = xf86Screens[pScreen->myNum];
+ if (pScreen != NULL)
+ pScrn = xf86Screens[pScreen->myNum];
- on = xf86IsUnblank(mode);
+ on = xf86IsUnblank(mode);
#if 0
- if (on)
- SetTimeSinceLastInputEvent();
+ if (on)
+ SetTimeSinceLastInputEvent();
#endif
- if ((pScrn != NULL) && pScrn->vtSema) {
- vgaHWBlankScreen(pScrn, on);
- }
- return TRUE;
+ if ((pScrn != NULL) && pScrn->vtSema) {
+ vgaHWBlankScreen(pScrn, on);
+ }
+ return TRUE;
}
-
/*
* vgaHWDPMSSet -- Sets VESA Display Power Management Signaling (DPMS) Mode
*
@@ -674,42 +677,42 @@ vgaHWSaveScreen(ScreenPtr pScreen, int mode)
void
vgaHWDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
{
- unsigned char seq1 = 0, crtc17 = 0;
- vgaHWPtr hwp = VGAHWPTR(pScrn);
-
- if (!pScrn->vtSema) return;
-
- switch (PowerManagementMode) {
- case DPMSModeOn:
- /* Screen: On; HSync: On, VSync: On */
- seq1 = 0x00;
- crtc17 = 0x80;
- break;
- case DPMSModeStandby:
- /* Screen: Off; HSync: Off, VSync: On -- Not Supported */
- seq1 = 0x20;
- crtc17 = 0x80;
- break;
- case DPMSModeSuspend:
- /* Screen: Off; HSync: On, VSync: Off -- Not Supported */
- seq1 = 0x20;
- crtc17 = 0x80;
- break;
- case DPMSModeOff:
- /* Screen: Off; HSync: Off, VSync: Off */
- seq1 = 0x20;
- crtc17 = 0x00;
- break;
- }
- hwp->writeSeq(hwp, 0x00, 0x01); /* Synchronous Reset */
- seq1 |= hwp->readSeq(hwp, 0x01) & ~0x20;
- hwp->writeSeq(hwp, 0x01, seq1);
- crtc17 |= hwp->readCrtc(hwp, 0x17) & ~0x80;
- usleep(10000);
- hwp->writeCrtc(hwp, 0x17, crtc17);
- hwp->writeSeq(hwp, 0x00, 0x03); /* End Reset */
-}
+ unsigned char seq1 = 0, crtc17 = 0;
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ if (!pScrn->vtSema)
+ return;
+
+ switch (PowerManagementMode) {
+ case DPMSModeOn:
+ /* Screen: On; HSync: On, VSync: On */
+ seq1 = 0x00;
+ crtc17 = 0x80;
+ break;
+ case DPMSModeStandby:
+ /* Screen: Off; HSync: Off, VSync: On -- Not Supported */
+ seq1 = 0x20;
+ crtc17 = 0x80;
+ break;
+ case DPMSModeSuspend:
+ /* Screen: Off; HSync: On, VSync: Off -- Not Supported */
+ seq1 = 0x20;
+ crtc17 = 0x80;
+ break;
+ case DPMSModeOff:
+ /* Screen: Off; HSync: Off, VSync: Off */
+ seq1 = 0x20;
+ crtc17 = 0x00;
+ break;
+ }
+ hwp->writeSeq(hwp, 0x00, 0x01); /* Synchronous Reset */
+ seq1 |= hwp->readSeq(hwp, 0x01) & ~0x20;
+ hwp->writeSeq(hwp, 0x01, seq1);
+ crtc17 |= hwp->readCrtc(hwp, 0x17) & ~0x80;
+ usleep(10000);
+ hwp->writeCrtc(hwp, 0x17, crtc17);
+ hwp->writeSeq(hwp, 0x00, 0x03); /* End Reset */
+}
/*
* vgaHWSeqReset
@@ -719,13 +722,12 @@ vgaHWDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
void
vgaHWSeqReset(vgaHWPtr hwp, Bool start)
{
- if (start)
- hwp->writeSeq(hwp, 0x00, 0x01); /* Synchronous Reset */
- else
- hwp->writeSeq(hwp, 0x00, 0x03); /* End Reset */
+ if (start)
+ hwp->writeSeq(hwp, 0x00, 0x01); /* Synchronous Reset */
+ else
+ hwp->writeSeq(hwp, 0x00, 0x03); /* End Reset */
}
-
void
vgaHWRestoreFonts(ScrnInfoPtr scrninfp, vgaRegPtr restore)
{
@@ -737,15 +739,15 @@ vgaHWRestoreFonts(ScrnInfoPtr scrninfp, vgaRegPtr restore)
/* If nothing to do, return now */
if (!hwp->FontInfo1 && !hwp->FontInfo2 && !hwp->TextInfo)
- return;
+ return;
if (hwp->Base == NULL) {
- doMap = TRUE;
- if (!vgaHWMapMem(scrninfp)) {
- xf86DrvMsg(scrninfp->scrnIndex, X_ERROR,
- "vgaHWRestoreFonts: vgaHWMapMem() failed\n");
- return;
- }
+ doMap = TRUE;
+ if (!vgaHWMapMem(scrninfp)) {
+ xf86DrvMsg(scrninfp->scrnIndex, X_ERROR,
+ "vgaHWRestoreFonts: vgaHWMapMem() failed\n");
+ return;
+ }
}
/* save the registers that are needed here */
@@ -776,45 +778,45 @@ vgaHWRestoreFonts(ScrnInfoPtr scrninfp, vgaRegPtr restore)
* BUG ALERT: The (S)VGA's segment-select register MUST be set correctly!
*/
#if 0
- hwp->writeAttr(hwp, 0x10, 0x01); /* graphics mode */
+ hwp->writeAttr(hwp, 0x10, 0x01); /* graphics mode */
#endif
- hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
- hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */
- hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */
+ hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
+ hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */
+ hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */
if (scrninfp->depth == 4) {
- /* GJA */
- hwp->writeGr(hwp, 0x03, 0x00); /* don't rotate, write unmodified */
- hwp->writeGr(hwp, 0x08, 0xFF); /* write all bits in a byte */
- hwp->writeGr(hwp, 0x01, 0x00); /* all planes come from CPU */
+ /* GJA */
+ hwp->writeGr(hwp, 0x03, 0x00); /* don't rotate, write unmodified */
+ hwp->writeGr(hwp, 0x08, 0xFF); /* write all bits in a byte */
+ hwp->writeGr(hwp, 0x01, 0x00); /* all planes come from CPU */
}
#if SAVE_FONT1
if (hwp->FontInfo1) {
- hwp->writeSeq(hwp, 0x02, 0x04); /* write to plane 2 */
- hwp->writeGr(hwp, 0x04, 0x02); /* read plane 2 */
- slowbcopy_tobus(hwp->FontInfo1, hwp->Base, FONT_AMOUNT);
+ hwp->writeSeq(hwp, 0x02, 0x04); /* write to plane 2 */
+ hwp->writeGr(hwp, 0x04, 0x02); /* read plane 2 */
+ slowbcopy_tobus(hwp->FontInfo1, hwp->Base, FONT_AMOUNT);
}
#endif
#if SAVE_FONT2
if (hwp->FontInfo2) {
- hwp->writeSeq(hwp, 0x02, 0x08); /* write to plane 3 */
- hwp->writeGr(hwp, 0x04, 0x03); /* read plane 3 */
- slowbcopy_tobus(hwp->FontInfo2, hwp->Base, FONT_AMOUNT);
+ hwp->writeSeq(hwp, 0x02, 0x08); /* write to plane 3 */
+ hwp->writeGr(hwp, 0x04, 0x03); /* read plane 3 */
+ slowbcopy_tobus(hwp->FontInfo2, hwp->Base, FONT_AMOUNT);
}
#endif
#if SAVE_TEXT
if (hwp->TextInfo) {
- hwp->writeSeq(hwp, 0x02, 0x01); /* write to plane 0 */
- hwp->writeGr(hwp, 0x04, 0x00); /* read plane 0 */
- slowbcopy_tobus(hwp->TextInfo, hwp->Base, TEXT_AMOUNT);
- hwp->writeSeq(hwp, 0x02, 0x02); /* write to plane 1 */
- hwp->writeGr(hwp, 0x04, 0x01); /* read plane 1 */
- slowbcopy_tobus((unsigned char *)hwp->TextInfo + TEXT_AMOUNT,
- hwp->Base, TEXT_AMOUNT);
+ hwp->writeSeq(hwp, 0x02, 0x01); /* write to plane 0 */
+ hwp->writeGr(hwp, 0x04, 0x00); /* read plane 0 */
+ slowbcopy_tobus(hwp->TextInfo, hwp->Base, TEXT_AMOUNT);
+ hwp->writeSeq(hwp, 0x02, 0x02); /* write to plane 1 */
+ hwp->writeGr(hwp, 0x04, 0x01); /* read plane 1 */
+ slowbcopy_tobus((unsigned char *) hwp->TextInfo + TEXT_AMOUNT,
+ hwp->Base, TEXT_AMOUNT);
}
#endif
@@ -834,12 +836,11 @@ vgaHWRestoreFonts(ScrnInfoPtr scrninfp, vgaRegPtr restore)
hwp->IOBase = savedIOBase;
if (doMap)
- vgaHWUnmapMem(scrninfp);
+ vgaHWUnmapMem(scrninfp);
-#endif /* SAVE_TEXT || SAVE_FONT1 || SAVE_FONT2 */
+#endif /* SAVE_TEXT || SAVE_FONT1 || SAVE_FONT2 */
}
-
void
vgaHWRestoreMode(ScrnInfoPtr scrninfp, vgaRegPtr restore)
{
@@ -847,31 +848,30 @@ vgaHWRestoreMode(ScrnInfoPtr scrninfp, vgaRegPtr restore)
int i;
if (restore->MiscOutReg & 0x01)
- hwp->IOBase = VGA_IOBASE_COLOR;
+ hwp->IOBase = VGA_IOBASE_COLOR;
else
- hwp->IOBase = VGA_IOBASE_MONO;
+ hwp->IOBase = VGA_IOBASE_MONO;
hwp->writeMiscOut(hwp, restore->MiscOutReg);
for (i = 1; i < restore->numSequencer; i++)
- hwp->writeSeq(hwp, i, restore->Sequencer[i]);
-
+ hwp->writeSeq(hwp, i, restore->Sequencer[i]);
+
/* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 of CRTC[17] */
hwp->writeCrtc(hwp, 17, restore->CRTC[17] & ~0x80);
for (i = 0; i < restore->numCRTC; i++)
- hwp->writeCrtc(hwp, i, restore->CRTC[i]);
+ hwp->writeCrtc(hwp, i, restore->CRTC[i]);
for (i = 0; i < restore->numGraphics; i++)
- hwp->writeGr(hwp, i, restore->Graphics[i]);
+ hwp->writeGr(hwp, i, restore->Graphics[i]);
hwp->enablePalette(hwp);
for (i = 0; i < restore->numAttribute; i++)
- hwp->writeAttr(hwp, i, restore->Attribute[i]);
+ hwp->writeAttr(hwp, i, restore->Attribute[i]);
hwp->disablePalette(hwp);
}
-
void
vgaHWRestoreColormap(ScrnInfoPtr scrninfp, vgaRegPtr restore)
{
@@ -885,14 +885,13 @@ vgaHWRestoreColormap(ScrnInfoPtr scrninfp, vgaRegPtr restore)
hwp->writeDacMask(hwp, 0xFF);
hwp->writeDacWriteAddr(hwp, 0x00);
for (i = 0; i < 768; i++) {
- hwp->writeDacData(hwp, restore->DAC[i]);
- DACDelay(hwp);
+ hwp->writeDacData(hwp, restore->DAC[i]);
+ DACDelay(hwp);
}
hwp->disablePalette(hwp);
}
-
/*
* vgaHWRestore --
* restore the VGA state
@@ -902,13 +901,13 @@ void
vgaHWRestore(ScrnInfoPtr scrninfp, vgaRegPtr restore, int flags)
{
if (flags & VGA_SR_MODE)
- vgaHWRestoreMode(scrninfp, restore);
+ vgaHWRestoreMode(scrninfp, restore);
if (flags & VGA_SR_FONTS)
- vgaHWRestoreFonts(scrninfp, restore);
+ vgaHWRestoreFonts(scrninfp, restore);
if (flags & VGA_SR_CMAP)
- vgaHWRestoreColormap(scrninfp, restore);
+ vgaHWRestoreColormap(scrninfp, restore);
}
void
@@ -921,18 +920,18 @@ vgaHWSaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save)
Bool doMap = FALSE;
if (hwp->Base == NULL) {
- doMap = TRUE;
- if (!vgaHWMapMem(scrninfp)) {
- xf86DrvMsg(scrninfp->scrnIndex, X_ERROR,
- "vgaHWSaveFonts: vgaHWMapMem() failed\n");
- return;
- }
+ doMap = TRUE;
+ if (!vgaHWMapMem(scrninfp)) {
+ xf86DrvMsg(scrninfp->scrnIndex, X_ERROR,
+ "vgaHWSaveFonts: vgaHWMapMem() failed\n");
+ return;
+ }
}
/* If in graphics mode, don't save anything */
attr10 = hwp->readAttr(hwp, 0x10);
if (attr10 & 0x01)
- return;
+ return;
/* save the registers that are needed here */
miscOut = hwp->readMiscOut(hwp);
@@ -950,7 +949,7 @@ vgaHWSaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save)
hwp->writeMiscOut(hwp, miscOut | 0x01);
vgaHWBlankScreen(scrninfp, FALSE);
-
+
/*
* get the character sets, and text screen if required
*/
@@ -961,38 +960,39 @@ vgaHWSaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save)
* BUG ALERT: The (S)VGA's segment-select register MUST be set correctly!
*/
#if 0
- hwp->writeAttr(hwp, 0x10, 0x01); /* graphics mode */
+ hwp->writeAttr(hwp, 0x10, 0x01); /* graphics mode */
#endif
- hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
- hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */
- hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */
+ hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
+ hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */
+ hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */
#if SAVE_FONT1
if (hwp->FontInfo1 || (hwp->FontInfo1 = malloc(FONT_AMOUNT))) {
- hwp->writeSeq(hwp, 0x02, 0x04); /* write to plane 2 */
- hwp->writeGr(hwp, 0x04, 0x02); /* read plane 2 */
- slowbcopy_frombus(hwp->Base, hwp->FontInfo1, FONT_AMOUNT);
+ hwp->writeSeq(hwp, 0x02, 0x04); /* write to plane 2 */
+ hwp->writeGr(hwp, 0x04, 0x02); /* read plane 2 */
+ slowbcopy_frombus(hwp->Base, hwp->FontInfo1, FONT_AMOUNT);
}
-#endif /* SAVE_FONT1 */
+#endif /* SAVE_FONT1 */
#if SAVE_FONT2
if (hwp->FontInfo2 || (hwp->FontInfo2 = malloc(FONT_AMOUNT))) {
- hwp->writeSeq(hwp, 0x02, 0x08); /* write to plane 3 */
- hwp->writeGr(hwp, 0x04, 0x03); /* read plane 3 */
- slowbcopy_frombus(hwp->Base, hwp->FontInfo2, FONT_AMOUNT);
+ hwp->writeSeq(hwp, 0x02, 0x08); /* write to plane 3 */
+ hwp->writeGr(hwp, 0x04, 0x03); /* read plane 3 */
+ slowbcopy_frombus(hwp->Base, hwp->FontInfo2, FONT_AMOUNT);
}
-#endif /* SAVE_FONT2 */
+#endif /* SAVE_FONT2 */
#if SAVE_TEXT
if (hwp->TextInfo || (hwp->TextInfo = malloc(2 * TEXT_AMOUNT))) {
- hwp->writeSeq(hwp, 0x02, 0x01); /* write to plane 0 */
- hwp->writeGr(hwp, 0x04, 0x00); /* read plane 0 */
- slowbcopy_frombus(hwp->Base, hwp->TextInfo, TEXT_AMOUNT);
- hwp->writeSeq(hwp, 0x02, 0x02); /* write to plane 1 */
- hwp->writeGr(hwp, 0x04, 0x01); /* read plane 1 */
- slowbcopy_frombus(hwp->Base,
- (unsigned char *)hwp->TextInfo + TEXT_AMOUNT, TEXT_AMOUNT);
+ hwp->writeSeq(hwp, 0x02, 0x01); /* write to plane 0 */
+ hwp->writeGr(hwp, 0x04, 0x00); /* read plane 0 */
+ slowbcopy_frombus(hwp->Base, hwp->TextInfo, TEXT_AMOUNT);
+ hwp->writeSeq(hwp, 0x02, 0x02); /* write to plane 1 */
+ hwp->writeGr(hwp, 0x04, 0x01); /* read plane 1 */
+ slowbcopy_frombus(hwp->Base,
+ (unsigned char *) hwp->TextInfo + TEXT_AMOUNT,
+ TEXT_AMOUNT);
}
-#endif /* SAVE_TEXT */
+#endif /* SAVE_TEXT */
/* Restore clobbered registers */
hwp->writeAttr(hwp, 0x10, attr10);
@@ -1007,9 +1007,9 @@ vgaHWSaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save)
vgaHWBlankScreen(scrninfp, TRUE);
if (doMap)
- vgaHWUnmapMem(scrninfp);
+ vgaHWUnmapMem(scrninfp);
-#endif /* SAVE_TEXT || SAVE_FONT1 || SAVE_FONT2 */
+#endif /* SAVE_TEXT || SAVE_FONT1 || SAVE_FONT2 */
}
void
@@ -1020,34 +1020,33 @@ vgaHWSaveMode(ScrnInfoPtr scrninfp, vgaRegPtr save)
save->MiscOutReg = hwp->readMiscOut(hwp);
if (save->MiscOutReg & 0x01)
- hwp->IOBase = VGA_IOBASE_COLOR;
+ hwp->IOBase = VGA_IOBASE_COLOR;
else
- hwp->IOBase = VGA_IOBASE_MONO;
+ hwp->IOBase = VGA_IOBASE_MONO;
for (i = 0; i < save->numCRTC; i++) {
- save->CRTC[i] = hwp->readCrtc(hwp, i);
- DebugF("CRTC[0x%02x] = 0x%02x\n", i, save->CRTC[i]);
+ save->CRTC[i] = hwp->readCrtc(hwp, i);
+ DebugF("CRTC[0x%02x] = 0x%02x\n", i, save->CRTC[i]);
}
hwp->enablePalette(hwp);
for (i = 0; i < save->numAttribute; i++) {
- save->Attribute[i] = hwp->readAttr(hwp, i);
- DebugF("Attribute[0x%02x] = 0x%02x\n", i, save->Attribute[i]);
+ save->Attribute[i] = hwp->readAttr(hwp, i);
+ DebugF("Attribute[0x%02x] = 0x%02x\n", i, save->Attribute[i]);
}
hwp->disablePalette(hwp);
for (i = 0; i < save->numGraphics; i++) {
- save->Graphics[i] = hwp->readGr(hwp, i);
- DebugF("Graphics[0x%02x] = 0x%02x\n", i, save->Graphics[i]);
+ save->Graphics[i] = hwp->readGr(hwp, i);
+ DebugF("Graphics[0x%02x] = 0x%02x\n", i, save->Graphics[i]);
}
for (i = 1; i < save->numSequencer; i++) {
- save->Sequencer[i] = hwp->readSeq(hwp, i);
- DebugF("Sequencer[0x%02x] = 0x%02x\n", i, save->Sequencer[i]);
+ save->Sequencer[i] = hwp->readSeq(hwp, i);
+ DebugF("Sequencer[0x%02x] = 0x%02x\n", i, save->Sequencer[i]);
}
}
-
void
vgaHWSaveColormap(ScrnInfoPtr scrninfp, vgaRegPtr save)
{
@@ -1067,7 +1066,7 @@ vgaHWSaveColormap(ScrnInfoPtr scrninfp, vgaRegPtr save)
/* Only save it once */
if (hwp->cmapSaved)
- return;
+ return;
#if 0
hwp->enablePalette(hwp);
@@ -1080,17 +1079,17 @@ vgaHWSaveColormap(ScrnInfoPtr scrninfp, vgaRegPtr save)
*/
hwp->writeDacReadAddr(hwp, 0x00);
for (i = 0; i < 6; i++) {
- save->DAC[i] = hwp->readDacData(hwp);
- switch (i % 3) {
- case 0:
- DebugF("DAC[0x%02x] = 0x%02x, ", i / 3, save->DAC[i]);
- break;
- case 1:
- DebugF("0x%02x, ", save->DAC[i]);
- break;
- case 2:
- DebugF("0x%02x\n", save->DAC[i]);
- }
+ save->DAC[i] = hwp->readDacData(hwp);
+ switch (i % 3) {
+ case 0:
+ DebugF("DAC[0x%02x] = 0x%02x, ", i / 3, save->DAC[i]);
+ break;
+ case 1:
+ DebugF("0x%02x, ", save->DAC[i]);
+ break;
+ case 2:
+ DebugF("0x%02x\n", save->DAC[i]);
+ }
}
/*
@@ -1099,40 +1098,41 @@ vgaHWSaveColormap(ScrnInfoPtr scrninfp, vgaRegPtr save)
*/
hwp->writeDacWriteAddr(hwp, 0x01);
for (i = 3; i < 6; i++)
- hwp->writeDacData(hwp, ~save->DAC[i] & DAC_TEST_MASK);
+ hwp->writeDacData(hwp, ~save->DAC[i] & DAC_TEST_MASK);
hwp->writeDacReadAddr(hwp, 0x01);
for (i = 3; i < 6; i++) {
- if (hwp->readDacData(hwp) != (~save->DAC[i] & DAC_TEST_MASK))
- readError = TRUE;
+ if (hwp->readDacData(hwp) != (~save->DAC[i] & DAC_TEST_MASK))
+ readError = TRUE;
}
hwp->writeDacWriteAddr(hwp, 0x01);
for (i = 3; i < 6; i++)
- hwp->writeDacData(hwp, save->DAC[i]);
+ hwp->writeDacData(hwp, save->DAC[i]);
if (readError) {
- /*
- * save the default lookup table
- */
- memmove(save->DAC, defaultDAC, 768);
- xf86DrvMsg(scrninfp->scrnIndex, X_WARNING,
- "Cannot read colourmap from VGA. Will restore with default\n");
- } else {
- /* save the colourmap */
- hwp->writeDacReadAddr(hwp, 0x02);
- for (i = 6; i < 768; i++) {
- save->DAC[i] = hwp->readDacData(hwp);
- DACDelay(hwp);
- switch (i % 3) {
- case 0:
- DebugF("DAC[0x%02x] = 0x%02x, ", i / 3, save->DAC[i]);
- break;
- case 1:
- DebugF("0x%02x, ", save->DAC[i]);
- break;
- case 2:
- DebugF("0x%02x\n", save->DAC[i]);
- }
- }
+ /*
+ * save the default lookup table
+ */
+ memmove(save->DAC, defaultDAC, 768);
+ xf86DrvMsg(scrninfp->scrnIndex, X_WARNING,
+ "Cannot read colourmap from VGA. Will restore with default\n");
+ }
+ else {
+ /* save the colourmap */
+ hwp->writeDacReadAddr(hwp, 0x02);
+ for (i = 6; i < 768; i++) {
+ save->DAC[i] = hwp->readDacData(hwp);
+ DACDelay(hwp);
+ switch (i % 3) {
+ case 0:
+ DebugF("DAC[0x%02x] = 0x%02x, ", i / 3, save->DAC[i]);
+ break;
+ case 1:
+ DebugF("0x%02x, ", save->DAC[i]);
+ break;
+ case 2:
+ DebugF("0x%02x\n", save->DAC[i]);
+ }
+ }
}
hwp->disablePalette(hwp);
@@ -1149,19 +1149,18 @@ void
vgaHWSave(ScrnInfoPtr scrninfp, vgaRegPtr save, int flags)
{
if (save == NULL)
- return;
+ return;
- if (flags & VGA_SR_CMAP)
- vgaHWSaveColormap(scrninfp, save);
+ if (flags & VGA_SR_CMAP)
+ vgaHWSaveColormap(scrninfp, save);
- if (flags & VGA_SR_MODE)
- vgaHWSaveMode(scrninfp, save);
+ if (flags & VGA_SR_MODE)
+ vgaHWSaveMode(scrninfp, save);
- if (flags & VGA_SR_FONTS)
- vgaHWSaveFonts(scrninfp, save);
+ if (flags & VGA_SR_FONTS)
+ vgaHWSaveFonts(scrninfp, save);
}
-
/*
* vgaHWInit --
* Handle the initialization, etc. of a screen.
@@ -1171,7 +1170,7 @@ vgaHWSave(ScrnInfoPtr scrninfp, vgaRegPtr save, int flags)
Bool
vgaHWInit(ScrnInfoPtr scrninfp, DisplayModePtr mode)
{
- unsigned int i;
+ unsigned int i;
vgaHWPtr hwp;
vgaRegPtr regp;
int depth = scrninfp->depth;
@@ -1180,37 +1179,38 @@ vgaHWInit(ScrnInfoPtr scrninfp, DisplayModePtr mode)
* make sure the vgaHWRec is allocated
*/
if (!vgaHWGetHWRec(scrninfp))
- return FALSE;
+ return FALSE;
hwp = VGAHWPTR(scrninfp);
regp = &hwp->ModeReg;
-
+
/*
* compute correct Hsync & Vsync polarity
*/
if ((mode->Flags & (V_PHSYNC | V_NHSYNC))
- && (mode->Flags & (V_PVSYNC | V_NVSYNC)))
- {
+ && (mode->Flags & (V_PVSYNC | V_NVSYNC))) {
regp->MiscOutReg = 0x23;
- if (mode->Flags & V_NHSYNC) regp->MiscOutReg |= 0x40;
- if (mode->Flags & V_NVSYNC) regp->MiscOutReg |= 0x80;
+ if (mode->Flags & V_NHSYNC)
+ regp->MiscOutReg |= 0x40;
+ if (mode->Flags & V_NVSYNC)
+ regp->MiscOutReg |= 0x80;
}
- else
- {
+ else {
int VDisplay = mode->VDisplay;
+
if (mode->Flags & V_DBLSCAN)
VDisplay *= 2;
if (mode->VScan > 1)
VDisplay *= mode->VScan;
- if (VDisplay < 400)
- regp->MiscOutReg = 0xA3; /* +hsync -vsync */
+ if (VDisplay < 400)
+ regp->MiscOutReg = 0xA3; /* +hsync -vsync */
else if (VDisplay < 480)
- regp->MiscOutReg = 0x63; /* -hsync +vsync */
+ regp->MiscOutReg = 0x63; /* -hsync +vsync */
else if (VDisplay < 768)
- regp->MiscOutReg = 0xE3; /* -hsync -vsync */
+ regp->MiscOutReg = 0xE3; /* -hsync -vsync */
else
- regp->MiscOutReg = 0x23; /* +hsync +vsync */
+ regp->MiscOutReg = 0x23; /* +hsync +vsync */
}
-
+
regp->MiscOutReg |= (mode->ClockIndex & 0x03) << 2;
/*
@@ -1220,7 +1220,7 @@ vgaHWInit(ScrnInfoPtr scrninfp, DisplayModePtr mode)
regp->Sequencer[0] = 0x02;
else
regp->Sequencer[0] = 0x00;
- if (mode->Flags & V_CLKDIV2)
+ if (mode->Flags & V_CLKDIV2)
regp->Sequencer[1] = 0x09;
else
regp->Sequencer[1] = 0x01;
@@ -1228,42 +1228,41 @@ vgaHWInit(ScrnInfoPtr scrninfp, DisplayModePtr mode)
regp->Sequencer[2] = 1 << BIT_PLANE;
else
regp->Sequencer[2] = 0x0F;
- regp->Sequencer[3] = 0x00; /* Font select */
+ regp->Sequencer[3] = 0x00; /* Font select */
if (depth < 8)
- regp->Sequencer[4] = 0x06; /* Misc */
+ regp->Sequencer[4] = 0x06; /* Misc */
else
- regp->Sequencer[4] = 0x0E; /* Misc */
+ regp->Sequencer[4] = 0x0E; /* Misc */
/*
* CRTC Controller
*/
- regp->CRTC[0] = (mode->CrtcHTotal >> 3) - 5;
- regp->CRTC[1] = (mode->CrtcHDisplay >> 3) - 1;
- regp->CRTC[2] = (mode->CrtcHBlankStart >> 3) - 1;
- regp->CRTC[3] = (((mode->CrtcHBlankEnd >> 3) - 1) & 0x1F) | 0x80;
+ regp->CRTC[0] = (mode->CrtcHTotal >> 3) - 5;
+ regp->CRTC[1] = (mode->CrtcHDisplay >> 3) - 1;
+ regp->CRTC[2] = (mode->CrtcHBlankStart >> 3) - 1;
+ regp->CRTC[3] = (((mode->CrtcHBlankEnd >> 3) - 1) & 0x1F) | 0x80;
i = (((mode->CrtcHSkew << 2) + 0x10) & ~0x1F);
if (i < 0x80)
- regp->CRTC[3] |= i;
- regp->CRTC[4] = (mode->CrtcHSyncStart >> 3);
- regp->CRTC[5] = ((((mode->CrtcHBlankEnd >> 3) - 1) & 0x20) << 2)
- | (((mode->CrtcHSyncEnd >> 3)) & 0x1F);
- regp->CRTC[6] = (mode->CrtcVTotal - 2) & 0xFF;
- regp->CRTC[7] = (((mode->CrtcVTotal - 2) & 0x100) >> 8)
- | (((mode->CrtcVDisplay - 1) & 0x100) >> 7)
- | ((mode->CrtcVSyncStart & 0x100) >> 6)
- | (((mode->CrtcVBlankStart - 1) & 0x100) >> 5)
- | 0x10
- | (((mode->CrtcVTotal - 2) & 0x200) >> 4)
- | (((mode->CrtcVDisplay - 1) & 0x200) >> 3)
- | ((mode->CrtcVSyncStart & 0x200) >> 2);
- regp->CRTC[8] = 0x00;
- regp->CRTC[9] = (((mode->CrtcVBlankStart - 1) & 0x200) >> 4) | 0x40;
+ regp->CRTC[3] |= i;
+ regp->CRTC[4] = (mode->CrtcHSyncStart >> 3);
+ regp->CRTC[5] = ((((mode->CrtcHBlankEnd >> 3) - 1) & 0x20) << 2)
+ | (((mode->CrtcHSyncEnd >> 3)) & 0x1F);
+ regp->CRTC[6] = (mode->CrtcVTotal - 2) & 0xFF;
+ regp->CRTC[7] = (((mode->CrtcVTotal - 2) & 0x100) >> 8)
+ | (((mode->CrtcVDisplay - 1) & 0x100) >> 7)
+ | ((mode->CrtcVSyncStart & 0x100) >> 6)
+ | (((mode->CrtcVBlankStart - 1) & 0x100) >> 5)
+ | 0x10 | (((mode->CrtcVTotal - 2) & 0x200) >> 4)
+ | (((mode->CrtcVDisplay - 1) & 0x200) >> 3)
+ | ((mode->CrtcVSyncStart & 0x200) >> 2);
+ regp->CRTC[8] = 0x00;
+ regp->CRTC[9] = (((mode->CrtcVBlankStart - 1) & 0x200) >> 4) | 0x40;
if (mode->Flags & V_DBLSCAN)
- regp->CRTC[9] |= 0x80;
+ regp->CRTC[9] |= 0x80;
if (mode->VScan >= 32)
- regp->CRTC[9] |= 0x1F;
+ regp->CRTC[9] |= 0x1F;
else if (mode->VScan > 1)
- regp->CRTC[9] |= mode->VScan - 1;
+ regp->CRTC[9] |= mode->VScan - 1;
regp->CRTC[10] = 0x00;
regp->CRTC[11] = 0x00;
regp->CRTC[12] = 0x00;
@@ -1273,14 +1272,14 @@ vgaHWInit(ScrnInfoPtr scrninfp, DisplayModePtr mode)
regp->CRTC[16] = mode->CrtcVSyncStart & 0xFF;
regp->CRTC[17] = (mode->CrtcVSyncEnd & 0x0F) | 0x20;
regp->CRTC[18] = (mode->CrtcVDisplay - 1) & 0xFF;
- regp->CRTC[19] = scrninfp->displayWidth >> 4; /* just a guess */
+ regp->CRTC[19] = scrninfp->displayWidth >> 4; /* just a guess */
regp->CRTC[20] = 0x00;
- regp->CRTC[21] = (mode->CrtcVBlankStart - 1) & 0xFF;
+ regp->CRTC[21] = (mode->CrtcVBlankStart - 1) & 0xFF;
regp->CRTC[22] = (mode->CrtcVBlankEnd - 1) & 0xFF;
if (depth < 8)
- regp->CRTC[23] = 0xE3;
+ regp->CRTC[23] = 0xE3;
else
- regp->CRTC[23] = 0xC3;
+ regp->CRTC[23] = 0xC3;
regp->CRTC[24] = 0xFF;
vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
@@ -1300,7 +1299,8 @@ vgaHWInit(ScrnInfoPtr scrninfp, DisplayModePtr mode)
if (depth == 1) {
regp->Graphics[4] = BIT_PLANE;
regp->Graphics[5] = 0x00;
- } else {
+ }
+ else {
regp->Graphics[4] = 0x00;
if (depth == 4)
regp->Graphics[5] = 0x02;
@@ -1310,32 +1310,33 @@ vgaHWInit(ScrnInfoPtr scrninfp, DisplayModePtr mode)
regp->Graphics[6] = 0x05; /* only map 64k VGA memory !!!! */
regp->Graphics[7] = 0x0F;
regp->Graphics[8] = 0xFF;
-
+
if (depth == 1) {
/* Initialise the Mono map according to which bit-plane gets used */
- Bool flipPixels = xf86GetFlipPixels();
+ Bool flipPixels = xf86GetFlipPixels();
- for (i=0; i<16; i++)
+ for (i = 0; i < 16; i++)
if (((i & (1 << BIT_PLANE)) != 0) != flipPixels)
regp->Attribute[i] = WHITE_VALUE;
else
regp->Attribute[i] = BLACK_VALUE;
- regp->Attribute[16] = 0x01; /* -VGA2- */ /* wrong for the ET4000 */
- if (!hwp->ShowOverscan)
- regp->Attribute[OVERSCAN] = OVERSCAN_VALUE; /* -VGA2- */
- } else {
- regp->Attribute[0] = 0x00; /* standard colormap translation */
- regp->Attribute[1] = 0x01;
- regp->Attribute[2] = 0x02;
- regp->Attribute[3] = 0x03;
- regp->Attribute[4] = 0x04;
- regp->Attribute[5] = 0x05;
- regp->Attribute[6] = 0x06;
- regp->Attribute[7] = 0x07;
- regp->Attribute[8] = 0x08;
- regp->Attribute[9] = 0x09;
+ regp->Attribute[16] = 0x01; /* -VGA2- *//* wrong for the ET4000 */
+ if (!hwp->ShowOverscan)
+ regp->Attribute[OVERSCAN] = OVERSCAN_VALUE; /* -VGA2- */
+ }
+ else {
+ regp->Attribute[0] = 0x00; /* standard colormap translation */
+ regp->Attribute[1] = 0x01;
+ regp->Attribute[2] = 0x02;
+ regp->Attribute[3] = 0x03;
+ regp->Attribute[4] = 0x04;
+ regp->Attribute[5] = 0x05;
+ regp->Attribute[6] = 0x06;
+ regp->Attribute[7] = 0x07;
+ regp->Attribute[8] = 0x08;
+ regp->Attribute[9] = 0x09;
regp->Attribute[10] = 0x0A;
regp->Attribute[11] = 0x0B;
regp->Attribute[12] = 0x0C;
@@ -1389,36 +1390,37 @@ vgaHWInit(ScrnInfoPtr scrninfp, DisplayModePtr mode)
*/
CARD32
-vgaHWHBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
- unsigned int Flags)
+vgaHWHBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
+ unsigned int Flags)
{
int nExtBits = (nBits < 6) ? 0 : nBits - 6;
CARD32 ExtBits;
CARD32 ExtBitMask = ((1 << nExtBits) - 1) << 6;
- regp->CRTC[3] = (regp->CRTC[3] & ~0x1F)
- | (((mode->CrtcHBlankEnd >> 3) - 1) & 0x1F);
- regp->CRTC[5] = (regp->CRTC[5] & ~0x80)
- | ((((mode->CrtcHBlankEnd >> 3) - 1) & 0x20) << 2);
- ExtBits = ((mode->CrtcHBlankEnd >> 3) - 1) & ExtBitMask;
+ regp->CRTC[3] = (regp->CRTC[3] & ~0x1F)
+ | (((mode->CrtcHBlankEnd >> 3) - 1) & 0x1F);
+ regp->CRTC[5] = (regp->CRTC[5] & ~0x80)
+ | ((((mode->CrtcHBlankEnd >> 3) - 1) & 0x20) << 2);
+ ExtBits = ((mode->CrtcHBlankEnd >> 3) - 1) & ExtBitMask;
/* First the horizontal case */
if ((Flags & KGA_FIX_OVERSCAN)
- && ((mode->CrtcHBlankEnd >> 3) == (mode->CrtcHTotal >> 3)))
- {
- int i = (regp->CRTC[3] & 0x1F)
- | ((regp->CRTC[5] & 0x80) >> 2)
- | ExtBits;
- if (Flags & KGA_ENABLE_ON_ZERO) {
- if ((i-- > (((mode->CrtcHBlankStart >> 3) - 1)
- & (0x3F | ExtBitMask)))
- && (mode->CrtcHBlankEnd == mode->CrtcHTotal))
- i = 0;
- } else if (Flags & KGA_BE_TOT_DEC)
- i--;
- regp->CRTC[3] = (regp->CRTC[3] & ~0x1F) | (i & 0x1F);
- regp->CRTC[5] = (regp->CRTC[5] & ~0x80) | ((i << 2) & 0x80);
- ExtBits = i & ExtBitMask;
+ && ((mode->CrtcHBlankEnd >> 3) == (mode->CrtcHTotal >> 3))) {
+ int i = (regp->CRTC[3] & 0x1F)
+ | ((regp->CRTC[5] & 0x80) >> 2)
+ | ExtBits;
+
+ if (Flags & KGA_ENABLE_ON_ZERO) {
+ if ((i-- > (((mode->CrtcHBlankStart >> 3) - 1)
+ & (0x3F | ExtBitMask)))
+ && (mode->CrtcHBlankEnd == mode->CrtcHTotal))
+ i = 0;
+ }
+ else if (Flags & KGA_BE_TOT_DEC)
+ i--;
+ regp->CRTC[3] = (regp->CRTC[3] & ~0x1F) | (i & 0x1F);
+ regp->CRTC[5] = (regp->CRTC[5] & ~0x80) | ((i << 2) & 0x80);
+ ExtBits = i & ExtBitMask;
}
return ExtBits >> 6;
}
@@ -1430,37 +1432,41 @@ vgaHWHBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
* needs further investigation.
*/
CARD32
-vgaHWVBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
- unsigned int Flags)
+vgaHWVBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
+ unsigned int Flags)
{
CARD32 ExtBits;
CARD32 nExtBits = (nBits < 8) ? 0 : (nBits - 8);
CARD32 ExtBitMask = ((1 << nExtBits) - 1) << 8;
+
/* If width is not known nBits should be 0. In this
* case BitMask is set to 0 so we can check for it. */
CARD32 BitMask = (nBits < 7) ? 0 : ((1 << nExtBits) - 1);
- int VBlankStart = (mode->CrtcVBlankStart - 1) & 0xFF;
+ int VBlankStart = (mode->CrtcVBlankStart - 1) & 0xFF;
+
regp->CRTC[22] = (mode->CrtcVBlankEnd - 1) & 0xFF;
- ExtBits = (mode->CrtcVBlankEnd - 1) & ExtBitMask;
+ ExtBits = (mode->CrtcVBlankEnd - 1) & ExtBitMask;
- if ((Flags & KGA_FIX_OVERSCAN)
- && (mode->CrtcVBlankEnd == mode->CrtcVTotal))
- /* Null top overscan */
+ if ((Flags & KGA_FIX_OVERSCAN)
+ && (mode->CrtcVBlankEnd == mode->CrtcVTotal))
+ /* Null top overscan */
{
- int i = regp->CRTC[22] | ExtBits;
- if (Flags & KGA_ENABLE_ON_ZERO) {
- if (((BitMask && ((i & BitMask) > (VBlankStart & BitMask)))
- || ((i > VBlankStart) && /* 8-bit case */
- ((i & 0x7F) > (VBlankStart & 0x7F)))) && /* 7-bit case */
- !(regp->CRTC[9] & 0x9F)) /* 1 scanline/row */
- i = 0;
- else
- i = (i - 1);
- } else if (Flags & KGA_BE_TOT_DEC)
- i = (i - 1);
-
- regp->CRTC[22] = i & 0xFF;
- ExtBits = i & 0xFF00;
+ int i = regp->CRTC[22] | ExtBits;
+
+ if (Flags & KGA_ENABLE_ON_ZERO) {
+ if (((BitMask && ((i & BitMask) > (VBlankStart & BitMask)))
+ || ((i > VBlankStart) && /* 8-bit case */
+ ((i & 0x7F) > (VBlankStart & 0x7F)))) && /* 7-bit case */
+ !(regp->CRTC[9] & 0x9F)) /* 1 scanline/row */
+ i = 0;
+ else
+ i = (i - 1);
+ }
+ else if (Flags & KGA_BE_TOT_DEC)
+ i = (i - 1);
+
+ regp->CRTC[22] = i & 0xFF;
+ ExtBits = i & 0xFF00;
}
return ExtBits >> 8;
}
@@ -1472,29 +1478,21 @@ static void
vgaHWGetHWRecPrivate(void)
{
if (vgaHWPrivateIndex < 0)
- vgaHWPrivateIndex = xf86AllocateScrnInfoPrivateIndex();
+ vgaHWPrivateIndex = xf86AllocateScrnInfoPrivateIndex();
return;
}
-
static void
vgaHWFreeRegs(vgaRegPtr regp)
{
free(regp->CRTC);
- regp->CRTC =
- regp->Sequencer =
- regp->Graphics =
- regp->Attribute = NULL;
+ regp->CRTC = regp->Sequencer = regp->Graphics = regp->Attribute = NULL;
regp->numCRTC =
- regp->numSequencer =
- regp->numGraphics =
- regp->numAttribute = 0;
+ regp->numSequencer = regp->numGraphics = regp->numAttribute = 0;
}
-
-
static Bool
vgaHWAllocRegs(vgaRegPtr regp)
{
@@ -1505,11 +1503,10 @@ vgaHWAllocRegs(vgaRegPtr regp)
return FALSE;
buf = calloc(regp->numCRTC +
- regp->numSequencer +
- regp->numGraphics +
- regp->numAttribute, 1);
+ regp->numSequencer +
+ regp->numGraphics + regp->numAttribute, 1);
if (!buf)
- return FALSE;
+ return FALSE;
regp->CRTC = buf;
regp->Sequencer = regp->CRTC + regp->numCRTC;
@@ -1519,7 +1516,6 @@ vgaHWAllocRegs(vgaRegPtr regp)
return TRUE;
}
-
Bool
vgaHWAllocDefaultRegs(vgaRegPtr regp)
{
@@ -1531,10 +1527,9 @@ vgaHWAllocDefaultRegs(vgaRegPtr regp)
return vgaHWAllocRegs(regp);
}
-
Bool
vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC, int numSequencer,
- int numGraphics, int numAttribute)
+ int numGraphics, int numAttribute)
{
#define VGAHWMINNUM(regtype) \
((newMode.num##regtype < regp->num##regtype) ? \
@@ -1546,7 +1541,7 @@ vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC, int numSequencer,
vgaRegPtr regp;
regp = &VGAHWPTR(scrp)->ModeReg;
- memcpy (&newMode, regp, sizeof(vgaRegRec));
+ memcpy(&newMode, regp, sizeof(vgaRegRec));
/* allocate space for new registers */
@@ -1556,10 +1551,10 @@ vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC, int numSequencer,
regp->numGraphics = numGraphics;
regp->numAttribute = numAttribute;
if (!vgaHWAllocRegs(regp))
- return FALSE;
+ return FALSE;
regp = &VGAHWPTR(scrp)->SavedReg;
- memcpy (&newSaved, regp, sizeof(vgaRegRec));
+ memcpy(&newSaved, regp, sizeof(vgaRegRec));
regp = &newSaved;
regp->numCRTC = numCRTC;
@@ -1568,7 +1563,7 @@ vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC, int numSequencer,
regp->numAttribute = numAttribute;
if (!vgaHWAllocRegs(regp)) {
vgaHWFreeRegs(&newMode);
- return FALSE;
+ return FALSE;
}
/* allocations succeeded, copy register data into new space */
@@ -1601,7 +1596,6 @@ vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC, int numSequencer,
#undef VGAHWCOPYREGSET
}
-
Bool
vgaHWCopyReg(vgaRegPtr dst, vgaRegPtr src)
{
@@ -1610,7 +1604,7 @@ vgaHWCopyReg(vgaRegPtr dst, vgaRegPtr src)
memcpy(dst, src, sizeof(vgaRegRec));
if (!vgaHWAllocRegs(dst))
- return FALSE;
+ return FALSE;
memcpy(dst->CRTC, src->CRTC, src->numCRTC);
memcpy(dst->Sequencer, src->Sequencer, src->numSequencer);
@@ -1620,14 +1614,13 @@ vgaHWCopyReg(vgaRegPtr dst, vgaRegPtr src)
return TRUE;
}
-
Bool
vgaHWGetHWRec(ScrnInfoPtr scrp)
{
vgaRegPtr regp;
vgaHWPtr hwp;
int i;
-
+
/*
* Let's make sure that the private exists and allocate one.
*/
@@ -1637,41 +1630,49 @@ vgaHWGetHWRec(ScrnInfoPtr scrp)
* has already been done.
*/
if (VGAHWPTR(scrp))
- return TRUE;
+ return TRUE;
hwp = VGAHWPTRLVAL(scrp) = xnfcalloc(sizeof(vgaHWRec), 1);
regp = &VGAHWPTR(scrp)->ModeReg;
if ((!vgaHWAllocDefaultRegs(&VGAHWPTR(scrp)->SavedReg)) ||
- (!vgaHWAllocDefaultRegs(&VGAHWPTR(scrp)->ModeReg))) {
+ (!vgaHWAllocDefaultRegs(&VGAHWPTR(scrp)->ModeReg))) {
free(hwp);
- return FALSE;
+ return FALSE;
}
if (scrp->bitsPerPixel == 1) {
- rgb blackColour = scrp->display->blackColour,
- whiteColour = scrp->display->whiteColour;
-
- if (blackColour.red > 0x3F) blackColour.red = 0x3F;
- if (blackColour.green > 0x3F) blackColour.green = 0x3F;
- if (blackColour.blue > 0x3F) blackColour.blue = 0x3F;
-
- if (whiteColour.red > 0x3F) whiteColour.red = 0x3F;
- if (whiteColour.green > 0x3F) whiteColour.green = 0x3F;
- if (whiteColour.blue > 0x3F) whiteColour.blue = 0x3F;
-
- if ((blackColour.red == whiteColour.red ) &&
- (blackColour.green == whiteColour.green) &&
- (blackColour.blue == whiteColour.blue )) {
- blackColour.red ^= 0x3F;
- blackColour.green ^= 0x3F;
- blackColour.blue ^= 0x3F;
- }
+ rgb blackColour = scrp->display->blackColour,
+ whiteColour = scrp->display->whiteColour;
+
+ if (blackColour.red > 0x3F)
+ blackColour.red = 0x3F;
+ if (blackColour.green > 0x3F)
+ blackColour.green = 0x3F;
+ if (blackColour.blue > 0x3F)
+ blackColour.blue = 0x3F;
+
+ if (whiteColour.red > 0x3F)
+ whiteColour.red = 0x3F;
+ if (whiteColour.green > 0x3F)
+ whiteColour.green = 0x3F;
+ if (whiteColour.blue > 0x3F)
+ whiteColour.blue = 0x3F;
+
+ if ((blackColour.red == whiteColour.red) &&
+ (blackColour.green == whiteColour.green) &&
+ (blackColour.blue == whiteColour.blue)) {
+ blackColour.red ^= 0x3F;
+ blackColour.green ^= 0x3F;
+ blackColour.blue ^= 0x3F;
+ }
/*
* initialize default colormap for monochrome
*/
- for (i=0; i<3; i++) regp->DAC[i] = 0x00;
- for (i=3; i<768; i++) regp->DAC[i] = 0x3F;
+ for (i = 0; i < 3; i++)
+ regp->DAC[i] = 0x00;
+ for (i = 3; i < 768; i++)
+ regp->DAC[i] = 0x3F;
i = BLACK_VALUE * 3;
regp->DAC[i++] = blackColour.red;
regp->DAC[i++] = blackColour.green;
@@ -1684,23 +1685,26 @@ vgaHWGetHWRec(ScrnInfoPtr scrp)
regp->DAC[i++] = 0x00;
regp->DAC[i++] = 0x00;
regp->DAC[i] = 0x00;
- } else {
- /* Set all colours to black */
- for (i=0; i<768; i++) regp->DAC[i] = 0x00;
+ }
+ else {
+ /* Set all colours to black */
+ for (i = 0; i < 768; i++)
+ regp->DAC[i] = 0x00;
/* ... and the overscan */
if (scrp->depth >= 4)
regp->Attribute[OVERSCAN] = 0xFF;
}
if (xf86FindOption(scrp->confScreen->options, "ShowOverscan")) {
- xf86MarkOptionUsedByName(scrp->confScreen->options, "ShowOverscan");
- xf86DrvMsg(scrp->scrnIndex, X_CONFIG, "Showing overscan area\n");
- regp->DAC[765] = 0x3F;
- regp->DAC[766] = 0x00;
- regp->DAC[767] = 0x3F;
- regp->Attribute[OVERSCAN] = 0xFF;
- hwp->ShowOverscan = TRUE;
- } else
- hwp->ShowOverscan = FALSE;
+ xf86MarkOptionUsedByName(scrp->confScreen->options, "ShowOverscan");
+ xf86DrvMsg(scrp->scrnIndex, X_CONFIG, "Showing overscan area\n");
+ regp->DAC[765] = 0x3F;
+ regp->DAC[766] = 0x00;
+ regp->DAC[767] = 0x3F;
+ regp->Attribute[OVERSCAN] = 0xFF;
+ hwp->ShowOverscan = TRUE;
+ }
+ else
+ hwp->ShowOverscan = FALSE;
hwp->paletteEnabled = FALSE;
hwp->cmapSaved = FALSE;
@@ -1712,44 +1716,42 @@ vgaHWGetHWRec(ScrnInfoPtr scrp)
return TRUE;
}
-
void
vgaHWFreeHWRec(ScrnInfoPtr scrp)
{
if (vgaHWPrivateIndex >= 0) {
- vgaHWPtr hwp = VGAHWPTR(scrp);
+ vgaHWPtr hwp = VGAHWPTR(scrp);
- if (!hwp)
+ if (!hwp)
return;
pci_device_close_io(hwp->dev, hwp->io);
- free(hwp->FontInfo1);
- free(hwp->FontInfo2);
- free(hwp->TextInfo);
+ free(hwp->FontInfo1);
+ free(hwp->FontInfo2);
+ free(hwp->TextInfo);
- vgaHWFreeRegs (&hwp->ModeReg);
- vgaHWFreeRegs (&hwp->SavedReg);
+ vgaHWFreeRegs(&hwp->ModeReg);
+ vgaHWFreeRegs(&hwp->SavedReg);
- free(hwp);
- VGAHWPTRLVAL(scrp) = NULL;
+ free(hwp);
+ VGAHWPTRLVAL(scrp) = NULL;
}
}
-
Bool
vgaHWMapMem(ScrnInfoPtr scrp)
{
vgaHWPtr hwp = VGAHWPTR(scrp);
-
+
if (hwp->Base)
- return TRUE;
+ return TRUE;
/* If not set, initialise with the defaults */
if (hwp->MapSize == 0)
- hwp->MapSize = VGA_DEFAULT_MEM_SIZE;
+ hwp->MapSize = VGA_DEFAULT_MEM_SIZE;
if (hwp->MapPhys == 0)
- hwp->MapPhys = VGA_DEFAULT_PHYS_ADDR;
+ hwp->MapPhys = VGA_DEFAULT_PHYS_ADDR;
/*
* Map as VIDMEM_MMIO_32BIT because WC
@@ -1758,19 +1760,19 @@ vgaHWMapMem(ScrnInfoPtr scrp)
* for now.
*/
DebugF("Mapping VGAMem\n");
- pci_device_map_legacy(hwp->dev, hwp->MapPhys, hwp->MapSize, PCI_DEV_MAP_FLAG_WRITABLE, &hwp->Base);
+ pci_device_map_legacy(hwp->dev, hwp->MapPhys, hwp->MapSize,
+ PCI_DEV_MAP_FLAG_WRITABLE, &hwp->Base);
return hwp->Base != NULL;
}
-
void
vgaHWUnmapMem(ScrnInfoPtr scrp)
{
vgaHWPtr hwp = VGAHWPTR(scrp);
if (hwp->Base == NULL)
- return;
-
+ return;
+
DebugF("Unmapping VGAMem\n");
pci_device_unmap_legacy(hwp->dev, hwp->Base, hwp->MapSize);
hwp->Base = NULL;
@@ -1782,17 +1784,15 @@ vgaHWGetIndex(void)
return vgaHWPrivateIndex;
}
-
void
vgaHWGetIOBase(vgaHWPtr hwp)
{
hwp->IOBase = (hwp->readMiscOut(hwp) & 0x01) ?
- VGA_IOBASE_COLOR : VGA_IOBASE_MONO;
+ VGA_IOBASE_COLOR : VGA_IOBASE_MONO;
xf86DrvMsgVerb(hwp->pScrn->scrnIndex, X_INFO, 3,
- "vgaHWGetIOBase: hwp->IOBase is 0x%04x\n", hwp->IOBase);
+ "vgaHWGetIOBase: hwp->IOBase is 0x%04x\n", hwp->IOBase);
}
-
void
vgaHWLock(vgaHWPtr hwp)
{
@@ -1804,87 +1804,82 @@ void
vgaHWUnlock(vgaHWPtr hwp)
{
/* Unprotect CRTC[0-7] */
- hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) & ~0x80);
+ hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) & ~0x80);
}
-
void
vgaHWEnable(vgaHWPtr hwp)
{
hwp->writeEnable(hwp, hwp->readEnable(hwp) | 0x01);
}
-
void
vgaHWDisable(vgaHWPtr hwp)
{
hwp->writeEnable(hwp, hwp->readEnable(hwp) & ~0x01);
}
-
static void
-vgaHWLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors,
- VisualPtr pVisual)
+vgaHWLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO * colors,
+ VisualPtr pVisual)
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
int i, index;
for (i = 0; i < numColors; i++) {
- index = indices[i];
- hwp->writeDacWriteAddr(hwp, index);
- DACDelay(hwp);
- hwp->writeDacData(hwp, colors[index].red);
- DACDelay(hwp);
- hwp->writeDacData(hwp, colors[index].green);
- DACDelay(hwp);
- hwp->writeDacData(hwp, colors[index].blue);
- DACDelay(hwp);
+ index = indices[i];
+ hwp->writeDacWriteAddr(hwp, index);
+ DACDelay(hwp);
+ hwp->writeDacData(hwp, colors[index].red);
+ DACDelay(hwp);
+ hwp->writeDacData(hwp, colors[index].green);
+ DACDelay(hwp);
+ hwp->writeDacData(hwp, colors[index].blue);
+ DACDelay(hwp);
}
/* This shouldn't be necessary, but we'll play safe. */
hwp->disablePalette(hwp);
}
-
static void
vgaHWSetOverscan(ScrnInfoPtr pScrn, int overscan)
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
if (overscan < 0 || overscan > 255)
- return;
+ return;
hwp->enablePalette(hwp);
hwp->writeAttr(hwp, OVERSCAN, overscan);
#ifdef DEBUGOVERSCAN
{
- int ov = hwp->readAttr(hwp, OVERSCAN);
- int red, green, blue;
-
- hwp->writeDacReadAddr(hwp, ov);
- red = hwp->readDacData(hwp);
- green = hwp->readDacData(hwp);
- blue = hwp->readDacData(hwp);
- ErrorF("Overscan index is 0x%02x, colours are #%02x%02x%02x\n",
- ov, red, green, blue);
+ int ov = hwp->readAttr(hwp, OVERSCAN);
+ int red, green, blue;
+
+ hwp->writeDacReadAddr(hwp, ov);
+ red = hwp->readDacData(hwp);
+ green = hwp->readDacData(hwp);
+ blue = hwp->readDacData(hwp);
+ ErrorF("Overscan index is 0x%02x, colours are #%02x%02x%02x\n",
+ ov, red, green, blue);
}
#endif
hwp->disablePalette(hwp);
}
-
Bool
vgaHWHandleColormaps(ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
if (pScrn->depth > 1 && pScrn->depth <= 8) {
- return xf86HandleColormaps(pScreen, 1 << pScrn->depth,
- pScrn->rgbBits, vgaHWLoadPalette,
- pScrn->depth > 4 ? vgaHWSetOverscan : NULL,
- CMAP_RELOAD_ON_MODE_SWITCH);
+ return xf86HandleColormaps(pScreen, 1 << pScrn->depth,
+ pScrn->rgbBits, vgaHWLoadPalette,
+ pScrn->depth > 4 ? vgaHWSetOverscan : NULL,
+ CMAP_RELOAD_ON_MODE_SWITCH);
}
return TRUE;
}
@@ -1923,57 +1918,60 @@ vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed)
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
unsigned char tmp;
- struct _vgaDdcSave* save;
+ struct _vgaDdcSave *save;
+
switch (speed) {
case DDC_FAST:
-
- if (hwp->ddc != NULL) break;
- hwp->ddc = xnfcalloc(sizeof(struct _vgaDdcSave),1);
- save = (struct _vgaDdcSave *)hwp->ddc;
- /* Lightpen register disable - allow access to cr10 & 11; just in case */
- save->cr03 = hwp->readCrtc(hwp, 0x03);
- hwp->writeCrtc(hwp,0x03,(save->cr03 |0x80));
- save->cr12 = hwp->readCrtc(hwp, 0x12);
- hwp->writeCrtc(hwp,0x12,DISPLAY_END);
- save->cr15 = hwp->readCrtc(hwp, 0x15);
- hwp->writeCrtc(hwp,0x15,BLANK_START);
- save->cr10 = hwp->readCrtc(hwp, 0x10);
- hwp->writeCrtc(hwp,0x10,SYNC_START);
- save->cr11 = hwp->readCrtc(hwp, 0x11);
- /* unprotect group 1 registers; just in case ...*/
- hwp->writeCrtc(hwp,0x11,((save->cr11 & 0x70) | SYNC_END));
- save->cr16 = hwp->readCrtc(hwp, 0x16);
- hwp->writeCrtc(hwp,0x16,BLANK_END);
- save->cr06 = hwp->readCrtc(hwp, 0x06);
- hwp->writeCrtc(hwp,0x06,V_TOTAL);
- /* all values have less than 8 bit - mask out 9th and 10th bits */
- save->cr09 = hwp->readCrtc(hwp, 0x09);
- hwp->writeCrtc(hwp,0x09,(save->cr09 &0xDF));
- save->cr07 = hwp->readCrtc(hwp, 0x07);
- hwp->writeCrtc(hwp,0x07,(save->cr07 &0x10));
- /* vsync polarity negativ & ensure a 25MHz clock */
- save->msr = hwp->readMiscOut(hwp);
- hwp->writeMiscOut(hwp,((save->msr & 0xF3) | 0x80));
- break;
+
+ if (hwp->ddc != NULL)
+ break;
+ hwp->ddc = xnfcalloc(sizeof(struct _vgaDdcSave), 1);
+ save = (struct _vgaDdcSave *) hwp->ddc;
+ /* Lightpen register disable - allow access to cr10 & 11; just in case */
+ save->cr03 = hwp->readCrtc(hwp, 0x03);
+ hwp->writeCrtc(hwp, 0x03, (save->cr03 | 0x80));
+ save->cr12 = hwp->readCrtc(hwp, 0x12);
+ hwp->writeCrtc(hwp, 0x12, DISPLAY_END);
+ save->cr15 = hwp->readCrtc(hwp, 0x15);
+ hwp->writeCrtc(hwp, 0x15, BLANK_START);
+ save->cr10 = hwp->readCrtc(hwp, 0x10);
+ hwp->writeCrtc(hwp, 0x10, SYNC_START);
+ save->cr11 = hwp->readCrtc(hwp, 0x11);
+ /* unprotect group 1 registers; just in case ... */
+ hwp->writeCrtc(hwp, 0x11, ((save->cr11 & 0x70) | SYNC_END));
+ save->cr16 = hwp->readCrtc(hwp, 0x16);
+ hwp->writeCrtc(hwp, 0x16, BLANK_END);
+ save->cr06 = hwp->readCrtc(hwp, 0x06);
+ hwp->writeCrtc(hwp, 0x06, V_TOTAL);
+ /* all values have less than 8 bit - mask out 9th and 10th bits */
+ save->cr09 = hwp->readCrtc(hwp, 0x09);
+ hwp->writeCrtc(hwp, 0x09, (save->cr09 & 0xDF));
+ save->cr07 = hwp->readCrtc(hwp, 0x07);
+ hwp->writeCrtc(hwp, 0x07, (save->cr07 & 0x10));
+ /* vsync polarity negativ & ensure a 25MHz clock */
+ save->msr = hwp->readMiscOut(hwp);
+ hwp->writeMiscOut(hwp, ((save->msr & 0xF3) | 0x80));
+ break;
case DDC_SLOW:
- if (hwp->ddc == NULL) break;
- save = (struct _vgaDdcSave *)hwp->ddc;
- hwp->writeMiscOut(hwp,save->msr);
- hwp->writeCrtc(hwp,0x07,save->cr07);
- tmp = hwp->readCrtc(hwp, 0x09);
- hwp->writeCrtc(hwp,0x09,((save->cr09 & 0x20) | (tmp & 0xDF)));
- hwp->writeCrtc(hwp,0x06,save->cr06);
- hwp->writeCrtc(hwp,0x16,save->cr16);
- hwp->writeCrtc(hwp,0x11,save->cr11);
- hwp->writeCrtc(hwp,0x10,save->cr10);
- hwp->writeCrtc(hwp,0x15,save->cr15);
- hwp->writeCrtc(hwp,0x12,save->cr12);
- hwp->writeCrtc(hwp,0x03,save->cr03);
- free(save);
- hwp->ddc = NULL;
- break;
+ if (hwp->ddc == NULL)
+ break;
+ save = (struct _vgaDdcSave *) hwp->ddc;
+ hwp->writeMiscOut(hwp, save->msr);
+ hwp->writeCrtc(hwp, 0x07, save->cr07);
+ tmp = hwp->readCrtc(hwp, 0x09);
+ hwp->writeCrtc(hwp, 0x09, ((save->cr09 & 0x20) | (tmp & 0xDF)));
+ hwp->writeCrtc(hwp, 0x06, save->cr06);
+ hwp->writeCrtc(hwp, 0x16, save->cr16);
+ hwp->writeCrtc(hwp, 0x11, save->cr11);
+ hwp->writeCrtc(hwp, 0x10, save->cr10);
+ hwp->writeCrtc(hwp, 0x15, save->cr15);
+ hwp->writeCrtc(hwp, 0x12, save->cr12);
+ hwp->writeCrtc(hwp, 0x03, save->cr03);
+ free(save);
+ hwp->ddc = NULL;
+ break;
default:
- break;
+ break;
}
}
@@ -1983,7 +1981,8 @@ vgaHWddc1SetSpeedWeak(void)
return vgaHWddc1SetSpeed;
}
-SaveScreenProcPtr vgaHWSaveScreenWeak(void)
+SaveScreenProcPtr
+vgaHWSaveScreenWeak(void)
{
return vgaHWSaveScreen;
}
@@ -1992,89 +1991,87 @@ SaveScreenProcPtr vgaHWSaveScreenWeak(void)
* xf86GetClocks -- get the dot-clocks via a BIG BAD hack ...
*/
void
-xf86GetClocks(ScrnInfoPtr pScrn, int num, Bool (*ClockFunc)(ScrnInfoPtr, int),
- void (*ProtectRegs)(ScrnInfoPtr, Bool),
- void (*BlankScreen)(ScrnInfoPtr, Bool), unsigned long vertsyncreg,
- int maskval, int knownclkindex, int knownclkvalue)
+xf86GetClocks(ScrnInfoPtr pScrn, int num, Bool (*ClockFunc) (ScrnInfoPtr, int),
+ void (*ProtectRegs) (ScrnInfoPtr, Bool),
+ void (*BlankScreen) (ScrnInfoPtr, Bool),
+ unsigned long vertsyncreg, int maskval, int knownclkindex,
+ int knownclkvalue)
{
register int status = vertsyncreg;
unsigned long i, cnt, rcnt, sync;
vgaHWPtr hwp = VGAHWPTR(pScrn);
/* First save registers that get written on */
- (*ClockFunc)(pScrn, CLK_REG_SAVE);
+ (*ClockFunc) (pScrn, CLK_REG_SAVE);
if (num > MAXCLOCKS)
- num = MAXCLOCKS;
-
- for (i = 0; i < num; i++)
- {
- if (ProtectRegs)
- (*ProtectRegs)(pScrn, TRUE);
- if (!(*ClockFunc)(pScrn, i))
- {
- pScrn->clock[i] = -1;
- continue;
- }
- if (ProtectRegs)
- (*ProtectRegs)(pScrn, FALSE);
- if (BlankScreen)
- (*BlankScreen)(pScrn, FALSE);
-
- usleep(50000); /* let VCO stabilise */
-
- cnt = 0;
- sync = 200000;
-
- while ((pci_io_read8(hwp->io, status) & maskval) == 0x00)
- if (sync-- == 0) goto finish;
- /* Something appears to be happening, so reset sync count */
- sync = 200000;
- while ((pci_io_read8(hwp->io, status) & maskval) == maskval)
- if (sync-- == 0) goto finish;
- /* Something appears to be happening, so reset sync count */
- sync = 200000;
- while ((pci_io_read8(hwp->io, status) & maskval) == 0x00)
- if (sync-- == 0) goto finish;
-
- for (rcnt = 0; rcnt < 5; rcnt++)
- {
- while (!(pci_io_read8(hwp->io, status) & maskval))
- cnt++;
- while ((pci_io_read8(hwp->io, status) & maskval))
- cnt++;
- }
-
-finish:
- pScrn->clock[i] = cnt ? cnt : -1;
- if (BlankScreen)
- (*BlankScreen)(pScrn, TRUE);
+ num = MAXCLOCKS;
+
+ for (i = 0; i < num; i++) {
+ if (ProtectRegs)
+ (*ProtectRegs) (pScrn, TRUE);
+ if (!(*ClockFunc) (pScrn, i)) {
+ pScrn->clock[i] = -1;
+ continue;
+ }
+ if (ProtectRegs)
+ (*ProtectRegs) (pScrn, FALSE);
+ if (BlankScreen)
+ (*BlankScreen) (pScrn, FALSE);
+
+ usleep(50000); /* let VCO stabilise */
+
+ cnt = 0;
+ sync = 200000;
+
+ while ((pci_io_read8(hwp->io, status) & maskval) == 0x00)
+ if (sync-- == 0)
+ goto finish;
+ /* Something appears to be happening, so reset sync count */
+ sync = 200000;
+ while ((pci_io_read8(hwp->io, status) & maskval) == maskval)
+ if (sync-- == 0)
+ goto finish;
+ /* Something appears to be happening, so reset sync count */
+ sync = 200000;
+ while ((pci_io_read8(hwp->io, status) & maskval) == 0x00)
+ if (sync-- == 0)
+ goto finish;
+
+ for (rcnt = 0; rcnt < 5; rcnt++) {
+ while (!(pci_io_read8(hwp->io, status) & maskval))
+ cnt++;
+ while ((pci_io_read8(hwp->io, status) & maskval))
+ cnt++;
+ }
+
+ finish:
+ pScrn->clock[i] = cnt ? cnt : -1;
+ if (BlankScreen)
+ (*BlankScreen) (pScrn, TRUE);
}
- for (i = 0; i < num; i++)
- {
- if (i != knownclkindex)
- {
- if (pScrn->clock[i] == -1)
- {
- pScrn->clock[i] = 0;
- }
- else
- {
- pScrn->clock[i] = (int)(0.5 +
- (((float)knownclkvalue) * pScrn->clock[knownclkindex]) /
- (pScrn->clock[i]));
- /* Round to nearest 10KHz */
- pScrn->clock[i] += 5;
- pScrn->clock[i] /= 10;
- pScrn->clock[i] *= 10;
- }
- }
+ for (i = 0; i < num; i++) {
+ if (i != knownclkindex) {
+ if (pScrn->clock[i] == -1) {
+ pScrn->clock[i] = 0;
+ }
+ else {
+ pScrn->clock[i] = (int) (0.5 +
+ (((float) knownclkvalue) *
+ pScrn->clock[knownclkindex]) /
+ (pScrn->clock[i]));
+ /* Round to nearest 10KHz */
+ pScrn->clock[i] += 5;
+ pScrn->clock[i] /= 10;
+ pScrn->clock[i] *= 10;
+ }
+ }
}
pScrn->clock[knownclkindex] = knownclkvalue;
pScrn->numClocks = num;
/* Restore registers that were written on */
- (*ClockFunc)(pScrn, CLK_REG_RESTORE);
+ (*ClockFunc) (pScrn, CLK_REG_RESTORE);
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-18 23:15:34 +0000