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authorAaron Plattner <aplattner@nvidia.com>2007-01-03 18:27:07 (GMT)
committer Aaron Plattner <aplattner@nvidia.com>2007-01-03 21:47:01 (GMT)
commit66fa87292ef26bd0f464481287f3af992cd5741c (patch) (side-by-side diff)
tree2d16dbf3e90c76228864aa02c43c30b94a43165a
parent3b5b7ef5c2ab1d196806f6359e0972fd78d204dd (diff)
downloadxserver-66fa87292ef26bd0f464481287f3af992cd5741c.zip
xserver-66fa87292ef26bd0f464481287f3af992cd5741c.tar.gz
Fix BSF and BSR instructions in the x86 emulator.
Patch courtesy of Michael Yaroslavtsev.
Diffstat (more/less context) (ignore whitespace changes)
-rw-r--r--hw/xfree86/x86emu/ops2.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/hw/xfree86/x86emu/ops2.c b/hw/xfree86/x86emu/ops2.c
index 4bf95c1..7b0156a 100644
--- a/hw/xfree86/x86emu/ops2.c
+++ b/hw/xfree86/x86emu/ops2.c
@@ -2129,7 +2129,7 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
uint srcoffset;
START_OF_INSTR();
- DECODE_PRINTF("BSF\n");
+ DECODE_PRINTF("BSF\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch(mod) {
case 0:
@@ -2209,25 +2209,25 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
break;
case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg, *dstreg;
+ u32 srcval, *dstreg;
- srcreg = DECODE_RM_LONG_REGISTER(rl);
+ srcval = *DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((*srcreg >> *dstreg) & 1) break;
+ if ((srcval >> *dstreg) & 1) break;
} else {
- u16 *srcreg, *dstreg;
+ u16 srcval, *dstreg;
- srcreg = DECODE_RM_WORD_REGISTER(rl);
+ srcval = *DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((*srcreg >> *dstreg) & 1) break;
+ if ((srcval >> *dstreg) & 1) break;
}
break;
}
@@ -2245,7 +2245,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
uint srcoffset;
START_OF_INSTR();
- DECODE_PRINTF("BSF\n");
+ DECODE_PRINTF("BSR\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch(mod) {
case 0:
@@ -2325,25 +2325,25 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
break;
case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg, *dstreg;
+ u32 srcval, *dstreg;
- srcreg = DECODE_RM_LONG_REGISTER(rl);
+ srcval = *DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((*srcreg >> *dstreg) & 1) break;
+ if ((srcval >> *dstreg) & 1) break;
} else {
- u16 *srcreg, *dstreg;
+ u16 srcval, *dstreg;
- srcreg = DECODE_RM_WORD_REGISTER(rl);
+ srcval = *DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((*srcreg >> *dstreg) & 1) break;
+ if ((srcval >> *dstreg) & 1) break;
}
break;
}