From 5b994e0dd840deb574dde53abcd724007382cd20 Mon Sep 17 00:00:00 2001 From: Egbert Eich Date: Fri, 8 Jan 2010 11:55:25 +0100 Subject: Fix wrong mask value for fractional pll divider. This issue was pointed out to us by Peter Blum. --- src/rhd_atompll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/rhd_atompll.c b/src/rhd_atompll.c index 9caedb2..c6dde3a 100644 --- a/src/rhd_atompll.c +++ b/src/rhd_atompll.c @@ -214,7 +214,7 @@ rhdAtomPLL1Save(struct rhdPLL *PLL) PLL->StoreSpreadSpectrum = RHDRegRead(PLL, P1PLL_INT_SS_CNTL); PLL->StoreRefDiv = RHDRegRead(PLL, EXT1_PPLL_REF_DIV) & 0x1FF; PLL->StoreFBDiv = (RHDRegRead(PLL, EXT1_PPLL_FB_DIV) >> 16) & 0x7FF; - Private->StoreFBDivFrac = RHDRegRead(PLL, EXT1_PPLL_FB_DIV) & 0x7; + Private->StoreFBDivFrac = RHDRegRead(PLL, EXT1_PPLL_FB_DIV) & 0xF; PLL->StorePostDiv = RHDRegRead(PLL, EXT1_PPLL_POST_DIV) & 0x3F; PllCntl = RHDRegRead(PLL, P1PLL_CNTL); RHDDebug(PLL->scrnIndex, "Saving %i kHz clock on PLL1\n", @@ -239,7 +239,7 @@ rhdAtomPLL2Save(struct rhdPLL *PLL) PLL->StoreSpreadSpectrum = RHDRegRead(PLL, P2PLL_INT_SS_CNTL); PLL->StoreRefDiv = RHDRegRead(PLL, EXT2_PPLL_REF_DIV) & 0x1FF; PLL->StoreFBDiv = (RHDRegRead(PLL, EXT2_PPLL_FB_DIV) >> 16) & 0x7FF; - Private->StoreFBDivFrac = RHDRegRead(PLL, EXT2_PPLL_FB_DIV) & 0x7; + Private->StoreFBDivFrac = RHDRegRead(PLL, EXT2_PPLL_FB_DIV) & 0xF; PLL->StorePostDiv = RHDRegRead(PLL, EXT2_PPLL_POST_DIV) & 0x3F; PllCntl = RHDRegRead(PLL, P2PLL_CNTL); RHDDebug(PLL->scrnIndex, "Saving %i kHz clock on PLL2\n", -- cgit v1.2.3