diff options
| author | Christian Koenig <deathsimple@vodafone.de> | 2009-02-11 18:09:33 -0500 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2009-02-11 18:09:33 -0500 |
| commit | c966b3942fac5af86a704cbcdda4acd0175f6bdf (patch) | |
| tree | 9e26891b4d8280d6ec95c19ef8e364f9af6ef0e4 | |
| parent | 2f408d1dd87b647d73d7066176e0d00a31b2bc39 (diff) | |
R6xx/R7xx: Define WAIT_x constants for IT_WAIT_REG_MEM
And also fix some compiler warnings.
| -rw-r--r-- | src/r600_reg.h | 24 | ||||
| -rw-r--r-- | src/r6xx_accel.c | 3 |
2 files changed, 21 insertions, 6 deletions
diff --git a/src/r600_reg.h b/src/r600_reg.h index 43b2d45..4190796 100644 --- a/src/r600_reg.h +++ b/src/r600_reg.h @@ -51,7 +51,7 @@ enum { SET_LOOP_CONST_offset = 0x0003e200, SET_LOOP_CONST_end = 0x0003e380, SET_BOOL_CONST_offset = 0x0003e380, - SET_BOOL_CONST_end = 0x00040000, + SET_BOOL_CONST_end = 0x00040000 } ; /* packet3 IT_SURFACE_BASE_UPDATE bits */ @@ -70,7 +70,21 @@ enum { STRMOUT_BASE2 = (1 << 11), STRMOUT_BASE3 = (1 << 12), COHER_BASE0 = (1 << 13), - COHER_BASE1 = (1 << 14), + COHER_BASE1 = (1 << 14) +}; + +/* packet3 IT_WAIT_REG_MEM operation encoding */ +enum { + WAIT_ALWAYS = (0<<0), + WAIT_LT = (1<<0), + WAIT_LE = (2<<0), + WAIT_EQ = (3<<0), + WAIT_NE = (4<<0), + WAIT_GE = (5<<0), + WAIT_GT = (6<<0), + + WAIT_REG = (0<<4), + WAIT_MEM = (1<<4) }; /* CP packet types */ @@ -78,7 +92,7 @@ enum { RADEON_CP_PACKET0 = 0x00000000, RADEON_CP_PACKET1 = 0x40000000, RADEON_CP_PACKET2 = 0x80000000, - RADEON_CP_PACKET3 = 0xC0000000, + RADEON_CP_PACKET3 = 0xC0000000 }; /* Packet3 commands */ @@ -120,7 +134,7 @@ enum { IT_SET_RESOURCE = 0x6D, IT_SET_SAMPLER = 0x6E, IT_SET_CTL_CONST = 0x6F, - IT_SURFACE_BASE_UPDATE = 0x73, -} ; + IT_SURFACE_BASE_UPDATE = 0x73 +}; #endif diff --git a/src/r6xx_accel.c b/src/r6xx_accel.c index 9f9a419..298a913 100644 --- a/src/r6xx_accel.c +++ b/src/r6xx_accel.c @@ -400,8 +400,9 @@ cp_set_surface_sync(ScrnInfoPtr pScrn, drmBufPtr ib, uint32_t sync_type, uint32_ ereg (ib, CP_COHER_CNTL, sync_type); ereg (ib, CP_COHER_SIZE, cp_coher_size); ereg (ib, CP_COHER_BASE, (mc_addr >> 8)); + pack3 (ib, IT_WAIT_REG_MEM, 6); - e32 (ib, 0x00000003); // ME, Register, EqualTo + e32 (ib, WAIT_REG | WAIT_EQ); e32 (ib, CP_COHER_STATUS >> 2); e32 (ib, 0); e32 (ib, 0); // Ref value |