summaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2013-07-28uxa: Clear up the common intel directoryChris Wilson205-111/+4877
2013-07-28intel: Only print the unique chipset namesChris Wilson1-3/+53
2013-07-28intel: Replace the codename in the user facing string for unknown Haswell partsChris Wilson1-22/+22
2013-07-28intel: Set the correct marketing names for Ironlake, Sandybridge and IvybridgeChris Wilson1-15/+15
2013-07-28intel: Remove the SDV from the list of identified chipsetsChris Wilson1-16/+0
2013-07-28intel: Cross-check an unnamed chipset against the list of known PCI-IDsChris Wilson1-1/+17
2013-07-28intel: Source our PCI IDs table from the copy in the kernelChris Wilson3-132/+253
2013-07-282.21.13 release2.21.13Chris Wilson2-1/+38
2013-07-28sna/dri: correct DBG typoChris Wilson1-1/+1
2013-07-27test/dri2: We do not require the GLX includesChris Wilson1-3/+0
2013-07-26sna: Try the indirect upload if we elect to use a mmap and it failsChris Wilson1-7/+12
2013-07-25sna/dri: Discard the strict checking for stale bo before performing a blitChris Wilson1-365/+137
2013-07-24sna/dri: Restore the comparison of bottom-right extents to the pixmap originChris Wilson1-9/+16
2013-07-24sna: Remove bogus comment concerning sna_enter_vtChris Wilson1-3/+0
2013-07-24sna/dri: Cleanup validation of blit extentsChris Wilson1-11/+28
2013-07-23sna/gen5: The cached value of the pipelined pointers key requires 32-bitsChris Wilson2-6/+15
2013-07-22configure: Supply a default value for dridriverdirChris Wilson1-4/+3
2013-07-22configure: Fix enabling of DRI2Chris Wilson1-1/+1
2013-07-22sna: Fix DBG compilationChris Wilson8-10/+10
2013-07-22configure: Use --enable-dri to control both DRI/DRI2 enablingChris Wilson1-9/+16
2013-07-22sna: Bail if we fail to find the attached CRTC during probingChris Wilson1-0/+10
2013-07-22sna/gen5: Rework the flush after blend state changesChris Wilson1-2/+15
2013-07-21sna: Missing git add to fix typo in assert() from last commitChris Wilson1-1/+1
2013-07-21sna: Allow linear inplace uploads along the tiled X PutImage blt pathsChris Wilson1-40/+48
2013-07-21sna: Unwind BLT setup if we don't emit any opsChris Wilson1-0/+41
2013-07-20sna: Remember to apply drawable offsets for composite memcpyChris Wilson1-40/+50
2013-07-20sna: Release cloned pixmap when updating tearfree scanoutChris Wilson1-0/+4
2013-07-20sna: Relax assertion that CPU syncs are performed on reffed objectsChris Wilson1-2/+0
2013-07-20sna: Correct typo in checking src extents before performing memcpyChris Wilson1-1/+13
2013-07-20sna: Inform the upper layers that we turn the CRTC on after a modesetChris Wilson1-0/+3
2013-07-20sna: Fix application of composite offsets along PutImage fallback pathChris Wilson1-4/+3
2013-07-20sna: Tidy fast source clip processing for sna_do_copyChris Wilson1-42/+42
2013-07-20sna/dri: Fix the strict blitting check not to assume the dst is the front bufferChris Wilson1-19/+20
2013-07-19sna: Perform an explicit check against the region extentsChris Wilson1-1/+1
2013-07-19sna: Check for bpp>=8 before attempting to use memcpy_blt fastpathChris Wilson1-0/+1
2013-07-19sna: Return true from get_drawable_deltas() if the pixmap is offsetChris Wilson4-65/+67
2013-07-19sna: Add a fast path for the most common fallback for CPU-CPU blitsChris Wilson3-7/+46
2013-07-19sna: Remove the duplicated pimxap migration for the composite fb pathChris Wilson1-50/+15
2013-07-19sna: DBG controls to turn off unwinding partial boChris Wilson1-8/+12
2013-07-19sna: Allow operation inplace when wedgedChris Wilson1-5/+6
2013-07-19sna: Treat a source with a CPU bo as being attached.Chris Wilson1-1/+1
2013-07-19sna: Discard overwritten operations before doing a BLT compositeChris Wilson1-4/+21
2013-07-19sna: Tidy a few DBG regarding cached uploadsChris Wilson5-7/+24
2013-07-19sna: Only IGNORE_CPU for blt composite operations if the size is knownChris Wilson1-7/+3
2013-07-19sna: Also do exposure checking after source clipping in sna_do_copyChris Wilson1-20/+13
2013-07-19sna/dri: Return early is the DRI2CopyRegion is not attached to the GPUChris Wilson1-0/+4
2013-07-19sna/dri: Reject invalid DRI2Drawables if STRICT_BLIT is definedChris Wilson1-9/+17
2013-07-19sna/dri: Rearrange some more DBG to come before its assertionChris Wilson1-11/+19
2013-07-19sna/dri: Expose the refcnts in DBG before we hit the assertionsChris Wilson1-2/+25
2013-07-17sna: Wrap cpuid.hChris Wilson4-30/+92