diff options
Diffstat (limited to 'xvmc/shader/mc/read_field_x1y1_uv.g4i')
-rw-r--r-- | xvmc/shader/mc/read_field_x1y1_uv.g4i | 172 |
1 files changed, 172 insertions, 0 deletions
diff --git a/xvmc/shader/mc/read_field_x1y1_uv.g4i b/xvmc/shader/mc/read_field_x1y1_uv.g4i new file mode 100644 index 00000000..162de9a2 --- /dev/null +++ b/xvmc/shader/mc/read_field_x1y1_uv.g4i | |||
@@ -0,0 +1,172 @@ | |||
1 | /* | ||
2 | * Copyright © 2008 Intel Corporation | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice (including the next | ||
12 | * paragraph) shall be included in all copies or substantial portions of the | ||
13 | * Software. | ||
14 | * | ||
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
21 | * SOFTWARE. | ||
22 | * | ||
23 | * Author: | ||
24 | * Zou Nan hai <nanhai.zou@intel.com> | ||
25 | * Zhang Hua jun <huajun.zhang@intel.com> | ||
26 | * Xing Dong sheng <dongsheng.xing@intel.com> | ||
27 | * | ||
28 | */ | ||
29 | mov (1) g115.8<1>UD 0x07000FUD {align1}; | ||
30 | send (16) 0 g86.0<1>UW g115<16,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U | ||
31 | send (16) 0 g91.0<1>UW g115<16,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V | ||
32 | and (1) g2.24<1>UD g115.0<1,1,1>UD 3UD {align1}; | ||
33 | mul (1) g2.24<1>UD g2.24<1,1,1>UD 25UD {align1}; | ||
34 | mov (1) g115.8<1>UD 0x01000FUD {align1}; | ||
35 | add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; | ||
36 | send (16) 0 g90.0<1>UW g115<16,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1}; | ||
37 | send (16) 0 g95.0<1>UW g115<16,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1}; | ||
38 | jmpi g2.24<1,1,1>D; | ||
39 | //U | ||
40 | add (16) g78.0<1>UW g86.0<16,8,1>UB g87.0<16,8,1>UB {align1}; | ||
41 | add (16) g79.0<1>UW g87.0<16,8,1>UB g88.0<16,8,1>UB {align1}; | ||
42 | add (16) g80.0<1>UW g88.0<16,8,1>UB g89.0<16,8,1>UB {align1}; | ||
43 | add (16) g81.0<1>UW g89.0<16,8,1>UB g90.0<16,8,1>UB {align1}; | ||
44 | |||
45 | add (16) g78.0<1>UW g78.0<16,8,1>UW g86.1<16,8,1>UB {align1}; | ||
46 | add (16) g79.0<1>UW g79.0<16,8,1>UW g87.1<16,8,1>UB {align1}; | ||
47 | add (16) g80.0<1>UW g80.0<16,8,1>UW g88.1<16,8,1>UB {align1}; | ||
48 | add (16) g81.0<1>UW g81.0<16,8,1>UW g89.1<16,8,1>UB {align1}; | ||
49 | |||
50 | add (16) g78.0<1>UW g78.0<16,8,1>UW g87.1<16,8,1>UB {align1}; | ||
51 | add (16) g79.0<1>UW g79.0<16,8,1>UW g88.1<16,8,1>UB {align1}; | ||
52 | add (16) g80.0<1>UW g80.0<16,8,1>UW g89.1<16,8,1>UB {align1}; | ||
53 | add (16) g81.0<1>UW g81.0<16,8,1>UW g90.1<16,8,1>UB {align1}; | ||
54 | //V | ||
55 | add (16) g82.0<1>UW g91.0<16,8,1>UB g92.0<16,8,1>UB {align1}; | ||
56 | add (16) g83.0<1>UW g92.0<16,8,1>UB g93.0<16,8,1>UB {align1}; | ||
57 | add (16) g84.0<1>UW g93.0<16,8,1>UB g94.0<16,8,1>UB {align1}; | ||
58 | add (16) g85.0<1>UW g94.0<16,8,1>UB g95.0<16,8,1>UB {align1}; | ||
59 | |||
60 | add (16) g82.0<1>UW g82.0<16,8,1>UW g91.1<16,8,1>UB {align1}; | ||
61 | add (16) g83.0<1>UW g83.0<16,8,1>UW g92.1<16,8,1>UB {align1}; | ||
62 | add (16) g84.0<1>UW g84.0<16,8,1>UW g93.1<16,8,1>UB {align1}; | ||
63 | add (16) g85.0<1>UW g85.0<16,8,1>UW g94.1<16,8,1>UB {align1}; | ||
64 | |||
65 | add (16) g82.0<1>UW g82.0<16,8,1>UW g92.1<16,8,1>UB {align1}; | ||
66 | add (16) g83.0<1>UW g83.0<16,8,1>UW g93.1<16,8,1>UB {align1}; | ||
67 | add (16) g84.0<1>UW g84.0<16,8,1>UW g94.1<16,8,1>UB {align1}; | ||
68 | add (16) g85.0<1>UW g85.0<16,8,1>UW g95.1<16,8,1>UB {align1}; | ||
69 | jmpi out; | ||
70 | //U | ||
71 | add (16) g78.0<1>UW g86.1<16,8,1>UB g87.1<16,8,1>UB {align1}; | ||
72 | add (16) g79.0<1>UW g87.1<16,8,1>UB g88.1<16,8,1>UB {align1}; | ||
73 | add (16) g80.0<1>UW g88.1<16,8,1>UB g89.1<16,8,1>UB {align1}; | ||
74 | add (16) g81.0<1>UW g89.1<16,8,1>UB g90.1<16,8,1>UB {align1}; | ||
75 | |||
76 | add (16) g78.0<1>UW g78.0<16,8,1>UW g86.2<16,8,1>UB {align1}; | ||
77 | add (16) g79.0<1>UW g79.0<16,8,1>UW g87.2<16,8,1>UB {align1}; | ||
78 | add (16) g80.0<1>UW g80.0<16,8,1>UW g88.2<16,8,1>UB {align1}; | ||
79 | add (16) g81.0<1>UW g81.0<16,8,1>UW g89.2<16,8,1>UB {align1}; | ||
80 | |||
81 | add (16) g78.0<1>UW g78.0<16,8,1>UW g87.2<16,8,1>UB {align1}; | ||
82 | add (16) g79.0<1>UW g79.0<16,8,1>UW g88.2<16,8,1>UB {align1}; | ||
83 | add (16) g80.0<1>UW g80.0<16,8,1>UW g89.2<16,8,1>UB {align1}; | ||
84 | add (16) g81.0<1>UW g81.0<16,8,1>UW g90.2<16,8,1>UB {align1}; | ||
85 | //V | ||
86 | add (16) g82.0<1>UW g91.1<16,8,1>UB g92.1<16,8,1>UB {align1}; | ||
87 | add (16) g83.0<1>UW g92.1<16,8,1>UB g93.1<16,8,1>UB {align1}; | ||
88 | add (16) g84.0<1>UW g93.1<16,8,1>UB g94.1<16,8,1>UB {align1}; | ||
89 | add (16) g85.0<1>UW g94.1<16,8,1>UB g95.1<16,8,1>UB {align1}; | ||
90 | |||
91 | add (16) g82.0<1>UW g82.0<16,8,1>UW g91.2<16,8,1>UB {align1}; | ||
92 | add (16) g83.0<1>UW g83.0<16,8,1>UW g92.2<16,8,1>UB {align1}; | ||
93 | add (16) g84.0<1>UW g84.0<16,8,1>UW g93.2<16,8,1>UB {align1}; | ||
94 | add (16) g85.0<1>UW g85.0<16,8,1>UW g94.2<16,8,1>UB {align1}; | ||
95 | |||
96 | add (16) g82.0<1>UW g82.0<16,8,1>UW g92.2<16,8,1>UB {align1}; | ||
97 | add (16) g83.0<1>UW g83.0<16,8,1>UW g93.2<16,8,1>UB {align1}; | ||
98 | add (16) g84.0<1>UW g84.0<16,8,1>UW g94.2<16,8,1>UB {align1}; | ||
99 | add (16) g85.0<1>UW g85.0<16,8,1>UW g95.2<16,8,1>UB {align1}; | ||
100 | jmpi out; | ||
101 | //U | ||
102 | add (16) g78.0<1>UW g86.2<16,8,1>UB g87.2<16,8,1>UB {align1}; | ||
103 | add (16) g79.0<1>UW g87.2<16,8,1>UB g88.2<16,8,1>UB {align1}; | ||
104 | add (16) g80.0<1>UW g88.2<16,8,1>UB g89.2<16,8,1>UB {align1}; | ||
105 | add (16) g81.0<1>UW g89.2<16,8,1>UB g90.2<16,8,1>UB {align1}; | ||
106 | |||
107 | add (16) g78.0<1>UW g78.0<16,8,1>UW g86.3<16,8,1>UB {align1}; | ||
108 | add (16) g79.0<1>UW g79.0<16,8,1>UW g87.3<16,8,1>UB {align1}; | ||
109 | add (16) g80.0<1>UW g80.0<16,8,1>UW g88.3<16,8,1>UB {align1}; | ||
110 | add (16) g81.0<1>UW g81.0<16,8,1>UW g89.3<16,8,1>UB {align1}; | ||
111 | |||
112 | add (16) g78.0<1>UW g78.0<16,8,1>UW g87.3<16,8,1>UB {align1}; | ||
113 | add (16) g79.0<1>UW g79.0<16,8,1>UW g88.3<16,8,1>UB {align1}; | ||
114 | add (16) g80.0<1>UW g80.0<16,8,1>UW g89.3<16,8,1>UB {align1}; | ||
115 | add (16) g81.0<1>UW g81.0<16,8,1>UW g90.3<16,8,1>UB {align1}; | ||
116 | //V | ||
117 | add (16) g82.0<1>UW g91.2<16,8,1>UB g92.2<16,8,1>UB {align1}; | ||
118 | add (16) g83.0<1>UW g92.2<16,8,1>UB g93.2<16,8,1>UB {align1}; | ||
119 | add (16) g84.0<1>UW g93.2<16,8,1>UB g94.2<16,8,1>UB {align1}; | ||
120 | add (16) g85.0<1>UW g94.2<16,8,1>UB g95.2<16,8,1>UB {align1}; | ||
121 | |||
122 | add (16) g82.0<1>UW g82.0<16,8,1>UW g91.3<16,8,1>UB {align1}; | ||
123 | add (16) g83.0<1>UW g83.0<16,8,1>UW g92.3<16,8,1>UB {align1}; | ||
124 | add (16) g84.0<1>UW g84.0<16,8,1>UW g93.3<16,8,1>UB {align1}; | ||
125 | add (16) g85.0<1>UW g85.0<16,8,1>UW g94.3<16,8,1>UB {align1}; | ||
126 | |||
127 | add (16) g82.0<1>UW g82.0<16,8,1>UW g92.3<16,8,1>UB {align1}; | ||
128 | add (16) g83.0<1>UW g83.0<16,8,1>UW g93.3<16,8,1>UB {align1}; | ||
129 | add (16) g84.0<1>UW g84.0<16,8,1>UW g94.3<16,8,1>UB {align1}; | ||
130 | add (16) g85.0<1>UW g85.0<16,8,1>UW g95.3<16,8,1>UB {align1}; | ||
131 | jmpi out; | ||
132 | //U | ||
133 | add (16) g78.0<1>UW g86.3<16,8,1>UB g87.3<16,8,1>UB {align1}; | ||
134 | add (16) g79.0<1>UW g87.3<16,8,1>UB g88.3<16,8,1>UB {align1}; | ||
135 | add (16) g80.0<1>UW g88.3<16,8,1>UB g89.3<16,8,1>UB {align1}; | ||
136 | add (16) g81.0<1>UW g89.3<16,8,1>UB g90.3<16,8,1>UB {align1}; | ||
137 | |||
138 | add (16) g78.0<1>UW g78.0<16,8,1>UW g86.4<16,8,1>UB {align1}; | ||
139 | add (16) g79.0<1>UW g79.0<16,8,1>UW g87.4<16,8,1>UB {align1}; | ||
140 | add (16) g80.0<1>UW g80.0<16,8,1>UW g88.4<16,8,1>UB {align1}; | ||
141 | add (16) g81.0<1>UW g81.0<16,8,1>UW g89.4<16,8,1>UB {align1}; | ||
142 | |||
143 | add (16) g78.0<1>UW g78.0<16,8,1>UW g87.4<16,8,1>UB {align1}; | ||
144 | add (16) g79.0<1>UW g79.0<16,8,1>UW g88.4<16,8,1>UB {align1}; | ||
145 | add (16) g80.0<1>UW g80.0<16,8,1>UW g89.4<16,8,1>UB {align1}; | ||
146 | add (16) g81.0<1>UW g81.0<16,8,1>UW g90.4<16,8,1>UB {align1}; | ||
147 | //V | ||
148 | add (16) g82.0<1>UW g91.3<16,8,1>UB g92.3<16,8,1>UB {align1}; | ||
149 | add (16) g83.0<1>UW g92.3<16,8,1>UB g93.3<16,8,1>UB {align1}; | ||
150 | add (16) g84.0<1>UW g93.3<16,8,1>UB g94.3<16,8,1>UB {align1}; | ||
151 | add (16) g85.0<1>UW g94.3<16,8,1>UB g95.3<16,8,1>UB {align1}; | ||
152 | |||
153 | add (16) g82.0<1>UW g82.0<16,8,1>UW g91.4<16,8,1>UB {align1}; | ||
154 | add (16) g83.0<1>UW g83.0<16,8,1>UW g92.4<16,8,1>UB {align1}; | ||
155 | add (16) g84.0<1>UW g84.0<16,8,1>UW g93.4<16,8,1>UB {align1}; | ||
156 | add (16) g85.0<1>UW g85.0<16,8,1>UW g94.4<16,8,1>UB {align1}; | ||
157 | |||
158 | add (16) g82.0<1>UW g82.0<16,8,1>UW g92.4<16,8,1>UB {align1}; | ||
159 | add (16) g83.0<1>UW g83.0<16,8,1>UW g93.4<16,8,1>UB {align1}; | ||
160 | add (16) g84.0<1>UW g84.0<16,8,1>UW g94.4<16,8,1>UB {align1}; | ||
161 | add (16) g85.0<1>UW g85.0<16,8,1>UW g95.4<16,8,1>UB {align1}; | ||
162 | |||
163 | out: | ||
164 | shr.sat (16) g78.0<1>UW g78.0<16,16,1>UW 2UW {align1}; | ||
165 | shr.sat (16) g79.0<1>UW g79.0<16,16,1>UW 2UW {align1}; | ||
166 | shr.sat (16) g80.0<1>UW g80.0<16,16,1>UW 2UW {align1}; | ||
167 | shr.sat (16) g81.0<1>UW g81.0<16,16,1>UW 2UW {align1}; | ||
168 | shr.sat (16) g82.0<1>UW g82.0<16,16,1>UW 2UW {align1}; | ||
169 | shr.sat (16) g83.0<1>UW g83.0<16,16,1>UW 2UW {align1}; | ||
170 | shr.sat (16) g84.0<1>UW g84.0<16,16,1>UW 2UW {align1}; | ||
171 | shr.sat (16) g85.0<1>UW g85.0<16,16,1>UW 2UW {align1}; | ||
172 | |||