diff options
| author | Hong Liu <hong.liu@intel.com> | 2008-02-28 13:51:18 +0800 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@hobbes.virtuousgeek.org> | 2008-03-04 13:28:50 -0800 |
| commit | d767eabe534be7f7bdcbf00614a8901124ac911f (patch) | |
| tree | f957075705e8a4fe264b77ff7eeec0b0fcd0ddb0 | |
| parent | 4936e097028b91f4bdc2d9101dc49f6fe586e718 (diff) | |
Fix DPLL programming in CRTC mode set
The following patch fixes the display problem on internal development machines.
The code in commit 3c22ed633be2ac96eea7bc533839e956f1f31b84 (Jesse's force pipe
A enable patch) broke DPLL programming. Moving the DPLL set back up in the
function solves the problem.
Fix for internal bug #309.
| -rw-r--r-- | src/i830_display.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/i830_display.c b/src/i830_display.c index 86992acb..712a40db 100644 --- a/src/i830_display.c +++ b/src/i830_display.c @@ -1281,6 +1281,14 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, i830PrintPll("chosen", &clock); } + if (dpll & DPLL_VCO_ENABLE) + { + OUTREG(fp_reg, fp); + OUTREG(dpll_reg, dpll & ~DPLL_VCO_ENABLE); + POSTING_READ(dpll_reg); + usleep(150); + } + /* The LVDS pin pair needs to be on before the DPLLs are enabled. * This is an exception to the general rule that mode_set doesn't turn * things on. @@ -1289,14 +1297,6 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, { CARD32 lvds = INREG(LVDS); - if (dpll & DPLL_VCO_ENABLE) - { - OUTREG(fp_reg, fp); - OUTREG(dpll_reg, dpll & ~DPLL_VCO_ENABLE); - POSTING_READ(dpll_reg); - usleep(150); - } - lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT; /* Set the B0-B3 data pairs corresponding to whether we're going to * set the DPLLs for dual-channel mode or not. |