From 8a63c956592ee31c6fa121a5090f1cbc3fe3814a Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 16 Jun 2004 09:23:00 +0000 Subject: DRI XFree86-4_3_99_12-merge import --- man/chips.man | 10 ++--- src/ct_BlitMM.h | 2 +- src/ct_Blitter.h | 2 +- src/ct_BltHiQV.h | 2 +- src/ct_accel.c | 5 +-- src/ct_bank.c | 9 ++-- src/ct_cursor.c | 2 +- src/ct_ddc.c | 2 +- src/ct_dga.c | 2 +- src/ct_driver.c | 129 +++++++++++++++++++++++-------------------------------- src/ct_driver.h | 3 +- src/ct_regs.c | 26 +++++++---- src/ct_shadow.c | 2 +- src/ct_video.c | 52 ++++++++++------------ util/AsmMacros.h | 2 +- util/dRegs.c | 2 +- util/mRegs.c | 2 +- util/modClock.c | 2 +- 18 files changed, 113 insertions(+), 143 deletions(-) diff --git a/man/chips.man b/man/chips.man index 4647d41..ad05ba6 100644 --- a/man/chips.man +++ b/man/chips.man @@ -1,4 +1,4 @@ -.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/chips.man,v 1.4 2001/12/17 20:52:32 dawes Exp $ +.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/chips.man,v 1.5 2002/01/04 21:22:27 tsi Exp $ .\" shorthand for double quote that works everywhere. .ds q \N'34' .TH CHIPS __drivermansuffix__ __vendorversion__ @@ -14,7 +14,7 @@ chips \- Chips and Technologies video driver .fi .SH DESCRIPTION .B chips -is an __xservername__ driver for Chips and Technologies video processors. The majority +is an XFree86 driver for Chips and Technologies video processors. The majority of the Chips and Technologies chipsets are supported by this driver. In general the limitation on the capabilities of this driver are determined by the chipset on which it is run. Where possible, this driver provides full @@ -77,7 +77,7 @@ Color depths 1, 4, 8, 15, 16, 24 and 8+16 are supported on all chipsets. The DirectColor visual is supported on all color depths except the 8+16 overlay mode. Full acceleration is supplied for all chipsets. .SH CONFIGURATION DETAILS -Please refer to __xconfigfile__(__filemansuffix__) for general configuration +Please refer to XF86Config(__filemansuffix__) for general configuration details. This section only covers configuration details specific to this driver. .PP @@ -206,10 +206,10 @@ off by default. Using this option forces the use of an independent refresh rate on the two screens. Default: off. .SH "SEE ALSO" -__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), xorgconfig(__appmansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__) +XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__) .PP You are also recommended to read the README.chips file that comes with all -__xservername__ distributions, which discusses the +XFree86 distributions, which discusses the .B chips driver in more detail. .SH AUTHORS diff --git a/src/ct_BlitMM.h b/src/ct_BlitMM.h index fb1c4e7..7660241 100644 --- a/src/ct_BlitMM.h +++ b/src/ct_BlitMM.h @@ -4,7 +4,7 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BlitMM.h,v 1.3 1998/08/20 08:55:56 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BlitMM.h,v 1.5 2002/11/25 14:04:58 eich Exp $ */ /* Definitions for the Chips and Technology BitBLT engine communication. */ /* These are done using Memory Mapped IO, of the registers */ diff --git a/src/ct_Blitter.h b/src/ct_Blitter.h index 65b0989..ecb84f1 100644 --- a/src/ct_Blitter.h +++ b/src/ct_Blitter.h @@ -4,7 +4,7 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_Blitter.h,v 1.3 1998/08/29 05:43:06 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_Blitter.h,v 1.4 2002/01/25 21:55:58 tsi Exp $ */ /* Definitions for the Chips and Technology BitBLT engine communication. */ /* registers */ diff --git a/src/ct_BltHiQV.h b/src/ct_BltHiQV.h index b40df72..6f135bd 100644 --- a/src/ct_BltHiQV.h +++ b/src/ct_BltHiQV.h @@ -4,7 +4,7 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BltHiQV.h,v 1.10 2000/12/06 15:35:12 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BltHiQV.h,v 1.12 2002/11/25 14:04:58 eich Exp $ */ /* Definitions for the Chips and Technology BitBLT engine communication. */ /* These are done using Memory Mapped IO, of the registers */ diff --git a/src/ct_accel.c b/src/ct_accel.c index 6309074..d936291 100644 --- a/src/ct_accel.c +++ b/src/ct_accel.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_accel.c,v 1.40tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_accel.c,v 1.40 2002/11/25 14:04:58 eich Exp $ */ /* * Copyright 1996, 1997, 1998 by David Bateman * Modified 1997, 1998 by Nozomi Ytow @@ -248,11 +248,8 @@ CTNAME(AccelInit)(ScreenPtr pScreen) * then used by a CopyArea function with a complex ROP. */ infoPtr->SubsequentSolidFillRect = CTNAME(24SubsequentSolidFillRect); -#if 0 - /* How can an unsigned quantity be less than zero? */ if (cAcl->ScratchAddress < 0) infoPtr->ScreenToScreenCopyFlags |= GXCOPY_ONLY; -#endif #endif break; #ifdef CHIPS_HIQV diff --git a/src/ct_bank.c b/src/ct_bank.c index 3be2776..1e478ee 100644 --- a/src/ct_bank.c +++ b/src/ct_bank.c @@ -53,14 +53,11 @@ /* Driver specific headers */ #include "ct_driver.h" -#if defined(__arm32__) && defined(__NetBSD__) -#include +#ifdef __arm32__ +/*#include */ #define arm32_drain_writebuf() sysarch(1, 0) -#elif defined(__arm32__) -#define arm32_drain_writebuf() -#endif - #define ChipsBank(pScreen) CHIPSPTR(xf86Screens[pScreen->myNum])->Bank +#endif #ifdef DIRECT_REGISTER_ACCESS int diff --git a/src/ct_cursor.c b/src/ct_cursor.c index 147469c..55b56a3 100644 --- a/src/ct_cursor.c +++ b/src/ct_cursor.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_cursor.c,v 1.24 2001/10/01 13:44:03 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_cursor.c,v 1.28 2003/07/17 08:19:34 eich Exp $ */ /* * Copyright 1994 The XFree86 Project diff --git a/src/ct_ddc.c b/src/ct_ddc.c index 3cc8dfe..0286685 100644 --- a/src/ct_ddc.c +++ b/src/ct_ddc.c @@ -39,7 +39,7 @@ chips_ddc1(ScrnInfoPtr pScrn) { unsigned char FR0B, FR0C, XR62; unsigned char mask_c = 0x00; - unsigned char val, tmp_val = 0; + unsigned char val, tmp_val; int i; CHIPSPtr cPtr = CHIPSPTR(pScrn); diff --git a/src/ct_dga.c b/src/ct_dga.c index 7cc3575..3d0fe26 100644 --- a/src/ct_dga.c +++ b/src/ct_dga.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_dga.c,v 1.3tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_dga.c,v 1.5 2002/11/25 14:04:58 eich Exp $ */ #include "xf86.h" #include "xf86_OSproc.h" diff --git a/src/ct_driver.c b/src/ct_driver.c index 65d833c..87ece8b 100644 --- a/src/ct_driver.c +++ b/src/ct_driver.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c,v 1.132tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c,v 1.128 2003/08/23 16:09:15 dawes Exp $ */ /* * Copyright 1993 by Jon Block @@ -142,7 +142,7 @@ static Bool CHIPSEnterVT(int scrnIndex, int flags); static void CHIPSLeaveVT(int scrnIndex, int flags); static Bool CHIPSCloseScreen(int scrnIndex, ScreenPtr pScreen); static void CHIPSFreeScreen(int scrnIndex, int flags); -static ModeStatus CHIPSValidMode(int scrnIndex, DisplayModePtr mode, +static int CHIPSValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags); static Bool CHIPSSaveScreen(ScreenPtr pScreen, int mode); @@ -158,8 +158,7 @@ static void chipsLock(ScrnInfoPtr pScrn); static void chipsUnlock(ScrnInfoPtr pScrn); static void chipsClockSave(ScrnInfoPtr pScrn, CHIPSClockPtr Clock); static void chipsClockLoad(ScrnInfoPtr pScrn, CHIPSClockPtr Clock); -static Bool chipsClockFind(ScrnInfoPtr pScrn, DisplayModePtr mode, - int no, CHIPSClockPtr Clock); +static Bool chipsClockFind(ScrnInfoPtr pScrn, int no, CHIPSClockPtr Clock); static void chipsCalcClock(ScrnInfoPtr pScrn, int Clock, unsigned char *vclk); static int chipsGetHWClock(ScrnInfoPtr pScrn); @@ -582,7 +581,7 @@ static const OptionInfoRec Chips655xxOptions[] = { { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_STN, "STN", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_USE_MODELINE, "UseModeline", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_LCD_STRETCH, "Stretch", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_LCD_STRETCH, "NoStretch", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_LCD_CENTER, "LcdCenter", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_MMIO, "MMIO", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_SUSPEND_HACK, "SuspendHack", OPTV_BOOLEAN, {0}, FALSE }, @@ -624,7 +623,7 @@ static const OptionInfoRec ChipsHiQVOptions[] = { { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_STN, "STN", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_USE_MODELINE, "UseModeline", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_LCD_STRETCH, "Stretch", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_LCD_STRETCH, "NoStretch", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_LCD_CENTER, "LcdCenter", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_MMIO, "MMIO", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_FULL_MMIO, "FullMMIO", OPTV_BOOLEAN, {0}, FALSE }, @@ -749,7 +748,7 @@ static XF86ModuleVersionInfo chipsVersRec = MODULEVENDORSTRING, MODINFOSTRING1, MODINFOSTRING2, - XORG_VERSION_CURRENT, + XF86_VERSION_CURRENT, CHIPS_MAJOR_VERSION, CHIPS_MINOR_VERSION, CHIPS_PATCHLEVEL, ABI_CLASS_VIDEODRV, ABI_VIDEODRV_VERSION, @@ -1559,7 +1558,7 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags) xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Enabling linear addressing\n"); xf86DrvMsg(pScrn->scrnIndex, from, - "base address is set at 0x%lX.\n", cPtr->FbAddress); + "base address is set at 0x%X.\n", cPtr->FbAddress); cPtr->IOAddress = cPtr->FbAddress + 0x400000L; } else xf86DrvMsg(pScrn->scrnIndex, from, @@ -1770,12 +1769,10 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags) case CHIPS_CT69030: /* The ct69030 has 4Mb of SGRAM integrated */ pScrn->videoRam = 4096; - cPtr->Flags |= Chips64BitMemory; break; case CHIPS_CT69000: /* The ct69000 has 2Mb of SGRAM integrated */ pScrn->videoRam = 2048; - cPtr->Flags |= Chips64BitMemory; break; case CHIPS_CT65550: /* XR43: DRAM interface */ @@ -1824,13 +1821,6 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags) pScrn->videoRam = 1024; break; } - /* XR43: DRAM interface */ - /* bit 4-5 mem interface width */ - /* 00: 32Bit */ - /* 01: 64Bit */ - tmp = cPtr->readXR(cPtr, 0x43); - if ((tmp & 0x10) == 0x10) - cPtr->Flags |= Chips64BitMemory; break; } } @@ -1841,8 +1831,6 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags) * This takes gives either half or the amount of memory specified * with the Crt2Memory option */ - pScrn->memPhysBase = cPtr->FbAddress; - if(cPtr->SecondCrtc == FALSE) { int crt2mem = -1, adjust; @@ -1865,15 +1853,12 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags) cPtr->FbMapSize = cPtrEnt->masterFbMapSize = pScrn->videoRam * 1024; cPtrEnt->slaveFbMapSize = cPtrEnt->slavevideoRam * 1024; - pScrn->fbOffset = 0; } else { cPtrEnt->slaveFbAddress = cPtr->FbAddress + - cPtrEnt->masterFbMapSize; + cPtrEnt->masterFbAddress; cPtr->FbMapSize = cPtrEnt->slaveFbMapSize; pScrn->videoRam = cPtrEnt->slavevideoRam; - pScrn->fbOffset = cPtrEnt->masterFbMapSize; } - cPtrEnt->refCount++; } else { /* Normal Handling of video ram etc */ @@ -2251,27 +2236,26 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags) cPtr->ClockMulFactor = 1; - /* Set the min/max pixel clock */ + /* Set the min pixel clock */ + cPtr->MinClock = 11000; /* XXX Guess, need to check this */ + xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock is %7.3f MHz\n", + (float)(cPtr->MinClock / 1000.)); + /* Set the max pixel clock */ switch (cPtr->Chipset) { case CHIPS_CT69030: - cPtr->MinClock = 3000; cPtr->MaxClock = 170000; break; case CHIPS_CT69000: - cPtr->MinClock = 3000; cPtr->MaxClock = 135000; break; case CHIPS_CT68554: case CHIPS_CT65555: - cPtr->MinClock = 1000; cPtr->MaxClock = 110000; break; case CHIPS_CT65554: - cPtr->MinClock = 1000; cPtr->MaxClock = 95000; break; case CHIPS_CT65550: - cPtr->MinClock = 1000; if (((cPtr->readXR(cPtr, 0x04)) & 0xF) < 6) { if ((cPtr->readFR(cPtr, 0x0A)) & 2) { /*5V Vcc */ @@ -2284,15 +2268,13 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags) cPtr->MaxClock = 95000; /* Revision B */ break; } - xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock is %7.3f MHz\n", - (float)(cPtr->MinClock / 1000.)); /* Check if maxClock is limited by the MemClk. Only 70% to allow for */ /* RAS/CAS. Extra byte per memory clock needed if framebuffer used */ /* Extra byte if the overlay plane is activated */ - /* If flag Chips64BitMemory is set assume a 64bitmemory interface, */ - /* and 32bits on the others. Thus multiply by a suitable factor */ - if (cPtr->Flags & Chips64BitMemory) { + /* We have a 64bit wide memory bus on the 69030 and 69000, and 32bits */ + /* on the others. Thus multiply by a suitable factor */ + if ((cPtr->Chipset == CHIPS_CT69030) || (cPtr->Chipset == CHIPS_CT69000)) { if (cPtr->FrameBufferSize && (cPtr->PanelType & ChipsLCD)) if (cPtr->Flags & ChipsOverlay8plus16 ) cPtr->MaxClock = min(cPtr->MaxClock, MemClk->Clk * 8 * 0.7 / 4); @@ -2637,7 +2619,7 @@ chipsPreInitWingine(ScrnInfoPtr pScrn, int flags) xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Enabling linear addressing\n"); xf86DrvMsg(pScrn->scrnIndex, from, - "base address is set at 0x%lX.\n", cPtr->FbAddress); + "base address is set at 0x%X.\n", cPtr->FbAddress); if (xf86ReturnOptValBool(cPtr->Options, OPTION_MMIO, FALSE) && (cPtr->Flags & ChipsMMIOSupport)) { cPtr->UseMMIO = TRUE; @@ -3125,7 +3107,7 @@ chipsPreInit655xx(ScrnInfoPtr pScrn, int flags) xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Enabling linear addressing\n"); xf86DrvMsg(pScrn->scrnIndex, from, - "base address is set at 0x%lX.\n", cPtr->FbAddress); + "base address is set at 0x%X.\n", cPtr->FbAddress); if (xf86ReturnOptValBool(cPtr->Options, OPTION_MMIO, FALSE) && (cPtr->Flags & ChipsMMIOSupport)) { cPtr->UseMMIO = TRUE; @@ -3257,7 +3239,7 @@ chipsPreInit655xx(ScrnInfoPtr pScrn, int flags) Size->HRetraceStart = ((tmp + ((xr17 & 0x04) << 9)) + 1) << 3; tmp1 = cPtr->readXR(cPtr, 0x1A); tmp2 = (tmp1 & 0x1F) + ((xr17 & 0x08) << 2) - (tmp & 0x3F); - Size->HRetraceEnd = ((((tmp2 & 0x080u) ? (tmp2 + 0x40) : tmp2) << 3) + Size->HRetraceEnd = ((((tmp2 < 0) ? (tmp2 + 0x40) : tmp2) << 3) + Size->HRetraceStart); tmp1 = cPtr->readXR(cPtr, 0x65); tmp = cPtr->readXR(cPtr, 0x68); @@ -4354,7 +4336,14 @@ CHIPSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) if (cPtr->Flags & ChipsDPMSSupport) xf86DPMSInit(pScreen, (DPMSSetProcPtr)chipsDisplayPowerManagementSet, 0); - + +#if 0 /* #### Shouldn't be needed */ + /* Dual head, needs to fix framebuffer memory address */ + if ((cPtr->Flags & ChipsDualChannelSupport) && + (cPtr->SecondCrtc == TRUE)) + pScrn->memPhysBase = cPtr->FbAddress + cPtrEnt->masterFbMapSize; +#endif + /* Wrap the current CloseScreen function */ cPtr->CloseScreen = pScreen->CloseScreen; pScreen->CloseScreen = CHIPSCloseScreen; @@ -4542,7 +4531,7 @@ CHIPSFreeScreen(int scrnIndex, int flags) } /* Optional */ -static ModeStatus +static int CHIPSValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags) { ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; @@ -4702,7 +4691,7 @@ chipsClockSelect(ScrnInfoPtr pScrn, int no) break; default: - if (!chipsClockFind(pScrn, NULL, no, &TmpClock)) + if (!chipsClockFind(pScrn, no, &TmpClock)) return (FALSE); chipsClockLoad(pScrn, &TmpClock); } @@ -4783,8 +4772,7 @@ chipsClockSave(ScrnInfoPtr pScrn, CHIPSClockPtr Clock) } static Bool -chipsClockFind(ScrnInfoPtr pScrn, DisplayModePtr mode, - int no, CHIPSClockPtr Clock ) +chipsClockFind(ScrnInfoPtr pScrn, int no, CHIPSClockPtr Clock) { vgaHWPtr hwp = VGAHWPTR(pScrn); CHIPSPtr cPtr = CHIPSPTR(pScrn); @@ -4804,9 +4792,9 @@ chipsClockFind(ScrnInfoPtr pScrn, DisplayModePtr mode, case HiQV_STYLE: Clock->msr = cPtr->CRTclkInx << 2; Clock->fr03 = cPtr->FPclkInx << 2; - Clock->Clock = mode ? mode->Clock : 0; + Clock->Clock = pScrn->currentMode->Clock; if (xf86ReturnOptValBool(cPtr->Options, OPTION_USE_MODELINE, FALSE)) { - Clock->FPClock = mode ? mode->Clock : 0; + Clock->FPClock = pScrn->currentMode->Clock; } else Clock->FPClock = cPtr->FPclock; break; @@ -4845,7 +4833,7 @@ chipsClockFind(ScrnInfoPtr pScrn, DisplayModePtr mode, if ((cPtr->PanelType & ChipsLCD) && cPtr->FPclock) Clock->Clock = cPtr->FPclock; else - Clock->Clock = mode ? mode->SynthClock : 0; + Clock->Clock = pScrn->currentMode->SynthClock; } break; case OLD_STYLE: @@ -4870,7 +4858,7 @@ chipsClockFind(ScrnInfoPtr pScrn, DisplayModePtr mode, } else { Clock->msr = 3 << 2; Clock->xr33 = 0; - Clock->Clock = mode ? mode->SynthClock : 0; + Clock->Clock = pScrn->currentMode->SynthClock; } break; } @@ -5081,10 +5069,7 @@ chipsCalcClock(ScrnInfoPtr pScrn, int Clock, unsigned char *vclk) int M, N, P = 0, PSN = 0, PSNx = 0; int bestM = 0, bestN = 0, bestP = 0, bestPSN = 0; - double abest = 42; -#ifdef DEBUG - double bestFout = 0; -#endif + double bestError, abest = 42, bestFout = 0; double target; double Fvco, Fout; @@ -5192,13 +5177,12 @@ chipsCalcClock(ScrnInfoPtr pScrn, int Clock, unsigned char *vclk) aerror = (error < 0) ? -error : error; if (aerror < abest) { abest = aerror; + bestError = error; bestM = M; bestN = N; bestP = P; bestPSN = PSN; -#ifdef DEBUG bestFout = Fout; -#endif } } } @@ -5387,7 +5371,7 @@ chipsModeInitHiQV(ScrnInfoPtr pScrn, DisplayModePtr mode) pScrn->vtSema = TRUE; /* init clock */ - if (!chipsClockFind(pScrn, mode, mode->ClockIndex, &ChipsNew->Clock)) { + if (!chipsClockFind(pScrn, mode->ClockIndex, &ChipsNew->Clock)) { ErrorF("bomb 2\n"); return (FALSE); } @@ -5595,7 +5579,7 @@ chipsModeInitHiQV(ScrnInfoPtr pScrn, DisplayModePtr mode) /* centering/stretching */ if (!xf86ReturnOptValBool(cPtr->Options, OPTION_SUSPEND_HACK, FALSE)) { - if (!xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_STRETCH, FALSE) || + if (xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_STRETCH, FALSE) || (cPtr->Flags & ChipsOverlay8plus16)) { ChipsNew->FR[0x40] &= 0xDF; /* Disable Horizontal stretching */ ChipsNew->FR[0x48] &= 0xFB; /* Disable vertical stretching */ @@ -5616,7 +5600,7 @@ chipsModeInitHiQV(ScrnInfoPtr pScrn, DisplayModePtr mode) } } - if ((xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_CENTER, TRUE)) + if ((xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_CENTER, FALSE)) || (cPtr->Flags & ChipsOverlay8plus16)) { ChipsNew->FR[0x40] |= 0x3; /* Enable Horizontal centering */ ChipsNew->FR[0x48] |= 0x3; /* Enable Vertical centering */ @@ -5771,16 +5755,12 @@ chipsModeInitHiQV(ScrnInfoPtr pScrn, DisplayModePtr mode) - (ChipsNew->FR[0x31] & 0xF0) - (ChipsNew->FR[0x32] & 0x0F) - ((ChipsNew->FR[0x35] & 0xF0) << 4)); - if (!xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_STRETCH, FALSE) - && xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_CENTER, TRUE)) - { - if (cPtr->PanelSize.HDisplay > mode->CrtcHDisplay) - cPtr->OverlaySkewX += (cPtr->PanelSize.HDisplay - - mode->CrtcHDisplay) / 2; - if (cPtr->PanelSize.VDisplay > mode->CrtcVDisplay) - cPtr->OverlaySkewY += (cPtr->PanelSize.VDisplay - - mode->CrtcVDisplay) / 2; - } + if (cPtr->PanelSize.HDisplay > mode->CrtcHDisplay) + cPtr->OverlaySkewX += (cPtr->PanelSize.HDisplay - + mode->CrtcHDisplay) / 2; + if (cPtr->PanelSize.VDisplay > mode->CrtcVDisplay) + cPtr->OverlaySkewY += (cPtr->PanelSize.VDisplay - + mode->CrtcVDisplay) / 2; } else { cPtr->OverlaySkewX = mode->CrtcHTotal - mode->CrtcHBlankStart - 9; cPtr->OverlaySkewY = mode->CrtcVTotal - mode->CrtcVSyncEnd - 1; @@ -5996,7 +5976,7 @@ chipsModeInitWingine(ScrnInfoPtr pScrn, DisplayModePtr mode) pScrn->vtSema = TRUE; /* init clock */ - if (!chipsClockFind(pScrn, mode, mode->ClockIndex, &ChipsNew->Clock)) { + if (!chipsClockFind(pScrn, mode->ClockIndex, &ChipsNew->Clock)) { ErrorF("bomb 4\n"); return (FALSE); } @@ -6238,7 +6218,7 @@ chipsModeInit655xx(ScrnInfoPtr pScrn, DisplayModePtr mode) pScrn->vtSema = TRUE; /* init clock */ - if (!chipsClockFind(pScrn, mode, mode->ClockIndex, &ChipsNew->Clock)) { + if (!chipsClockFind(pScrn, mode->ClockIndex, &ChipsNew->Clock)) { ErrorF("bomb 6\n"); return (FALSE); } @@ -6448,15 +6428,12 @@ chipsModeInit655xx(ScrnInfoPtr pScrn, DisplayModePtr mode) ChipsNew->XR[0x51] |= 0x40; /* enable FP compensation */ ChipsNew->XR[0x55] |= 0x01; /* enable horiz. compensation */ ChipsNew->XR[0x57] |= 0x01; /* enable horiz. compensation */ - if (!xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_STRETCH, + if (xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_STRETCH, FALSE)) { if (mode->CrtcHDisplay < 1489) /* HWBug */ - ChipsNew->XR[0x55] |= 0x02; /* enable auto h-centering */ - else { - ChipsNew->XR[0x55] &= 0xFD; /* disable auto h-centering */ - if (pScrn->bitsPerPixel == 24) /* ? */ - ChipsNew->XR[0x56] = (lcdHDisplay - CrtcHDisplay) >> 1; - } + ChipsNew->XR[0x55] |= 0x02; /* enable h-centering */ + else if (pScrn->bitsPerPixel == 24) + ChipsNew->XR[0x56] = (lcdHDisplay - CrtcHDisplay) >> 1; } else { ChipsNew->XR[0x55] &= 0xFD; /* disable h-centering */ ChipsNew->XR[0x56] = 0; @@ -6637,9 +6614,9 @@ chipsModeInit655xx(ScrnInfoPtr pScrn, DisplayModePtr mode) } if (cPtr->PanelType & ChipsLCD) - ChipsNew->XR[0x51] |= 0x04; + ChipsNew->XR[0x51] |= 0x02; else - ChipsNew->XR[0x51] &= ~0x04; + ChipsNew->XR[0x51] &= ~0x02; /* Program the registers */ /*vgaHWProtect(pScrn, TRUE);*/ diff --git a/src/ct_driver.h b/src/ct_driver.h index 293c32f..831ac9b 100644 --- a/src/ct_driver.h +++ b/src/ct_driver.h @@ -22,7 +22,7 @@ * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.h,v 1.33 2001/10/01 13:44:04 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.h,v 1.34 2002/01/25 21:56:00 tsi Exp $ */ #ifndef _CT_DRIVER_H_ @@ -108,7 +108,6 @@ typedef struct { #define ChipsVideoSupport 0x00000100 #define ChipsDualChannelSupport 0x00000200 #define ChipsDualRefresh 0x00000400 -#define Chips64BitMemory 0x00000800 /* Options flags for the C&T chipsets */ #define ChipsHWCursor 0x00001000 diff --git a/src/ct_regs.c b/src/ct_regs.c index b7a7199..201ac5c 100644 --- a/src/ct_regs.c +++ b/src/ct_regs.c @@ -19,7 +19,7 @@ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_regs.c,v 1.8tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_regs.c,v 1.8 2002/01/25 21:56:00 tsi Exp $ */ /* * The functions in this file are used to read/write the C&T extension register @@ -361,15 +361,17 @@ chipsMmioReadSeq(vgaHWPtr hwp, CARD8 index) static void chipsMmioWriteAttr(vgaHWPtr hwp, CARD8 index, CARD8 value) { + CARD8 tmp; + if (hwp->paletteEnabled) index &= ~0x20; else index |= 0x20; if (hwp->IOBase == VGA_IOBASE_MONO) - (void) minb(CHIPS_MMIO_MONO_STAT_1); + tmp = minb(CHIPS_MMIO_MONO_STAT_1); else - (void) minb(CHIPS_MMIO_COLOR_STAT_1); + tmp = minb(CHIPS_MMIO_COLOR_STAT_1); moutb(CHIPS_MMIO_ATTR_INDEX, index); moutb(CHIPS_MMIO_ATTR_DATA_W, value); } @@ -377,15 +379,17 @@ chipsMmioWriteAttr(vgaHWPtr hwp, CARD8 index, CARD8 value) static CARD8 chipsMmioReadAttr(vgaHWPtr hwp, CARD8 index) { + CARD8 tmp; + if (hwp->paletteEnabled) index &= ~0x20; else index |= 0x20; if (hwp->IOBase == VGA_IOBASE_MONO) - (void) minb(CHIPS_MMIO_MONO_STAT_1); + tmp = minb(CHIPS_MMIO_MONO_STAT_1); else - (void) minb(CHIPS_MMIO_COLOR_STAT_1); + tmp = minb(CHIPS_MMIO_COLOR_STAT_1); moutb(CHIPS_MMIO_ATTR_INDEX, index); return minb(CHIPS_MMIO_ATTR_DATA_R); } @@ -405,10 +409,12 @@ chipsMmioReadMiscOut(vgaHWPtr hwp) static void chipsMmioEnablePalette(vgaHWPtr hwp) { + CARD8 tmp; + if (hwp->IOBase == VGA_IOBASE_MONO) - (void) minb(CHIPS_MMIO_MONO_STAT_1); + tmp = minb(CHIPS_MMIO_MONO_STAT_1); else - (void) minb(CHIPS_MMIO_COLOR_STAT_1); + tmp = minb(CHIPS_MMIO_COLOR_STAT_1); moutb(CHIPS_MMIO_ATTR_INDEX, 0x00); hwp->paletteEnabled = TRUE; } @@ -416,10 +422,12 @@ chipsMmioEnablePalette(vgaHWPtr hwp) static void chipsMmioDisablePalette(vgaHWPtr hwp) { + CARD8 tmp; + if (hwp->IOBase == VGA_IOBASE_MONO) - (void) minb(CHIPS_MMIO_MONO_STAT_1); + tmp = minb(CHIPS_MMIO_MONO_STAT_1); else - (void) minb(CHIPS_MMIO_COLOR_STAT_1); + tmp = minb(CHIPS_MMIO_COLOR_STAT_1); moutb(CHIPS_MMIO_ATTR_INDEX, 0x20); hwp->paletteEnabled = FALSE; } diff --git a/src/ct_shadow.c b/src/ct_shadow.c index 98bdb8f..ecbb642 100644 --- a/src/ct_shadow.c +++ b/src/ct_shadow.c @@ -1,4 +1,4 @@ -/* $XFree86: Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_shadow.c,v 1.1 2000/02/08 13:13:13 eich Exp $ */ #include "xf86.h" #include "xf86_OSproc.h" diff --git a/src/ct_video.c b/src/ct_video.c index 9ff9c13..4c560fa 100644 --- a/src/ct_video.c +++ b/src/ct_video.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_video.c,v 1.16tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_video.c,v 1.15 2003/07/17 08:19:35 eich Exp $ */ #include "xf86.h" #include "xf86_OSproc.h" @@ -267,11 +267,12 @@ CHIPSSetupImageVideo(ScreenPtr pScreen) pPriv->colorKey = cPtr->videoKey; pPriv->videoStatus = 0; + pPriv->doubleBuffer = TRUE; pPriv->manualDoubleBuffer = FALSE; pPriv->currentBuffer = 0; /* gotta uninit this someplace */ - REGION_NULL(pScreen, &pPriv->clip); + REGION_INIT(pScreen, &pPriv->clip, NullBox, 0); cPtr->adaptor = adapt; @@ -532,9 +533,7 @@ CHIPSDisplayVideo( DisplayModePtr mode = pScrn->currentMode; unsigned char tmp, m1f, m1e; int buffer = pPriv->currentBuffer; - Bool dblscan = (pScrn->currentMode->Flags & V_DBLSCAN) == V_DBLSCAN; - int val; - + if (cPtr->Flags & ChipsAccelSupport) CHIPSHiQVSync(pScrn); @@ -572,7 +571,6 @@ CHIPSDisplayVideo( cPtr->writeMR(cPtr, 0x23, ((offset >> 8) & 0xFF)); cPtr->writeMR(cPtr, 0x24, ((offset >> 16) & 0xFF)); } - /* Setup Pointer 2 */ if ((buffer && !pPriv->manualDoubleBuffer) || !pPriv->doubleBuffer) { cPtr->writeMR(cPtr, 0x25, (offset & 0xF8)); @@ -580,6 +578,7 @@ CHIPSDisplayVideo( cPtr->writeMR(cPtr, 0x27, ((offset >> 16) & 0xFF)); } + tmp = cPtr->readMR(cPtr, 0x04); if (pPriv->doubleBuffer && !pPriv->manualDoubleBuffer && triggerBufSwitch) tmp |= 0x18; @@ -587,7 +586,6 @@ CHIPSDisplayVideo( tmp = cPtr->readMR(cPtr, 0x20); tmp &= 0xC3; - if (pPriv->doubleBuffer && !pPriv->manualDoubleBuffer && triggerBufSwitch) tmp |= ((1 << 2 | 1 << 5) | ((buffer) ? (1 << 4) : 0)); cPtr->writeMR(cPtr, 0x20, tmp); @@ -607,16 +605,14 @@ CHIPSDisplayVideo( tmp = (tmp & 0xF8) + (((cPtr->OverlaySkewX + dstBox->x2 - 1) >> 8) & 0x07); cPtr->writeMR(cPtr, 0x2D, tmp); /* Top Edge of Overlay */ - val = cPtr->OverlaySkewY + (dstBox->y1 << (dblscan ? 1 : 0)); - cPtr->writeMR(cPtr, 0x2E, ((val) & 0xFF)); + cPtr->writeMR(cPtr, 0x2E, ((cPtr->OverlaySkewY + dstBox->y1) & 0xFF)); tmp = cPtr->readMR(cPtr, 0x2F); - tmp = (tmp & 0xF8) + (((val) >> 8) & 0x07); + tmp = (tmp & 0xF8) + (((cPtr->OverlaySkewY + dstBox->y1) >> 8) & 0x07); cPtr->writeMR(cPtr, 0x2F, tmp); /* Bottom Edge of Overlay*/ - val = cPtr->OverlaySkewY + (dstBox->y2 << (dblscan ? 1 : 0)); - cPtr->writeMR(cPtr, 0x30, ((val - 1) & 0xFF)); + cPtr->writeMR(cPtr, 0x30, ((cPtr->OverlaySkewY + dstBox->y2 - 1) & 0xFF)); tmp = cPtr->readMR(cPtr, 0x31); - tmp = (tmp & 0xF8) + (((val - 1) >> 8) & 0x07); + tmp = (tmp & 0xF8) + (((cPtr->OverlaySkewY + dstBox->y2 - 1) >> 8) & 0x07); cPtr->writeMR(cPtr, 0x31, tmp); /* Horizontal Zoom */ @@ -628,13 +624,10 @@ CHIPSDisplayVideo( } /* Vertical Zoom */ - if (drw_h > src_h || dblscan) { + if (drw_h > src_h) { m1f = m1f | 0x80; /* set V-interpolation */ - m1e = m1e | 0x08; - if (dblscan) - tmp = cPtr->VideoZoomMax >> 1; - if (drw_h > src_h) - tmp = tmp * src_h / drw_h; + m1e = m1e | 0x08; + tmp = cPtr->VideoZoomMax * src_h / drw_h ; cPtr->writeMR(cPtr, 0x33, tmp); } cPtr->writeMR(cPtr, 0x1F, m1f); @@ -662,7 +655,7 @@ CHIPSPutImage( CHIPSPtr cPtr = CHIPSPTR(pScrn); INT32 x1, x2, y1, y2; unsigned char *dst_start; - int new_size, offset, offset2 = 0, offset3 = 0; + int pitch, new_size, offset, offset2 = 0, offset3 = 0; int srcPitch, srcPitch2 = 0, dstPitch; int top, left, npixels, nlines, bpp; BoxRec dstBox; @@ -680,7 +673,7 @@ CHIPSPutImage( dstBox.x2 = drw_x + drw_w; dstBox.y1 = drw_y; dstBox.y2 = drw_y + drw_h; - + if (!xf86XVClipVideoHelper(&dstBox, &x1, &x2, &y1, &y2, clipBoxes, width, height)) return Success; @@ -691,14 +684,12 @@ CHIPSPutImage( dstBox.y2 -= pScrn->frameY0; bpp = pScrn->bitsPerPixel >> 3; + pitch = bpp * pScrn->displayWidth; dstPitch = ((width << 1) + 15) & ~15; new_size = ((dstPitch * height) + bpp - 1) / bpp; - - pPriv->doubleBuffer = (pScrn->currentMode->Flags & V_DBLSCAN) != V_DBLSCAN; - - if (pPriv->doubleBuffer) - new_size <<= 1; + if (pPriv->doubleBuffer) + new_size <<= 1; switch(id) { case FOURCC_YV12: /* YV12 */ @@ -713,12 +704,12 @@ CHIPSPutImage( } if(!(pPriv->linear = CHIPSAllocateMemory(pScrn, pPriv->linear, new_size))) { - if (pPriv->doubleBuffer - && (pPriv->linear = CHIPSAllocateMemory(pScrn, pPriv->linear, + if (pPriv->doubleBuffer && + (pPriv->linear = CHIPSAllocateMemory(pScrn, pPriv->linear, new_size >> 1))) { new_size >>= 1; pPriv->doubleBuffer = FALSE; - } else + } else return BadAlloc; } @@ -860,7 +851,7 @@ CHIPSAllocateSurface( XF86SurfacePtr surface ){ FBLinearPtr linear; - int pitch, size, bpp; + int pitch, fbpitch, size, bpp; OffscreenPrivPtr pPriv; if((w > 1024) || (h > 1024)) @@ -869,6 +860,7 @@ CHIPSAllocateSurface( w = (w + 1) & ~1; pitch = ((w << 1) + 15) & ~15; bpp = pScrn->bitsPerPixel >> 3; + fbpitch = bpp * pScrn->displayWidth; size = ((pitch * h) + bpp - 1) / bpp; if(!(linear = CHIPSAllocateMemory(pScrn, NULL, size))) diff --git a/util/AsmMacros.h b/util/AsmMacros.h index 24070b9..feb5ce0 100644 --- a/util/AsmMacros.h +++ b/util/AsmMacros.h @@ -57,7 +57,7 @@ * */ -/* $XFree86$ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/util/AsmMacros.h,v 1.1 2001/11/16 21:13:34 tsi Exp $ */ #if defined(__GNUC__) #if defined(linux) && (defined(__alpha__) || defined(__ia64__)) diff --git a/util/dRegs.c b/util/dRegs.c index 51a384b..0c8ee62 100644 --- a/util/dRegs.c +++ b/util/dRegs.c @@ -4,7 +4,7 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/util/dRegs.c,v 1.8 2001/10/01 13:44:04 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/util/dRegs.c,v 1.9 2001/11/16 21:13:34 tsi Exp $ */ #ifdef __NetBSD__ # include diff --git a/util/mRegs.c b/util/mRegs.c index b1688de..4d8da11 100644 --- a/util/mRegs.c +++ b/util/mRegs.c @@ -4,7 +4,7 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/util/mRegs.c,v 1.5 2000/10/23 12:10:13 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/util/mRegs.c,v 1.6 2001/11/16 21:13:34 tsi Exp $ */ #ifdef __NetBSD__ # include diff --git a/util/modClock.c b/util/modClock.c index 48a1961..cce4f84 100644 --- a/util/modClock.c +++ b/util/modClock.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/util/modClock.c,v 1.5 2001/05/09 19:57:06 dbateman Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/util/modClock.c,v 1.6 2001/11/16 21:13:34 tsi Exp $ */ #ifdef __NetBSD__ # include -- cgit v1.2.3