From 9d38c8aa1a7d6fb1af41ee8abdb4a95f94843538 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 23 Aug 2007 20:10:24 +1000 Subject: radeon: cleanup some warnings --- src/radeon.h | 4 ++++ src/radeon_bios.c | 1 + src/radeon_driver.c | 7 ++----- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/src/radeon.h b/src/radeon.h index 61283453..1a91cfdd 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -960,6 +960,10 @@ extern void RADEONAdjustPLL2RegistersForTV(ScrnInfoPtr pScrn, RADEONSavePtr save extern void RADEONInitTVRegisters(xf86OutputPtr output, RADEONSavePtr save, DisplayModePtr mode, BOOL IsPrimary); +extern void RADEONRestoreTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore); +extern void RADEONRestoreTVRestarts(ScrnInfoPtr pScrn, RADEONSavePtr restore); +extern void RADEONRestoreTVTimingTables(ScrnInfoPtr pScrn, RADEONSavePtr restore); + #ifdef XF86DRI #ifdef USE_XAA extern void RADEONAccelInitCP(ScreenPtr pScreen, XAAInfoRecPtr a); diff --git a/src/radeon_bios.c b/src/radeon_bios.c index 9d8946f6..975fc07d 100644 --- a/src/radeon_bios.c +++ b/src/radeon_bios.c @@ -623,6 +623,7 @@ Bool RADEONGetTVInfoFromBIOS (xf86OutputPtr output) { return FALSE; } } + return FALSE; } /* Read PLL parameters from BIOS block. Default to typical values if there diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 0dc8d566..1f4d0c25 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -4256,7 +4256,6 @@ void RADEONRestoreFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore) void RADEONRestoreFP2Registers(ScrnInfoPtr pScrn, RADEONSavePtr restore) { RADEONInfoPtr info = RADEONPTR(pScrn); - RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); unsigned char *RADEONMMIO = info->MMIO; OUTREG(RADEON_FP2_GEN_CNTL, restore->fp2_gen_cntl); @@ -4267,7 +4266,6 @@ void RADEONRestoreFP2Registers(ScrnInfoPtr pScrn, RADEONSavePtr restore) void RADEONRestoreRMXRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore) { RADEONInfoPtr info = RADEONPTR(pScrn); - RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); unsigned char *RADEONMMIO = info->MMIO; OUTREG(RADEON_FP_HORZ_STRETCH, restore->fp_horz_stretch); @@ -4390,7 +4388,7 @@ static CARD16 RADEONGetVTimingTablesAddr(CARD32 tv_uv_adr) } /* Restore horizontal/vertical timing code tables */ -static void RADEONRestoreTVTimingTables(ScrnInfoPtr pScrn, RADEONSavePtr restore) +void RADEONRestoreTVTimingTables(ScrnInfoPtr pScrn, RADEONSavePtr restore) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; @@ -4466,7 +4464,7 @@ static void RADEONRestoreTVHVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore) } /* restore TV RESTART registers */ -static void RADEONRestoreTVRestarts(ScrnInfoPtr pScrn, RADEONSavePtr restore) +void RADEONRestoreTVRestarts(ScrnInfoPtr pScrn, RADEONSavePtr restore) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; @@ -5259,7 +5257,6 @@ static void RADEONSaveTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; - unsigned i; ErrorF("Entering TV Save\n"); -- cgit v1.2.3