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authorAlex Deucher <alexdeucher@gmail.com>2011-01-11 15:41:03 -0500
committerAlex Deucher <alexdeucher@gmail.com>2011-01-11 15:41:03 -0500
commitbbd7adce889359b5eb3239b73e904b3ede283e12 (patch)
tree203360f47418753978a8ba25ad2e57cf7dbe1862
parentaf2e6d7d2f1b3d8f8f6b0acfb2b7b0cfaff7bcdb (diff)
radeon: fix yet another pitch align
-rw-r--r--src/drmmode_display.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 55e76ffd..b7d01c4e 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -204,7 +204,8 @@ void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode)
ScreenPtr pScreen = pScrn->pScreen;
int crtc_id = 0;
int i;
- int pitch = pScrn->displayWidth * info->CurrentLayout.pixel_bytes;
+ int pitch;
+ uint32_t tiling_flags = 0;
Bool ret;
if (info->accelOn == FALSE)
@@ -223,6 +224,17 @@ void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode)
if (!src)
return;
+ if (info->allowColorTiling) {
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ tiling_flags |= RADEON_TILING_MICRO;
+ else
+ tiling_flags |= RADEON_TILING_MACRO;
+ }
+
+ pitch = RADEON_ALIGN(pScrn->displayWidth,
+ drmmode_get_pitch_align(pScrn, info->CurrentLayout.pixel_bytes, tiling_flags)) *
+ info->CurrentLayout.pixel_bytes;
+
dst = drmmode_create_bo_pixmap(pScreen, pScrn->virtualX,
pScrn->virtualY, pScrn->depth,
pScrn->bitsPerPixel, pitch,