diff options
| author | Dave Airlie <airlied@redhat.com> | 2011-05-04 10:44:43 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2011-05-04 10:45:53 +1000 |
| commit | a6d2dba6573a3512d550d7e442bf42ea03012bbc (patch) | |
| tree | 910707eaa013be8ccfe5d267f41113a2b98ba9be | |
| parent | 859e052af49e68a826b77a9135c7f067dc331a06 (diff) | |
radeon: add add hw DFS support for fusion
Fusion had a bug setting up the VM on earlier kernels so we need to work
around that and only enable accel on a new enough kernel.
Signed-off-by: Dave Airlie <airlied@redhat.com>
| -rw-r--r-- | src/evergreen_exa.c | 2 | ||||
| -rw-r--r-- | src/radeon.h | 1 | ||||
| -rw-r--r-- | src/radeon_kms.c | 27 |
3 files changed, 29 insertions, 1 deletions
diff --git a/src/evergreen_exa.c b/src/evergreen_exa.c index d2579399..69d29a85 100644 --- a/src/evergreen_exa.c +++ b/src/evergreen_exa.c @@ -1553,7 +1553,7 @@ EVERGREENDownloadFromScreen(PixmapPtr pSrc, int x, int y, int w, } - if (info->ChipFamily == CHIP_FAMILY_PALM) + if (!accel_state->allowHWDFS) goto copy; scratch_pitch = RADEON_ALIGN(w, drmmode_get_pitch_align(pScrn, (bpp / 8), 0)); diff --git a/src/radeon.h b/src/radeon.h index f655040a..a9a2b69b 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -717,6 +717,7 @@ struct radeon_accel_state { Bool XInited3D; /* X itself has the 3D context */ int num_gb_pipes; Bool has_tcl; + Bool allowHWDFS; #ifdef USE_EXA /* EXA */ diff --git a/src/radeon_kms.c b/src/radeon_kms.c index 07601708..b8fcb99b 100644 --- a/src/radeon_kms.c +++ b/src/radeon_kms.c @@ -213,6 +213,28 @@ radeon_flush_callback(CallbackListPtr *list, } } +static Bool RADEONIsFusionGARTWorking(ScrnInfoPtr pScrn) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); + struct drm_radeon_info ginfo; + int r; + uint32_t tmp; + +#ifndef RADEON_INFO_FUSION_GART_WORKING +#define RADEON_INFO_FUSION_GART_WORKING 0x0c +#endif + memset(&ginfo, 0, sizeof(ginfo)); + ginfo.request = RADEON_INFO_FUSION_GART_WORKING; + ginfo.value = (uintptr_t)&tmp; + r = drmCommandWriteRead(info->dri->drmFD, DRM_RADEON_INFO, &ginfo, sizeof(ginfo)); + if (r) { + return FALSE; + } + if (tmp == 1) + return TRUE; + return FALSE; +} + static Bool RADEONIsAccelWorking(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); @@ -268,6 +290,11 @@ static Bool RADEONPreInitAccel_KMS(ScrnInfoPtr pScrn) return TRUE; } + if (info->ChipFamily == CHIP_FAMILY_PALM) { + info->accel_state->allowHWDFS = RADEONIsFusionGARTWorking(pScrn); + } else + info->accel_state->allowHWDFS = TRUE; + if ((info->ChipFamily == CHIP_FAMILY_RS100) || (info->ChipFamily == CHIP_FAMILY_RS200) || (info->ChipFamily == CHIP_FAMILY_RS300) || |