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authorAlex Deucher <alexdeucher@gmail.com>2011-05-31 20:03:36 (GMT)
committer Alex Deucher <alexdeucher@gmail.com>2011-05-31 22:12:38 (GMT)
commit36afd1e1055eeadb2396dadcc68b214655bd90a9 (patch) (side-by-side diff)
treed7685353be1b9380183e5d9256798e4c384298f1
parent557f46dc2f18734ecf1f18dee7e951e0bf062e63 (diff)
downloadxf86-video-ati-36afd1e1055eeadb2396dadcc68b214655bd90a9.zip
xf86-video-ati-36afd1e1055eeadb2396dadcc68b214655bd90a9.tar.gz
radeon: add support for llano APUs
- KMS only - Includes full EXA/Xv support Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Diffstat (more/less context) (ignore whitespace changes)
-rw-r--r--src/evergreen_accel.c46
-rw-r--r--src/radeon.h2
-rw-r--r--src/radeon_driver.c6
3 files changed, 52 insertions, 2 deletions
diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c
index 70f3c1f..7cf3960 100644
--- a/src/evergreen_accel.c
+++ b/src/evergreen_accel.c
@@ -90,6 +90,8 @@ evergreen_sq_setup(ScrnInfoPtr pScrn, sq_config_t *sq_conf)
if ((info->ChipFamily == CHIP_FAMILY_CEDAR) ||
(info->ChipFamily == CHIP_FAMILY_PALM) ||
+ (info->ChipFamily == CHIP_FAMILY_SUMO) ||
+ (info->ChipFamily == CHIP_FAMILY_SUMO2) ||
(info->ChipFamily == CHIP_FAMILY_CAICOS))
sq_config = 0;
else
@@ -554,6 +556,8 @@ evergreen_set_vtx_resource(ScrnInfoPtr pScrn, vtx_resource_t *res, uint32_t doma
/* flush vertex cache */
if ((info->ChipFamily == CHIP_FAMILY_CEDAR) ||
(info->ChipFamily == CHIP_FAMILY_PALM) ||
+ (info->ChipFamily == CHIP_FAMILY_SUMO) ||
+ (info->ChipFamily == CHIP_FAMILY_SUMO2) ||
(info->ChipFamily == CHIP_FAMILY_CAICOS) ||
(info->ChipFamily == CHIP_FAMILY_CAYMAN))
evergreen_cp_set_surface_sync(pScrn, TC_ACTION_ENA_bit,
@@ -955,6 +959,48 @@ evergreen_set_default_state(ScrnInfoPtr pScrn)
sq_conf.num_hs_stack_entries = 42;
sq_conf.num_ls_stack_entries = 42;
break;
+ case CHIP_FAMILY_SUMO:
+ sq_conf.num_ps_gprs = 93;
+ sq_conf.num_vs_gprs = 46;
+ sq_conf.num_temp_gprs = 4;
+ sq_conf.num_gs_gprs = 31;
+ sq_conf.num_es_gprs = 31;
+ sq_conf.num_hs_gprs = 23;
+ sq_conf.num_ls_gprs = 23;
+ sq_conf.num_ps_threads = 96;
+ sq_conf.num_vs_threads = 25;
+ sq_conf.num_gs_threads = 25;
+ sq_conf.num_es_threads = 25;
+ sq_conf.num_hs_threads = 25;
+ sq_conf.num_ls_threads = 25;
+ sq_conf.num_ps_stack_entries = 42;
+ sq_conf.num_vs_stack_entries = 42;
+ sq_conf.num_gs_stack_entries = 42;
+ sq_conf.num_es_stack_entries = 42;
+ sq_conf.num_hs_stack_entries = 42;
+ sq_conf.num_ls_stack_entries = 42;
+ break;
+ case CHIP_FAMILY_SUMO2:
+ sq_conf.num_ps_gprs = 93;
+ sq_conf.num_vs_gprs = 46;
+ sq_conf.num_temp_gprs = 4;
+ sq_conf.num_gs_gprs = 31;
+ sq_conf.num_es_gprs = 31;
+ sq_conf.num_hs_gprs = 23;
+ sq_conf.num_ls_gprs = 23;
+ sq_conf.num_ps_threads = 96;
+ sq_conf.num_vs_threads = 25;
+ sq_conf.num_gs_threads = 25;
+ sq_conf.num_es_threads = 25;
+ sq_conf.num_hs_threads = 25;
+ sq_conf.num_ls_threads = 25;
+ sq_conf.num_ps_stack_entries = 85;
+ sq_conf.num_vs_stack_entries = 85;
+ sq_conf.num_gs_stack_entries = 85;
+ sq_conf.num_es_stack_entries = 85;
+ sq_conf.num_hs_stack_entries = 85;
+ sq_conf.num_ls_stack_entries = 85;
+ break;
case CHIP_FAMILY_BARTS:
sq_conf.num_ps_gprs = 93;
sq_conf.num_vs_gprs = 46;
diff --git a/src/radeon.h b/src/radeon.h
index dd83a69..f66ffd0 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -360,6 +360,8 @@ typedef enum {
CHIP_FAMILY_CYPRESS,
CHIP_FAMILY_HEMLOCK,
CHIP_FAMILY_PALM,
+ CHIP_FAMILY_SUMO,
+ CHIP_FAMILY_SUMO2,
CHIP_FAMILY_BARTS,
CHIP_FAMILY_TURKS,
CHIP_FAMILY_CAICOS,
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 35c2761..202951f 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -1475,7 +1475,9 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
(info->ChipFamily != CHIP_FAMILY_RS740) &&
(info->ChipFamily != CHIP_FAMILY_RS780) &&
(info->ChipFamily != CHIP_FAMILY_RS880) &&
- (info->ChipFamily != CHIP_FAMILY_PALM)) {
+ (info->ChipFamily != CHIP_FAMILY_PALM) &&
+ (info->ChipFamily != CHIP_FAMILY_SUMO) &&
+ (info->ChipFamily != CHIP_FAMILY_SUMO2)) {
if (info->IsIGP)
info->mc_fb_location = INREG(RADEON_NB_TOM);
else
@@ -1894,7 +1896,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
}
}
- if (IS_DCE5_VARIANT) {
+ if (info->ChipFamily >= CHIP_FAMILY_SUMO) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Chipset: \"%s\" (ChipID = 0x%04x) requires KMS\n",
pScrn->chipset,