DCE3.2: fix up Save()/Restore()

2 files changed, 65 insertions, 9 deletions

diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 62fa3aa2..7cac321f 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4430,15 +4430,40 @@ avivo_save(ScrnInfoPtr pScrn, RADEONSavePtr save)
 	    state->aux_cntl2[j] = INREG(i + 0x040);
 	    state->aux_cntl3[j] = INREG(i + 0x400);
 	    state->aux_cntl4[j] = INREG(i + 0x440);
+	    if (IS_DCE32_VARIANT) {
+		state->aux_cntl5[j] = INREG(i + 0x500);
+		state->aux_cntl6[j] = INREG(i + 0x540);
+	    }
 	    j++;
 	}
 
 	j = 0;
 	/* save UNIPHY regs */
-	for (i = 0x7ec0; i <= 0x7edc; i += 4) {
-	    state->uniphy1[j] = INREG(i);
-	    state->uniphy2[j] = INREG(i + 0x100);
-	    j++;
+	if (IS_DCE32_VARIANT) {
+	    for (i = 0x7680; i <= 0x7690; i += 4) {
+		state->uniphy1[j] = INREG(i);
+		state->uniphy2[j] = INREG(i + 0x20);
+		state->uniphy3[j] = INREG(i + 0x400);
+		state->uniphy4[j] = INREG(i + 0x420);
+		state->uniphy5[j] = INREG(i + 0x840);
+		state->uniphy6[j] = INREG(i + 0x940);
+		j++;
+	    }
+	    for (i = 0x7698; i <= 0x769c; i += 4) {
+		state->uniphy1[j] = INREG(i);
+		state->uniphy2[j] = INREG(i + 0x20);
+		state->uniphy3[j] = INREG(i + 0x400);
+		state->uniphy4[j] = INREG(i + 0x420);
+		state->uniphy5[j] = INREG(i + 0x840);
+		state->uniphy6[j] = INREG(i + 0x940);
+		j++;
+	    }
+	} else {
+	    for (i = 0x7ec0; i <= 0x7edc; i += 4) {
+		state->uniphy1[j] = INREG(i);
+		state->uniphy2[j] = INREG(i + 0x100);
+		j++;
+	    }
 	}
 	j = 0;
 	/* save PHY,LINK regs */
@@ -4781,15 +4806,40 @@ avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 	    OUTREG((i + 0x040), state->aux_cntl2[j]);
 	    OUTREG((i + 0x400), state->aux_cntl3[j]);
 	    OUTREG((i + 0x440), state->aux_cntl4[j]);
+	    if (IS_DCE32_VARIANT) {
+		OUTREG((i + 0x500), state->aux_cntl5[j]);
+		OUTREG((i + 0x540), state->aux_cntl6[j]);
+	    }
 	    j++;
 	}
 
 	j = 0;
 	/* save UNIPHY regs */
-	for (i = 0x7ec0; i <= 0x7edc; i += 4) {
-	    OUTREG(i, state->uniphy1[j]);
-	    OUTREG((i + 0x100), state->uniphy2[j]);
-	    j++;
+	if (IS_DCE32_VARIANT) {
+	    for (i = 0x7680; i <= 0x7690; i += 4) {
+		OUTREG(i, state->uniphy1[j]);
+		OUTREG((i + 0x20), state->uniphy2[j]);
+		OUTREG((i + 0x400), state->uniphy3[j]);
+		OUTREG((i + 0x420), state->uniphy4[j]);
+		OUTREG((i + 0x840), state->uniphy5[j]);
+		OUTREG((i + 0x940), state->uniphy6[j]);
+		j++;
+	    }
+	    for (i = 0x7698; i <= 0x769c; i += 4) {
+		OUTREG(i, state->uniphy1[j]);
+		OUTREG((i + 0x20), state->uniphy2[j]);
+		OUTREG((i + 0x400), state->uniphy3[j]);
+		OUTREG((i + 0x420), state->uniphy4[j]);
+		OUTREG((i + 0x840), state->uniphy5[j]);
+		OUTREG((i + 0x940), state->uniphy6[j]);
+		j++;
+	    }
+	} else {
+	    for (i = 0x7ec0; i <= 0x7edc; i += 4) {
+		OUTREG(i, state->uniphy1[j]);
+		OUTREG((i + 0x100), state->uniphy2[j]);
+		j++;
+	    }
 	}
 	j = 0;
 	/* save PHY,LINK regs */
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index eb2e82f6..49044e36 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -370,7 +370,7 @@ struct avivo_state
     /* dvoa */
     uint32_t dvoa[16];
 
-    /* DCE3 chips */
+    /* DCE3+ chips */
     uint32_t fmt1[18];
     uint32_t fmt2[18];
     uint32_t dig1[19];
@@ -381,9 +381,15 @@ struct avivo_state
     uint32_t aux_cntl2[14];
     uint32_t aux_cntl3[14];
     uint32_t aux_cntl4[14];
+    uint32_t aux_cntl5[14];
+    uint32_t aux_cntl6[14];
     uint32_t phy[10];
     uint32_t uniphy1[8];
     uint32_t uniphy2[8];
+    uint32_t uniphy3[8];
+    uint32_t uniphy4[8];
+    uint32_t uniphy5[8];
+    uint32_t uniphy6[8];
 
 };