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authorAdam Jackson <ajax@redhat.com>2008-07-21 15:10:20 -0400
committerAdam Jackson <ajax@redhat.com>2008-07-21 15:10:20 -0400
commitc74ddc87c995c73109827717a49f14846c7c4024 (patch)
tree014473e306d446359d53997d8e57e1e9c893af6a
parent55803473adb0a0975fea81035402bf6b4ec0e30b (diff)
EDID: Add quirk to clamp max pixel clock to single DVI link speed.
On some panels you end up with all of: - No range descriptor - No description of physical connectivity - Native panel size mode in standard timings list In principle you're supposed to use the timings for that mode from the DMT spec, but in practice the DMT spec has timings for both 1920x1200 normal and 1920x1200RB, and the standard timing field gives you no way to distinguish. And, of course, the non-RB timings don't fit in a single DVI link.
-rw-r--r--hw/xfree86/modes/xf86EdidModes.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/hw/xfree86/modes/xf86EdidModes.c b/hw/xfree86/modes/xf86EdidModes.c
index 057b93d7b..1af9a3601 100644
--- a/hw/xfree86/modes/xf86EdidModes.c
+++ b/hw/xfree86/modes/xf86EdidModes.c
@@ -68,6 +68,8 @@ typedef enum {
DDC_QUIRK_FIRST_DETAILED_PREFERRED = 1 << 6,
/* use +hsync +vsync for detailed mode */
DDC_QUIRK_DETAILED_SYNC_PP = 1 << 7,
+ /* Force single-link DVI bandwidth limit */
+ DDC_QUIRK_DVI_SINGLE_LINK = 1 << 8,
} ddc_quirk_t;
static Bool quirk_prefer_large_60 (int scrnIndex, xf86MonPtr DDC)
@@ -181,6 +183,16 @@ static Bool quirk_detailed_sync_pp(int scrnIndex, xf86MonPtr DDC)
return FALSE;
}
+/* This should probably be made more generic */
+static Bool quirk_dvi_single_link(int scrnIndex, xf86MonPtr DDC)
+{
+ /* Red Hat bug #453106: Apple 23" Cinema Display */
+ if (memcmp (DDC->vendor.name, "APL", 4) == 0 &&
+ DDC->vendor.prod_id == 0x921c)
+ return TRUE;
+ return FALSE;
+}
+
typedef struct {
Bool (*detect) (int scrnIndex, xf86MonPtr DDC);
ddc_quirk_t quirk;
@@ -220,6 +232,10 @@ static const ddc_quirk_map_t ddc_quirks[] = {
quirk_detailed_sync_pp, DDC_QUIRK_DETAILED_SYNC_PP,
"Use +hsync +vsync for detailed timing."
},
+ {
+ quirk_dvi_single_link, DDC_QUIRK_DVI_SINGLE_LINK,
+ "Forcing maximum pixel clock to single DVI link."
+ },
{
NULL, DDC_QUIRK_NONE,
"No known quirks"
@@ -669,12 +685,15 @@ xf86DDCMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC)
DisplayModePtr Modes = NULL, Mode;
int i, clock;
Bool have_hsync = FALSE, have_vrefresh = FALSE, have_maxpixclock = FALSE;
+ ddc_quirk_t quirks;
if (!Monitor || !DDC)
return;
Monitor->DDC = DDC;
+ quirks = xf86DDCDetectQuirks(scrnIndex, DDC, FALSE);
+
if (Monitor->widthmm <= 0 && Monitor->heightmm <= 0) {
Monitor->widthmm = 10 * DDC->features.hsize;
Monitor->heightmm = 10 * DDC->features.vsize;
@@ -727,6 +746,8 @@ xf86DDCMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC)
}
clock = DDC->det_mon[i].section.ranges.max_clock * 1000;
+ if (quirks & DDC_QUIRK_DVI_SINGLE_LINK)
+ clock = min(clock, 165000);
if (!have_maxpixclock && clock > Monitor->maxPixClock)
Monitor->maxPixClock = clock;