Merge branch 'master'

61 files changed, 5127 insertions, 1002 deletions

diff --git a/GL/glx/glxbyteorder.h b/GL/glx/glxbyteorder.h
new file mode 100644
index 000000000..b9d738dba
--- /dev/null
+++ b/GL/glx/glxbyteorder.h
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright IBM Corporation 2006, 2007
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, THE AUTHORS, AND/OR THEIR SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
+ * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/**
+ * \file glxbyteorder.h
+ * Platform glue for handling byte-ordering issues in GLX protocol.
+ * 
+ * \author Ian Romanick <idr@us.ibm.com>
+ */
+#if !defined(__GLXBYTEORDER_H__)
+#define __GLXBYTEORDER_H__
+
+#ifdef HAVE_DIX_CONFIG_H
+#include <dix-config.h>
+#endif
+
+#if HAVE_BYTESWAP_H
+#include <byteswap.h>
+#elif defined(USE_SYS_ENDIAN_H)
+#include <sys/endian.h>
+#else
+#define	bswap_16(value)  \
+ 	((((value) & 0xff) << 8) | ((value) >> 8))
+
+#define	bswap_32(value)	\
+ 	(((uint32_t)bswap_16((uint16_t)((value) & 0xffff)) << 16) | \
+ 	(uint32_t)bswap_16((uint16_t)((value) >> 16)))
+ 
+#define	bswap_64(value)	\
+ 	(((uint64_t)bswap_32((uint32_t)((value) & 0xffffffff)) \
+ 	    << 32) | \
+ 	(uint64_t)bswap_32((uint32_t)((value) >> 32)))
+#endif
+
+#endif /* !defined(__GLXBYTEORDER_H__) */
diff --git a/GL/glx/glxdri.c b/GL/glx/glxdri.c
index 170662c7e..e03570468 100644
--- a/GL/glx/glxdri.c
+++ b/GL/glx/glxdri.c
@@ -864,6 +864,7 @@ __glXDRIscreenProbe(ScreenPtr pScreen)
     int api_ver = COPY_SUB_BUFFER_INTERNAL_VERSION;
     drm_magic_t magic;
     drmVersionPtr version;
+    int newlyopened;
     char *driverName;
     drm_handle_t  hFB;
     int        junk;
@@ -914,10 +915,10 @@ __glXDRIscreenProbe(ScreenPtr pScreen)
 	goto handle_error;
     }
 
-    fd = drmOpen(NULL, BusID);
+    fd = drmOpenOnce(NULL, BusID, &newlyopened);
 
     if (fd < 0) {
-	LogMessage(X_ERROR, "AIGLX error: drmOpen failed (%s)\n",
+	LogMessage(X_ERROR, "AIGLX error: drmOpenOnce failed (%s)\n",
 		   strerror(-fd));
 	goto handle_error;
     }
@@ -940,7 +941,7 @@ __glXDRIscreenProbe(ScreenPtr pScreen)
 	drm_version.patch = -1;
     }
 
-    if (!DRIAuthConnection(pScreen, magic)) {
+    if (newlyopened && !DRIAuthConnection(pScreen, magic)) {
 	LogMessage(X_ERROR, "AIGLX error: DRIAuthConnection failed\n");
 	goto handle_error;
     }
@@ -1082,7 +1083,7 @@ __glXDRIscreenProbe(ScreenPtr pScreen)
 	xfree(dev_priv);
 
     if (fd >= 0)
-	drmClose(fd);
+	drmCloseOnce(fd);
 
     DRICloseConnection(pScreen);
 
diff --git a/GL/glx/indirect_dispatch.c b/GL/glx/indirect_dispatch.c
index d86dedfd5..00a9f9659 100644
--- a/GL/glx/indirect_dispatch.c
+++ b/GL/glx/indirect_dispatch.c
@@ -33,6 +33,7 @@
 #include "indirect_size_get.h"
 #include "indirect_dispatch.h"
 #include "glxserver.h"
+#include "glxbyteorder.h"
 #include "indirect_util.h"
 #include "singlesize.h"
 #include "glapitable.h"
diff --git a/GL/glx/indirect_dispatch_swap.c b/GL/glx/indirect_dispatch_swap.c
index 136f0d010..c0bb71cc4 100644
--- a/GL/glx/indirect_dispatch_swap.c
+++ b/GL/glx/indirect_dispatch_swap.c
@@ -28,24 +28,12 @@
 #include <X11/Xmd.h>
 #include <GL/gl.h>
 #include <GL/glxproto.h>
-#if defined(__linux__) || defined (__GLIBC__) || defined(__GNU__)
-#include <byteswap.h>
-#elif defined(__OpenBSD__)
-#include <sys/endian.h>
-#define bswap_16 __swap16
-#define bswap_32 __swap32
-#define bswap_64 __swap64
-#else
-#include <sys/endian.h>
-#define bswap_16 bswap16
-#define bswap_32 bswap32
-#define bswap_64 bswap64
-#endif
 #include <inttypes.h>
 #include "indirect_size.h"
 #include "indirect_size_get.h"
 #include "indirect_dispatch.h"
 #include "glxserver.h"
+#include "glxbyteorder.h"
 #include "indirect_util.h"
 #include "singlesize.h"
 #include "glapitable.h"
diff --git a/GL/glx/indirect_program.c b/GL/glx/indirect_program.c
index 8d5f0e60f..d23a0a9e6 100644
--- a/GL/glx/indirect_program.c
+++ b/GL/glx/indirect_program.c
@@ -35,6 +35,7 @@
 #endif
 
 #include "glxserver.h"
+#include "glxbyteorder.h"
 #include "glxext.h"
 #include "singlesize.h"
 #include "unpack.h"
@@ -46,20 +47,6 @@
 #include "dispatch.h"
 #include "glapioffsets.h"
 
-#if defined(__linux__) || defined (__GLIBC__) || defined (__GNU__)
-#include <byteswap.h>
-#elif defined(__OpenBSD__)
-#include <sys/endian.h>
-#define bswap_16 __swap16
-#define bswap_32 __swap32
-#define bswap_64 __swap64
-#else
-#include <sys/endian.h>
-#define bswap_16 bswap16
-#define bswap_32 bswap32
-#define bswap_64 bswap64
-#endif
-
 static int DoGetProgramString(struct __GLXclientStateRec *cl, GLbyte *pc,
     unsigned get_programiv_offset, unsigned get_program_string_offset,
     Bool do_swap);
diff --git a/GL/glx/indirect_reqsize.c b/GL/glx/indirect_reqsize.c
index d3e2bc516..954eecd97 100644
--- a/GL/glx/indirect_reqsize.c
+++ b/GL/glx/indirect_reqsize.c
@@ -28,16 +28,10 @@
 
 #include <GL/gl.h>
 #include "glxserver.h"
+#include "glxbyteorder.h"
 #include "indirect_size.h"
 #include "indirect_reqsize.h"
 
-#if defined(__linux__) || defined (__GLIBC__) || defined(__GNU__)
-#  include <byteswap.h>
-#  define SWAP_32(v)  do { (v) = bswap_32(v); } while(0)
-#else
-#  define SWAP_32(v)  do { char tmp; swapl(&v, tmp); } while(0)
-#endif
-
 #define __GLX_PAD(x)  (((x) + 3) & ~3)
 
 #if defined(__CYGWIN__) || defined(__MINGW32__)
@@ -56,15 +50,15 @@
 
 
 int
-__glXCallListsReqSize( const GLbyte * pc, Bool swap )
+__glXCallListsReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei n          = *(GLsizei *)(pc + 0);
-    GLenum type        = * (GLenum *)(pc + 4);
+    GLsizei n = *(GLsizei *) (pc + 0);
+    GLenum type = *(GLenum *) (pc + 4);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( n );
-        SWAP_32( type );
+        n = bswap_32(n);
+        type = bswap_32(type);
     }
 
     compsize = __glCallLists_size(type);
@@ -72,22 +66,22 @@ __glXCallListsReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXBitmapReqSize( const GLbyte * pc, Bool swap )
+__glXBitmapReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
-    GLsizei width      = *(GLsizei *)(pc + 20);
-    GLsizei height     = *(GLsizei *)(pc + 24);
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
+    GLsizei width = *(GLsizei *) (pc + 20);
+    GLsizei height = *(GLsizei *) (pc + 24);
 
     if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
-        SWAP_32( width );
-        SWAP_32( height );
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
+        width = bswap_32(width);
+        height = bswap_32(height);
     }
 
     return __glXImageSize(GL_COLOR_INDEX, GL_BITMAP, 0, width, height, 1,
@@ -96,13 +90,13 @@ __glXBitmapReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXFogfvReqSize( const GLbyte * pc, Bool swap )
+__glXFogfvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 0);
+    GLenum pname = *(GLenum *) (pc + 0);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( pname );
+        pname = bswap_32(pname);
     }
 
     compsize = __glFogfv_size(pname);
@@ -110,13 +104,13 @@ __glXFogfvReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXLightfvReqSize( const GLbyte * pc, Bool swap )
+__glXLightfvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 4);
+    GLenum pname = *(GLenum *) (pc + 4);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( pname );
+        pname = bswap_32(pname);
     }
 
     compsize = __glLightfv_size(pname);
@@ -124,13 +118,13 @@ __glXLightfvReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXLightModelfvReqSize( const GLbyte * pc, Bool swap )
+__glXLightModelfvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 0);
+    GLenum pname = *(GLenum *) (pc + 0);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( pname );
+        pname = bswap_32(pname);
     }
 
     compsize = __glLightModelfv_size(pname);
@@ -138,13 +132,13 @@ __glXLightModelfvReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXMaterialfvReqSize( const GLbyte * pc, Bool swap )
+__glXMaterialfvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 4);
+    GLenum pname = *(GLenum *) (pc + 4);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( pname );
+        pname = bswap_32(pname);
     }
 
     compsize = __glMaterialfv_size(pname);
@@ -152,18 +146,18 @@ __glXMaterialfvReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXPolygonStippleReqSize( const GLbyte * pc, Bool swap )
+__glXPolygonStippleReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
 
     if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
     }
 
     return __glXImageSize(GL_COLOR_INDEX, GL_BITMAP, 0, 32, 32, 1,
@@ -172,13 +166,13 @@ __glXPolygonStippleReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXTexParameterfvReqSize( const GLbyte * pc, Bool swap )
+__glXTexParameterfvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 4);
+    GLenum pname = *(GLenum *) (pc + 4);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( pname );
+        pname = bswap_32(pname);
     }
 
     compsize = __glTexParameterfv_size(pname);
@@ -186,26 +180,26 @@ __glXTexParameterfvReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXTexImage1DReqSize( const GLbyte * pc, Bool swap )
+__glXTexImage1DReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
-    GLenum target      = * (GLenum *)(pc + 20);
-    GLsizei width      = *(GLsizei *)(pc + 32);
-    GLenum format      = * (GLenum *)(pc + 44);
-    GLenum type        = * (GLenum *)(pc + 48);
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
+    GLenum target = *(GLenum *) (pc + 20);
+    GLsizei width = *(GLsizei *) (pc + 32);
+    GLenum format = *(GLenum *) (pc + 44);
+    GLenum type = *(GLenum *) (pc + 48);
 
     if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
-        SWAP_32( target );
-        SWAP_32( width );
-        SWAP_32( format );
-        SWAP_32( type );
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
+        target = bswap_32(target);
+        width = bswap_32(width);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, target, width, 1, 1,
@@ -214,28 +208,28 @@ __glXTexImage1DReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXTexImage2DReqSize( const GLbyte * pc, Bool swap )
+__glXTexImage2DReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
-    GLenum target      = * (GLenum *)(pc + 20);
-    GLsizei width      = *(GLsizei *)(pc + 32);
-    GLsizei height     = *(GLsizei *)(pc + 36);
-    GLenum format      = * (GLenum *)(pc + 44);
-    GLenum type        = * (GLenum *)(pc + 48);
-
-    if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
-        SWAP_32( target );
-        SWAP_32( width );
-        SWAP_32( height );
-        SWAP_32( format );
-        SWAP_32( type );
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
+    GLenum target = *(GLenum *) (pc + 20);
+    GLsizei width = *(GLsizei *) (pc + 32);
+    GLsizei height = *(GLsizei *) (pc + 36);
+    GLenum format = *(GLenum *) (pc + 44);
+    GLenum type = *(GLenum *) (pc + 48);
+
+    if (swap) {
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
+        target = bswap_32(target);
+        width = bswap_32(width);
+        height = bswap_32(height);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, target, width, height, 1,
@@ -244,13 +238,13 @@ __glXTexImage2DReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXTexEnvfvReqSize( const GLbyte * pc, Bool swap )
+__glXTexEnvfvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 4);
+    GLenum pname = *(GLenum *) (pc + 4);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( pname );
+        pname = bswap_32(pname);
     }
 
     compsize = __glTexEnvfv_size(pname);
@@ -258,13 +252,13 @@ __glXTexEnvfvReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXTexGendvReqSize( const GLbyte * pc, Bool swap )
+__glXTexGendvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 4);
+    GLenum pname = *(GLenum *) (pc + 4);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( pname );
+        pname = bswap_32(pname);
     }
 
     compsize = __glTexGendv_size(pname);
@@ -272,13 +266,13 @@ __glXTexGendvReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXTexGenfvReqSize( const GLbyte * pc, Bool swap )
+__glXTexGenfvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 4);
+    GLenum pname = *(GLenum *) (pc + 4);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( pname );
+        pname = bswap_32(pname);
     }
 
     compsize = __glTexGenfv_size(pname);
@@ -286,50 +280,50 @@ __glXTexGenfvReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXPixelMapfvReqSize( const GLbyte * pc, Bool swap )
+__glXPixelMapfvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei mapsize    = *(GLsizei *)(pc + 4);
+    GLsizei mapsize = *(GLsizei *) (pc + 4);
 
     if (swap) {
-        SWAP_32( mapsize );
+        mapsize = bswap_32(mapsize);
     }
 
     return __GLX_PAD((mapsize * 4));
 }
 
 int
-__glXPixelMapusvReqSize( const GLbyte * pc, Bool swap )
+__glXPixelMapusvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei mapsize    = *(GLsizei *)(pc + 4);
+    GLsizei mapsize = *(GLsizei *) (pc + 4);
 
     if (swap) {
-        SWAP_32( mapsize );
+        mapsize = bswap_32(mapsize);
     }
 
     return __GLX_PAD((mapsize * 2));
 }
 
 int
-__glXDrawPixelsReqSize( const GLbyte * pc, Bool swap )
+__glXDrawPixelsReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
-    GLsizei width      = *(GLsizei *)(pc + 20);
-    GLsizei height     = *(GLsizei *)(pc + 24);
-    GLenum format      = * (GLenum *)(pc + 28);
-    GLenum type        = * (GLenum *)(pc + 32);
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
+    GLsizei width = *(GLsizei *) (pc + 20);
+    GLsizei height = *(GLsizei *) (pc + 24);
+    GLenum format = *(GLenum *) (pc + 28);
+    GLenum type = *(GLenum *) (pc + 32);
 
     if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
-        SWAP_32( width );
-        SWAP_32( height );
-        SWAP_32( format );
-        SWAP_32( type );
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
+        width = bswap_32(width);
+        height = bswap_32(height);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, 0, width, height, 1,
@@ -338,38 +332,38 @@ __glXDrawPixelsReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXPrioritizeTexturesReqSize( const GLbyte * pc, Bool swap )
+__glXPrioritizeTexturesReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei n          = *(GLsizei *)(pc + 0);
+    GLsizei n = *(GLsizei *) (pc + 0);
 
     if (swap) {
-        SWAP_32( n );
+        n = bswap_32(n);
     }
 
     return __GLX_PAD((n * 4) + (n * 4));
 }
 
 int
-__glXTexSubImage1DReqSize( const GLbyte * pc, Bool swap )
+__glXTexSubImage1DReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
-    GLenum target      = * (GLenum *)(pc + 20);
-    GLsizei width      = *(GLsizei *)(pc + 36);
-    GLenum format      = * (GLenum *)(pc + 44);
-    GLenum type        = * (GLenum *)(pc + 48);
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
+    GLenum target = *(GLenum *) (pc + 20);
+    GLsizei width = *(GLsizei *) (pc + 36);
+    GLenum format = *(GLenum *) (pc + 44);
+    GLenum type = *(GLenum *) (pc + 48);
 
     if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
-        SWAP_32( target );
-        SWAP_32( width );
-        SWAP_32( format );
-        SWAP_32( type );
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
+        target = bswap_32(target);
+        width = bswap_32(width);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, target, width, 1, 1,
@@ -378,28 +372,28 @@ __glXTexSubImage1DReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXTexSubImage2DReqSize( const GLbyte * pc, Bool swap )
+__glXTexSubImage2DReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
-    GLenum target      = * (GLenum *)(pc + 20);
-    GLsizei width      = *(GLsizei *)(pc + 36);
-    GLsizei height     = *(GLsizei *)(pc + 40);
-    GLenum format      = * (GLenum *)(pc + 44);
-    GLenum type        = * (GLenum *)(pc + 48);
-
-    if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
-        SWAP_32( target );
-        SWAP_32( width );
-        SWAP_32( height );
-        SWAP_32( format );
-        SWAP_32( type );
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
+    GLenum target = *(GLenum *) (pc + 20);
+    GLsizei width = *(GLsizei *) (pc + 36);
+    GLsizei height = *(GLsizei *) (pc + 40);
+    GLenum format = *(GLenum *) (pc + 44);
+    GLenum type = *(GLenum *) (pc + 48);
+
+    if (swap) {
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
+        target = bswap_32(target);
+        width = bswap_32(width);
+        height = bswap_32(height);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, target, width, height, 1,
@@ -408,26 +402,26 @@ __glXTexSubImage2DReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXColorTableReqSize( const GLbyte * pc, Bool swap )
+__glXColorTableReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
-    GLenum target      = * (GLenum *)(pc + 20);
-    GLsizei width      = *(GLsizei *)(pc + 28);
-    GLenum format      = * (GLenum *)(pc + 32);
-    GLenum type        = * (GLenum *)(pc + 36);
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
+    GLenum target = *(GLenum *) (pc + 20);
+    GLsizei width = *(GLsizei *) (pc + 28);
+    GLenum format = *(GLenum *) (pc + 32);
+    GLenum type = *(GLenum *) (pc + 36);
 
     if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
-        SWAP_32( target );
-        SWAP_32( width );
-        SWAP_32( format );
-        SWAP_32( type );
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
+        target = bswap_32(target);
+        width = bswap_32(width);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, target, width, 1, 1,
@@ -436,13 +430,13 @@ __glXColorTableReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXColorTableParameterfvReqSize( const GLbyte * pc, Bool swap )
+__glXColorTableParameterfvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 4);
+    GLenum pname = *(GLenum *) (pc + 4);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( pname );
+        pname = bswap_32(pname);
     }
 
     compsize = __glColorTableParameterfv_size(pname);
@@ -450,26 +444,26 @@ __glXColorTableParameterfvReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXColorSubTableReqSize( const GLbyte * pc, Bool swap )
+__glXColorSubTableReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
-    GLenum target      = * (GLenum *)(pc + 20);
-    GLsizei count      = *(GLsizei *)(pc + 28);
-    GLenum format      = * (GLenum *)(pc + 32);
-    GLenum type        = * (GLenum *)(pc + 36);
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
+    GLenum target = *(GLenum *) (pc + 20);
+    GLsizei count = *(GLsizei *) (pc + 28);
+    GLenum format = *(GLenum *) (pc + 32);
+    GLenum type = *(GLenum *) (pc + 36);
 
     if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
-        SWAP_32( target );
-        SWAP_32( count );
-        SWAP_32( format );
-        SWAP_32( type );
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
+        target = bswap_32(target);
+        count = bswap_32(count);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, target, count, 1, 1,
@@ -478,26 +472,26 @@ __glXColorSubTableReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXConvolutionFilter1DReqSize( const GLbyte * pc, Bool swap )
+__glXConvolutionFilter1DReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
-    GLenum target      = * (GLenum *)(pc + 20);
-    GLsizei width      = *(GLsizei *)(pc + 28);
-    GLenum format      = * (GLenum *)(pc + 36);
-    GLenum type        = * (GLenum *)(pc + 40);
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
+    GLenum target = *(GLenum *) (pc + 20);
+    GLsizei width = *(GLsizei *) (pc + 28);
+    GLenum format = *(GLenum *) (pc + 36);
+    GLenum type = *(GLenum *) (pc + 40);
 
     if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
-        SWAP_32( target );
-        SWAP_32( width );
-        SWAP_32( format );
-        SWAP_32( type );
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
+        target = bswap_32(target);
+        width = bswap_32(width);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, target, width, 1, 1,
@@ -506,28 +500,28 @@ __glXConvolutionFilter1DReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXConvolutionFilter2DReqSize( const GLbyte * pc, Bool swap )
+__glXConvolutionFilter2DReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
+    GLint row_length = *(GLint *) (pc + 4);
     GLint image_height = 0;
-    GLint skip_images  = 0;
-    GLint skip_rows    = *  (GLint *)(pc +  8);
-    GLint alignment    = *  (GLint *)(pc + 16);
-    GLenum target      = * (GLenum *)(pc + 20);
-    GLsizei width      = *(GLsizei *)(pc + 28);
-    GLsizei height     = *(GLsizei *)(pc + 32);
-    GLenum format      = * (GLenum *)(pc + 36);
-    GLenum type        = * (GLenum *)(pc + 40);
-
-    if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( skip_rows );
-        SWAP_32( alignment );
-        SWAP_32( target );
-        SWAP_32( width );
-        SWAP_32( height );
-        SWAP_32( format );
-        SWAP_32( type );
+    GLint skip_images = 0;
+    GLint skip_rows = *(GLint *) (pc + 8);
+    GLint alignment = *(GLint *) (pc + 16);
+    GLenum target = *(GLenum *) (pc + 20);
+    GLsizei width = *(GLsizei *) (pc + 28);
+    GLsizei height = *(GLsizei *) (pc + 32);
+    GLenum format = *(GLenum *) (pc + 36);
+    GLenum type = *(GLenum *) (pc + 40);
+
+    if (swap) {
+        row_length = bswap_32(row_length);
+        skip_rows = bswap_32(skip_rows);
+        alignment = bswap_32(alignment);
+        target = bswap_32(target);
+        width = bswap_32(width);
+        height = bswap_32(height);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, target, width, height, 1,
@@ -536,13 +530,13 @@ __glXConvolutionFilter2DReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXConvolutionParameterfvReqSize( const GLbyte * pc, Bool swap )
+__glXConvolutionParameterfvReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 4);
+    GLenum pname = *(GLenum *) (pc + 4);
     GLsizei compsize;
 
     if (swap) {
-        SWAP_32( pname );
+        pname = bswap_32(pname);
     }
 
     compsize = __glConvolutionParameterfv_size(pname);
@@ -550,32 +544,32 @@ __glXConvolutionParameterfvReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXTexImage3DReqSize( const GLbyte * pc, Bool swap )
+__glXTexImage3DReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
-    GLint image_height = *  (GLint *)(pc +  8);
-    GLint skip_rows    = *  (GLint *)(pc + 16);
-    GLint skip_images  = *  (GLint *)(pc + 20);
-    GLint alignment    = *  (GLint *)(pc + 32);
-    GLenum target      = * (GLenum *)(pc + 36);
-    GLsizei width      = *(GLsizei *)(pc + 48);
-    GLsizei height     = *(GLsizei *)(pc + 52);
-    GLsizei depth      = *(GLsizei *)(pc + 56);
-    GLenum format      = * (GLenum *)(pc + 68);
-    GLenum type        = * (GLenum *)(pc + 72);
+    GLint row_length = *(GLint *) (pc + 4);
+    GLint image_height = *(GLint *) (pc + 8);
+    GLint skip_rows = *(GLint *) (pc + 16);
+    GLint skip_images = *(GLint *) (pc + 20);
+    GLint alignment = *(GLint *) (pc + 32);
+    GLenum target = *(GLenum *) (pc + 36);
+    GLsizei width = *(GLsizei *) (pc + 48);
+    GLsizei height = *(GLsizei *) (pc + 52);
+    GLsizei depth = *(GLsizei *) (pc + 56);
+    GLenum format = *(GLenum *) (pc + 68);
+    GLenum type = *(GLenum *) (pc + 72);
 
     if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( image_height );
-        SWAP_32( skip_rows );
-        SWAP_32( skip_images );
-        SWAP_32( alignment );
-        SWAP_32( target );
-        SWAP_32( width );
-        SWAP_32( height );
-        SWAP_32( depth );
-        SWAP_32( format );
-        SWAP_32( type );
+        row_length = bswap_32(row_length);
+        image_height = bswap_32(image_height);
+        skip_rows = bswap_32(skip_rows);
+        skip_images = bswap_32(skip_images);
+        alignment = bswap_32(alignment);
+        target = bswap_32(target);
+        width = bswap_32(width);
+        height = bswap_32(height);
+        depth = bswap_32(depth);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, target, width, height, depth,
@@ -584,32 +578,32 @@ __glXTexImage3DReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXTexSubImage3DReqSize( const GLbyte * pc, Bool swap )
+__glXTexSubImage3DReqSize(const GLbyte *pc, Bool swap)
 {
-    GLint row_length   = *  (GLint *)(pc +  4);
-    GLint image_height = *  (GLint *)(pc +  8);
-    GLint skip_rows    = *  (GLint *)(pc + 16);
-    GLint skip_images  = *  (GLint *)(pc + 20);
-    GLint alignment    = *  (GLint *)(pc + 32);
-    GLenum target      = * (GLenum *)(pc + 36);
-    GLsizei width      = *(GLsizei *)(pc + 60);
-    GLsizei height     = *(GLsizei *)(pc + 64);
-    GLsizei depth      = *(GLsizei *)(pc + 68);
-    GLenum format      = * (GLenum *)(pc + 76);
-    GLenum type        = * (GLenum *)(pc + 80);
+    GLint row_length = *(GLint *) (pc + 4);
+    GLint image_height = *(GLint *) (pc + 8);
+    GLint skip_rows = *(GLint *) (pc + 16);
+    GLint skip_images = *(GLint *) (pc + 20);
+    GLint alignment = *(GLint *) (pc + 32);
+    GLenum target = *(GLenum *) (pc + 36);
+    GLsizei width = *(GLsizei *) (pc + 60);
+    GLsizei height = *(GLsizei *) (pc + 64);
+    GLsizei depth = *(GLsizei *) (pc + 68);
+    GLenum format = *(GLenum *) (pc + 76);
+    GLenum type = *(GLenum *) (pc + 80);
 
     if (swap) {
-        SWAP_32( row_length );
-        SWAP_32( image_height );
-        SWAP_32( skip_rows );
-        SWAP_32( skip_images );
-        SWAP_32( alignment );
-        SWAP_32( target );
-        SWAP_32( width );
-        SWAP_32( height );
-        SWAP_32( depth );
-        SWAP_32( format );
-        SWAP_32( type );
+        row_length = bswap_32(row_length);
+        image_height = bswap_32(image_height);
+        skip_rows = bswap_32(skip_rows);
+        skip_images = bswap_32(skip_images);
+        alignment = bswap_32(alignment);
+        target = bswap_32(target);
+        width = bswap_32(width);
+        height = bswap_32(height);
+        depth = bswap_32(depth);
+        format = bswap_32(format);
+        type = bswap_32(type);
     }
 
     return __glXImageSize(format, type, target, width, height, depth,
@@ -618,221 +612,221 @@ __glXTexSubImage3DReqSize( const GLbyte * pc, Bool swap )
 }
 
 int
-__glXDrawBuffersARBReqSize( const GLbyte * pc, Bool swap )
+__glXCompressedTexImage1DARBReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei n          = *(GLsizei *)(pc + 0);
+    GLsizei imageSize = *(GLsizei *) (pc + 20);
 
     if (swap) {
-        SWAP_32( n );
+        imageSize = bswap_32(imageSize);
     }
 
-    return __GLX_PAD((n * 4));
+    return __GLX_PAD(imageSize);
 }
 
 int
-__glXPointParameterfvEXTReqSize( const GLbyte * pc, Bool swap )
+__glXCompressedTexImage2DARBReqSize(const GLbyte *pc, Bool swap)
 {
-    GLenum pname       = * (GLenum *)(pc + 0);
-    GLsizei compsize;
+    GLsizei imageSize = *(GLsizei *) (pc + 24);
 
     if (swap) {
-        SWAP_32( pname );
+        imageSize = bswap_32(imageSize);
     }
 
-    compsize = __glPointParameterfvEXT_size(pname);
-    return __GLX_PAD((compsize * 4));
+    return __GLX_PAD(imageSize);
 }
 
 int
-__glXCompressedTexImage3DARBReqSize( const GLbyte * pc, Bool swap )
+__glXCompressedTexImage3DARBReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei imageSize  = *(GLsizei *)(pc + 28);
+    GLsizei imageSize = *(GLsizei *) (pc + 28);
 
     if (swap) {
-        SWAP_32( imageSize );
+        imageSize = bswap_32(imageSize);
     }
 
     return __GLX_PAD(imageSize);
 }
 
 int
-__glXCompressedTexImage2DARBReqSize( const GLbyte * pc, Bool swap )
+__glXCompressedTexSubImage3DARBReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei imageSize  = *(GLsizei *)(pc + 24);
+    GLsizei imageSize = *(GLsizei *) (pc + 36);
 
     if (swap) {
-        SWAP_32( imageSize );
+        imageSize = bswap_32(imageSize);
     }
 
     return __GLX_PAD(imageSize);
 }
 
 int
-__glXCompressedTexImage1DARBReqSize( const GLbyte * pc, Bool swap )
+__glXProgramStringARBReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei imageSize  = *(GLsizei *)(pc + 20);
+    GLsizei len = *(GLsizei *) (pc + 8);
 
     if (swap) {
-        SWAP_32( imageSize );
+        len = bswap_32(len);
     }
 
-    return __GLX_PAD(imageSize);
+    return __GLX_PAD(len);
 }
 
 int
-__glXCompressedTexSubImage3DARBReqSize( const GLbyte * pc, Bool swap )
+__glXDrawBuffersARBReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei imageSize  = *(GLsizei *)(pc + 36);
+    GLsizei n = *(GLsizei *) (pc + 0);
 
     if (swap) {
-        SWAP_32( imageSize );
+        n = bswap_32(n);
     }
 
-    return __GLX_PAD(imageSize);
+    return __GLX_PAD((n * 4));
 }
 
 int
-__glXLoadProgramNVReqSize( const GLbyte * pc, Bool swap )
+__glXPointParameterfvEXTReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei len        = *(GLsizei *)(pc + 8);
+    GLenum pname = *(GLenum *) (pc + 0);
+    GLsizei compsize;
 
     if (swap) {
-        SWAP_32( len );
+        pname = bswap_32(pname);
     }
 
-    return __GLX_PAD(len);
+    compsize = __glPointParameterfvEXT_size(pname);
+    return __GLX_PAD((compsize * 4));
 }
 
 int
-__glXProgramParameters4dvNVReqSize( const GLbyte * pc, Bool swap )
+__glXProgramParameters4dvNVReqSize(const GLbyte *pc, Bool swap)
 {
-    GLuint num         = * (GLuint *)(pc + 8);
+    GLuint num = *(GLuint *) (pc + 8);
 
     if (swap) {
-        SWAP_32( num );
+        num = bswap_32(num);
     }
 
     return __GLX_PAD((num * 32));
 }
 
 int
-__glXProgramParameters4fvNVReqSize( const GLbyte * pc, Bool swap )
+__glXProgramParameters4fvNVReqSize(const GLbyte *pc, Bool swap)
 {
-    GLuint num         = * (GLuint *)(pc + 8);
+    GLuint num = *(GLuint *) (pc + 8);
 
     if (swap) {
-        SWAP_32( num );
+        num = bswap_32(num);
     }
 
     return __GLX_PAD((num * 16));
 }
 
 int
-__glXVertexAttribs1dvNVReqSize( const GLbyte * pc, Bool swap )
+__glXVertexAttribs1dvNVReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei n          = *(GLsizei *)(pc + 4);
+    GLsizei n = *(GLsizei *) (pc + 4);
 
     if (swap) {
-        SWAP_32( n );
+        n = bswap_32(n);
     }
 
     return __GLX_PAD((n * 8));
 }
 
 int
-__glXVertexAttribs2dvNVReqSize( const GLbyte * pc, Bool swap )
+__glXVertexAttribs2dvNVReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei n          = *(GLsizei *)(pc + 4);
+    GLsizei n = *(GLsizei *) (pc + 4);
 
     if (swap) {
-        SWAP_32( n );
+        n = bswap_32(n);
     }
 
     return __GLX_PAD((n * 16));
 }
 
 int
-__glXVertexAttribs3dvNVReqSize( const GLbyte * pc, Bool swap )
+__glXVertexAttribs3dvNVReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei n          = *(GLsizei *)(pc + 4);
+    GLsizei n = *(GLsizei *) (pc + 4);
 
     if (swap) {
-        SWAP_32( n );
+        n = bswap_32(n);
     }
 
     return __GLX_PAD((n * 24));
 }
 
 int
-__glXVertexAttribs3fvNVReqSize( const GLbyte * pc, Bool swap )
+__glXVertexAttribs3fvNVReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei n          = *(GLsizei *)(pc + 4);
+    GLsizei n = *(GLsizei *) (pc + 4);
 
     if (swap) {
-        SWAP_32( n );
+        n = bswap_32(n);
     }
 
     return __GLX_PAD((n * 12));
 }
 
 int
-__glXVertexAttribs3svNVReqSize( const GLbyte * pc, Bool swap )
+__glXVertexAttribs3svNVReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei n          = *(GLsizei *)(pc + 4);
+    GLsizei n = *(GLsizei *) (pc + 4);
 
     if (swap) {
-        SWAP_32( n );
+        n = bswap_32(n);
     }
 
     return __GLX_PAD((n * 6));
 }
 
 int
-__glXVertexAttribs4dvNVReqSize( const GLbyte * pc, Bool swap )
+__glXVertexAttribs4dvNVReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei n          = *(GLsizei *)(pc + 4);
+    GLsizei n = *(GLsizei *) (pc + 4);
 
     if (swap) {
-        SWAP_32( n );
+        n = bswap_32(n);
     }
 
     return __GLX_PAD((n * 32));
 }
 
 int
-__glXProgramNamedParameter4fvNVReqSize( const GLbyte * pc, Bool swap )
+__glXProgramNamedParameter4fvNVReqSize(const GLbyte *pc, Bool swap)
 {
-    GLsizei len        = *(GLsizei *)(pc + 4);
+    GLsizei len = *(GLsizei *) (pc + 4);
 
     if (swap) {
-        SWAP_32( len );
+        len = bswap_32(len);
     }
 
     return __GLX_PAD(len);
 }
 
-ALIAS( Fogiv, Fogfv )
-ALIAS( Lightiv, Lightfv )
-ALIAS( LightModeliv, LightModelfv )
-ALIAS( Materialiv, Materialfv )
-ALIAS( TexParameteriv, TexParameterfv )
-ALIAS( TexEnviv, TexEnvfv )
-ALIAS( TexGeniv, TexGenfv )
-ALIAS( PixelMapuiv, PixelMapfv )
-ALIAS( ColorTableParameteriv, ColorTableParameterfv )
-ALIAS( ConvolutionParameteriv, ConvolutionParameterfv )
-ALIAS( CompressedTexSubImage2DARB, CompressedTexImage3DARB )
-ALIAS( CompressedTexSubImage1DARB, CompressedTexImage1DARB )
-ALIAS( RequestResidentProgramsNV, DrawBuffersARB )
-ALIAS( VertexAttribs1fvNV, PixelMapfv )
-ALIAS( VertexAttribs1svNV, PixelMapusv )
-ALIAS( VertexAttribs2fvNV, VertexAttribs1dvNV )
-ALIAS( VertexAttribs2svNV, PixelMapfv )
-ALIAS( VertexAttribs4fvNV, VertexAttribs2dvNV )
-ALIAS( VertexAttribs4svNV, VertexAttribs1dvNV )
-ALIAS( VertexAttribs4ubvNV, PixelMapfv )
-ALIAS( PointParameterivNV, PointParameterfvEXT )
-ALIAS( ProgramStringARB, LoadProgramNV )
-ALIAS( ProgramNamedParameter4dvNV, CompressedTexSubImage3DARB )
-ALIAS( DeleteRenderbuffersEXT, DrawBuffersARB )
-ALIAS( DeleteFramebuffersEXT, DrawBuffersARB )
+ALIAS(Fogiv, Fogfv)
+    ALIAS(Lightiv, Lightfv)
+    ALIAS(LightModeliv, LightModelfv)
+    ALIAS(Materialiv, Materialfv)
+    ALIAS(TexParameteriv, TexParameterfv)
+    ALIAS(TexEnviv, TexEnvfv)
+    ALIAS(TexGeniv, TexGenfv)
+    ALIAS(PixelMapuiv, PixelMapfv)
+    ALIAS(ColorTableParameteriv, ColorTableParameterfv)
+    ALIAS(ConvolutionParameteriv, ConvolutionParameterfv)
+    ALIAS(CompressedTexSubImage1DARB, CompressedTexImage1DARB)
+    ALIAS(CompressedTexSubImage2DARB, CompressedTexImage3DARB)
+    ALIAS(LoadProgramNV, ProgramStringARB)
+    ALIAS(RequestResidentProgramsNV, DrawBuffersARB)
+    ALIAS(VertexAttribs1fvNV, PixelMapfv)
+    ALIAS(VertexAttribs1svNV, PixelMapusv)
+    ALIAS(VertexAttribs2fvNV, VertexAttribs1dvNV)
+    ALIAS(VertexAttribs2svNV, PixelMapfv)
+    ALIAS(VertexAttribs4fvNV, VertexAttribs2dvNV)
+    ALIAS(VertexAttribs4svNV, VertexAttribs1dvNV)
+    ALIAS(VertexAttribs4ubvNV, PixelMapfv)
+    ALIAS(PointParameterivNV, PointParameterfvEXT)
+    ALIAS(ProgramNamedParameter4dvNV, CompressedTexSubImage3DARB)
+    ALIAS(DeleteFramebuffersEXT, DrawBuffersARB)
+    ALIAS(DeleteRenderbuffersEXT, DrawBuffersARB)
diff --git a/GL/glx/indirect_reqsize.h b/GL/glx/indirect_reqsize.h
index 23bc41c78..26211ee5c 100644
--- a/GL/glx/indirect_reqsize.h
+++ b/GL/glx/indirect_reqsize.h
@@ -83,14 +83,15 @@ extern PURE HIDDEN int __glXConvolutionParameterivReqSize(const GLbyte *pc, Bool
 extern PURE HIDDEN int __glXSeparableFilter2DReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXTexImage3DReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXTexSubImage3DReqSize(const GLbyte *pc, Bool swap);
-extern PURE HIDDEN int __glXDrawBuffersARBReqSize(const GLbyte *pc, Bool swap);
-extern PURE HIDDEN int __glXPointParameterfvEXTReqSize(const GLbyte *pc, Bool swap);
-extern PURE HIDDEN int __glXCompressedTexImage3DARBReqSize(const GLbyte *pc, Bool swap);
-extern PURE HIDDEN int __glXCompressedTexImage2DARBReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXCompressedTexImage1DARBReqSize(const GLbyte *pc, Bool swap);
-extern PURE HIDDEN int __glXCompressedTexSubImage3DARBReqSize(const GLbyte *pc, Bool swap);
-extern PURE HIDDEN int __glXCompressedTexSubImage2DARBReqSize(const GLbyte *pc, Bool swap);
+extern PURE HIDDEN int __glXCompressedTexImage2DARBReqSize(const GLbyte *pc, Bool swap);
+extern PURE HIDDEN int __glXCompressedTexImage3DARBReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXCompressedTexSubImage1DARBReqSize(const GLbyte *pc, Bool swap);
+extern PURE HIDDEN int __glXCompressedTexSubImage2DARBReqSize(const GLbyte *pc, Bool swap);
+extern PURE HIDDEN int __glXCompressedTexSubImage3DARBReqSize(const GLbyte *pc, Bool swap);
+extern PURE HIDDEN int __glXProgramStringARBReqSize(const GLbyte *pc, Bool swap);
+extern PURE HIDDEN int __glXDrawBuffersARBReqSize(const GLbyte *pc, Bool swap);
+extern PURE HIDDEN int __glXPointParameterfvEXTReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXLoadProgramNVReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXProgramParameters4dvNVReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXProgramParameters4fvNVReqSize(const GLbyte *pc, Bool swap);
@@ -109,11 +110,10 @@ extern PURE HIDDEN int __glXVertexAttribs4fvNVReqSize(const GLbyte *pc, Bool swa
 extern PURE HIDDEN int __glXVertexAttribs4svNVReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXVertexAttribs4ubvNVReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXPointParameterivNVReqSize(const GLbyte *pc, Bool swap);
-extern PURE HIDDEN int __glXProgramStringARBReqSize(const GLbyte *pc, Bool swap);
-extern PURE HIDDEN int __glXProgramNamedParameter4fvNVReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXProgramNamedParameter4dvNVReqSize(const GLbyte *pc, Bool swap);
-extern PURE HIDDEN int __glXDeleteRenderbuffersEXTReqSize(const GLbyte *pc, Bool swap);
+extern PURE HIDDEN int __glXProgramNamedParameter4fvNVReqSize(const GLbyte *pc, Bool swap);
 extern PURE HIDDEN int __glXDeleteFramebuffersEXTReqSize(const GLbyte *pc, Bool swap);
+extern PURE HIDDEN int __glXDeleteRenderbuffersEXTReqSize(const GLbyte *pc, Bool swap);
 
 #  undef HIDDEN
 #  undef PURE
diff --git a/GL/glx/indirect_texture_compression.c b/GL/glx/indirect_texture_compression.c
index 35af1d235..3c09663fc 100644
--- a/GL/glx/indirect_texture_compression.c
+++ b/GL/glx/indirect_texture_compression.c
@@ -29,6 +29,7 @@
 #endif
 
 #include "glxserver.h"
+#include "glxbyteorder.h"
 #include "glxext.h"
 #include "singlesize.h"
 #include "unpack.h"
@@ -39,20 +40,6 @@
 #include "glthread.h"
 #include "dispatch.h"
 
-#if defined(__linux__) || defined (__GLIBC__) || defined (__GNU__)
-#include <byteswap.h>
-#elif defined(__OpenBSD__)
-#include <sys/endian.h>
-#define bswap_16 __swap16
-#define bswap_32 __swap32
-#define bswap_64 __swap64
-#else
-#include <sys/endian.h>
-#define bswap_16 bswap16
-#define bswap_32 bswap32
-#define bswap_64 bswap64
-#endif
-
 int __glXDisp_GetCompressedTexImageARB(struct __GLXclientStateRec *cl, GLbyte *pc)
 {
     xGLXSingleReq * const req = (xGLXSingleReq *) pc;
diff --git a/GL/glx/indirect_util.c b/GL/glx/indirect_util.c
index 09b7ab87c..58c194c99 100644
--- a/GL/glx/indirect_util.c
+++ b/GL/glx/indirect_util.c
@@ -23,29 +23,21 @@
  * SOFTWARE.
  */
 
+#ifdef HAVE_DIX_CONFIG_H
+#include <dix-config.h>
+#endif
+
 #include <string.h>
 
 #include <X11/Xmd.h>
 #include <GL/gl.h>
 #include <GL/glxproto.h>
-#if defined(__linux__) || defined (__GLIBC__) || defined(__GNU__)
-#include <byteswap.h>
-#elif defined(__OpenBSD__)
-#include <sys/endian.h>
-#define bswap_16 __swap16
-#define bswap_32 __swap32
-#define bswap_64 __swap64
-#else
-#include <sys/endian.h>
-#define bswap_16 bswap16
-#define bswap_32 bswap32
-#define bswap_64 bswap64
-#endif
 #include <inttypes.h>
 #include "indirect_size.h"
 #include "indirect_size_get.h"
 #include "indirect_dispatch.h"
 #include "glxserver.h"
+#include "glxbyteorder.h"
 #include "singlesize.h"
 #include "glapitable.h"
 #include "glapi.h"
diff --git a/GL/glx/swap_interval.c b/GL/glx/swap_interval.c
index c4137c1aa..24abd69fa 100644
--- a/GL/glx/swap_interval.c
+++ b/GL/glx/swap_interval.c
@@ -39,20 +39,7 @@
 #include "glthread.h"
 #include "dispatch.h"
 #include "glapioffsets.h"
-
-#if defined(__linux__) || defined (__GLIBC__) || defined (__GNU__)
-#include <byteswap.h>
-#elif defined(__OpenBSD__)
-#include <sys/endian.h>
-#define bswap_16 __swap16
-#define bswap_32 __swap32
-#define bswap_64 __swap64
-#else
-#include <sys/endian.h>
-#define bswap_16 bswap16
-#define bswap_32 bswap32
-#define bswap_64 bswap64
-#endif
+#include "glxbyteorder.h"
 
 static int DoSwapInterval(__GLXclientState *cl, GLbyte *pc, int do_swap);
 
diff --git a/GL/mesa/X/xf86glx.c b/GL/mesa/X/xf86glx.c
index 94959d628..47c87f6d9 100644
--- a/GL/mesa/X/xf86glx.c
+++ b/GL/mesa/X/xf86glx.c
@@ -78,6 +78,7 @@ typedef struct __GLXMESAdrawable __GLXMESAdrawable;
 struct __GLXMESAscreen {
     __GLXscreen   base;
     int           index;
+    int		  num_vis;
     XMesaVisual  *xm_vis;
 };
 
@@ -280,7 +281,7 @@ __glXMesaScreenDestroy(__GLXscreen *screen)
     __GLXMESAscreen *mesaScreen = (__GLXMESAscreen *) screen;
     int i;
 
-    for (i = 0; i < screen->numVisuals; i++) {
+    for (i = 0; i < mesaScreen->num_vis; i++) {
 	if (mesaScreen->xm_vis[i])
 	    XMesaDestroyVisual(mesaScreen->xm_vis[i]);
     }
@@ -389,6 +390,7 @@ static void init_screen_visuals(__GLXMESAscreen *screen)
 
     xfree(used);
 
+    screen->num_vis = pScreen->numVisuals;
     screen->xm_vis = pXMesaVisual;
 }
 
diff --git a/Xext/security.c b/Xext/security.c
index 424677910..888b1c320 100644
--- a/Xext/security.c
+++ b/Xext/security.c
@@ -946,10 +946,10 @@ SecurityAuditResourceIDAccess(
  *	rtype is its type or class.
  *	access_mode represents the intended use of the resource; see
  *	  resource.h.
- *	rval is a pointer to the resource structure for this resource.
+ *	res is a pointer to the resource structure for this resource.
  *
  * Returns:
- *	If access is granted, the value of rval that was passed in, else NULL.
+ *	If access is granted, the value of rval that was passed in, else FALSE.
  *
  * Side Effects:
  *	Disallowed resource accesses are audited.
diff --git a/cfb/cfbmskbits.h b/cfb/cfbmskbits.h
index 7aa446cb5..6076269b3 100644
--- a/cfb/cfbmskbits.h
+++ b/cfb/cfbmskbits.h
@@ -32,10 +32,7 @@ THE USE OR PERFORMANCE OF THIS SOFTWARE.
 #include	<X11/X.h>
 #include	<X11/Xmd.h>
 #include	"servermd.h"
-#if defined(XFREE86) || ( defined(__OpenBSD__) && defined(__alpha__) ) \
-	|| (defined(__bsdi__))
 #include	"compiler.h"
-#endif
 
 /*
  * ==========================================================================
diff --git a/config/config.c b/config/config.c
index 523327d04..76191abd4 100644
--- a/config/config.c
+++ b/config/config.c
@@ -29,6 +29,7 @@
 #define DBUS_API_SUBJECT_TO_CHANGE
 #include <dbus/dbus.h>
 #include <string.h>
+#include <sys/select.h>
 
 #include <X11/X.h>
 
diff --git a/configure.ac b/configure.ac
index e1cab3a53..400c5947e 100644
--- a/configure.ac
+++ b/configure.ac
@@ -99,6 +99,64 @@ fi
 
 AC_TYPE_PID_T
 
+# Checks for headers/macros for byte swapping
+# Known variants:
+#	<byteswap.h> bswap_16, bswap_32, bswap_64  (glibc)
+#	<sys/endian.h> __swap16, __swap32, __swap64 (OpenBSD)
+#	<sys/endian.h> bswap16, bswap32, bswap64 (other BSD's)
+#	and a fallback to local macros if none of the above are found
+
+# if <byteswap.h> is found, assume it's the correct version
+AC_CHECK_HEADERS([byteswap.h])
+
+# if <sys/endian.h> is found, have to check which version
+AC_CHECK_HEADER([sys/endian.h], [HAVE_SYS_ENDIAN_H="yes"], [HAVE_SYS_ENDIAN_H="no"])
+
+if test "x$HAVE_SYS_ENDIAN_H" = "xyes" ; then
+	AC_MSG_CHECKING([for __swap16 variant of <sys/endian.h> byteswapping macros])
+	AC_LINK_IFELSE([AC_LANG_PROGRAM([
+#include <sys/endian.h>
+ ], [
+int a = 1, b;
+b = __swap16(a);
+ ])
+], [SYS_ENDIAN__SWAP='yes'], [SYS_ENDIAN__SWAP='no'])
+	AC_MSG_RESULT([$SYS_ENDIAN__SWAP])
+
+	AC_MSG_CHECKING([for bswap_16 variant of <sys/endian.h> byteswapping macros])
+	AC_LINK_IFELSE([AC_LANG_PROGRAM([
+#include <sys/endian.h>
+ ], [
+int a = 1, b;
+b = bswap_16(a);
+ ])
+], [SYS_ENDIAN_BSWAP='yes'], [SYS_ENDIAN_BSWAP='no'])
+	AC_MSG_RESULT([$SYS_ENDIAN_BSWAP])
+
+    	if test "$SYS_ENDIAN_BSWAP" = "yes" ; then
+		USE_SYS_ENDIAN_H=yes
+		BSWAP=bswap_
+	else	
+	    	if test "$SYS_ENDIAN__SWAP" = "yes" ; then
+			USE_SYS_ENDIAN_H=yes
+			BSWAP=__swap
+		else
+			USE_SYS_ENDIAN_H=no
+		fi
+	fi
+
+	if test "$USE_SYS_ENDIAN_H" = "yes" ; then
+	    AC_DEFINE([USE_SYS_ENDIAN_H], 1, 
+		[Define to use byteswap macros from <sys/endian.h>])
+	    AC_DEFINE_UNQUOTED([bswap_16], ${BSWAP}16, 
+			[Define to 16-bit byteswap macro])
+	    AC_DEFINE_UNQUOTED([bswap_32], ${BSWAP}32, 
+			[Define to 32-bit byteswap macro])
+	    AC_DEFINE_UNQUOTED([bswap_64], ${BSWAP}64, 
+			[Define to 64-bit byteswap macro])
+	fi
+fi
+
 dnl Checks for library functions.
 AC_FUNC_VPRINTF
 AC_CHECK_FUNCS([geteuid getuid link memmove memset mkstemp strchr strrchr \
@@ -295,6 +353,9 @@ case $host_os in
 	DRI=yes
 	KDRIVE_HW=yes
 	;;
+  *solaris*)
+	PKG_CHECK_EXISTS(libdrm, DRI=yes, DRI=no)
+	;;
 esac
 AM_CONDITIONAL(KDRIVE_HW, test "x$KDRIVE_HW" = xyes)
 
@@ -305,6 +366,8 @@ if test "x$use_x86_asm" = xyes && test "x$GCC" = xyes ; then
     #error Not supported
 #endif
 ], mmx_capable=yes, mmx_capable=no)
+else
+	mmx_capable=no
 fi
 AC_MSG_RESULT([$mmx_capable])
 AM_CONDITIONAL(MMX_CAPABLE, [test "x$mmx_capable" = xyes])
@@ -335,11 +398,11 @@ AC_ARG_ENABLE(debug,         AS_HELP_STRING([--enable-debug],
 AC_ARG_WITH(int10,           AS_HELP_STRING([--with-int10=BACKEND], [int10 backend: vm86, x86emu or stub]),
 				[INT10="$withval"],
 				[INT10="$DEFAULT_INT10"])
-AC_ARG_WITH(vendor-name,     AS_HELP_STRING([--with-vendor-string=VENDOR],
+AC_ARG_WITH(vendor-name,     AS_HELP_STRING([--with-vendor-name=VENDOR],
 				  [Vendor string reported by the server]),
 			     	[ VENDOR_STRING="$withval" ],
 			     	[ VENDOR_STRING="$DEFAULT_VENDOR_NAME" ])
-AC_ARG_WITH(vendor-name-short, AS_HELP_STRING([--with-vendor-string-short=VENDOR],
+AC_ARG_WITH(vendor-name-short, AS_HELP_STRING([--with-vendor-name-short=VENDOR],
 				  [Short version of vendor string reported by the server]),
 			     	[ VENDOR_STRING_SHORT="$withval" ],
 			     	[ VENDOR_STRING_SHORT="$DEFAULT_VENDOR_NAME_SHORT" ])
@@ -544,7 +607,7 @@ XEXT_LIB='$(top_builddir)/Xext/libXext.la'
 XEXTXORG_LIB='$(top_builddir)/Xext/libXextbuiltin.la'
 
 dnl Core modules for most extensions, et al.
-REQUIRED_MODULES="[randrproto >= 1.2] renderproto [fixesproto >= 4.0] damageproto xcmiscproto xextproto xproto xtrans [scrnsaverproto >= 1.1] bigreqsproto resourceproto fontsproto [inputproto >= 1.4] [kbproto >= 1.0.3]"
+REQUIRED_MODULES="[randrproto >= 1.2] renderproto [fixesproto >= 4.0] [damageproto >= 1.1] xcmiscproto xextproto xproto xtrans [scrnsaverproto >= 1.1] bigreqsproto resourceproto fontsproto [inputproto >= 1.4] [kbproto >= 1.0.3]"
 REQUIRED_LIBS="xfont xau fontenc"
 
 if test "x$DBUS" = xauto; then
@@ -615,7 +678,7 @@ fi
 
 if test "x$GLX" = xyes && ! test "x$MESA_SOURCE" = x; then
 	PKG_CHECK_MODULES([XLIB], [x11])
-	PKG_CHECK_MODULES([GL], [glproto >= 1.4.7])
+	PKG_CHECK_MODULES([GL], [glproto >= 1.4.8])
 	AC_SUBST(XLIB_CFLAGS)
 	AC_DEFINE(GLXEXT, 1, [Build GLX extension])
 	GLX_LIBS='$(top_builddir)/GL/glx/libglx.la $(top_builddir)/GL/mesa/libGLcore.la'
@@ -1693,20 +1756,13 @@ AC_SUBST(XKB_COMPILED_DIR)
 dnl and the rest of these are generic, so they're in config.h
 AC_DEFINE(XResExtension, 1, [Build XRes extension])
 
-dnl CYGWIN does not define fd_set if _POSIX_SOURCE is defined
-dnl _*_SOURCE on Solaris restricts to the standards, and removes non-standard
-dnl functions which X uses
-case $host_os in
-	cygwin*) ;;
-	solaris*) ;;
-        darwin*) ;;
-	freebsd*|netbsd*|openbsd*) ;;
-	*) 
-		AC_DEFINE(_POSIX_SOURCE, 1, [POSIX-compliant source])
-		AC_DEFINE(_XOPEN_SOURCE, 500, [X/Open-compliant source])
-		AC_DEFINE(_BSD_SOURCE, 1, [BSD-compliant source])
-		;;
-esac
+AC_TRY_COMPILE([
+#include <features.h>
+#ifndef __GLIBC__
+#error not glibc
+#endif
+], [], [AC_DEFINE(_GNU_SOURCE, 1,
+	[ Enable GNU and other extensions to the C environment for glibc])])
 
 AC_DEFINE_DIR(PROJECTROOT, prefix, [Overall prefix])
 
diff --git a/damageext/damageext.c b/damageext/damageext.c
index 6083693a4..ae1091eaf 100755
--- a/damageext/damageext.c
+++ b/damageext/damageext.c
@@ -279,10 +279,35 @@ ProcDamageSubtract (ClientPtr client)
     return (client->noClientException);
 }
 
+static int
+ProcDamageAdd (ClientPtr client)
+{
+    REQUEST(xDamageAddReq);
+    DrawablePtr	    pDrawable;
+    RegionPtr	    pRegion;
+    int		    rc;
+
+    REQUEST_SIZE_MATCH(xDamageAddReq);
+    VERIFY_REGION(pRegion, stuff->region, client, DixWriteAccess);
+    rc = dixLookupDrawable(&pDrawable, stuff->drawable, client, 0,
+			   DixReadAccess);
+    if (rc != Success)
+	return rc;
+
+    /* The region is relative to the drawable origin, so translate it out to
+     * screen coordinates like damage expects.
+     */
+    REGION_TRANSLATE(pScreen, pRegion, pDrawable->x, pDrawable->y);
+    DamageDamageRegion(pDrawable, pRegion);
+    REGION_TRANSLATE(pScreen, pRegion, -pDrawable->x, -pDrawable->y);
+
+    return (client->noClientException);
+}
+
 /* Major version controls available requests */
 static const int version_requests[] = {
     X_DamageQueryVersion,	/* before client sends QueryVersion */
-    X_DamageSubtract,		/* Version 1 */
+    X_DamageAdd,		/* Version 1 */
 };
 
 #define NUM_VERSION_REQUESTS	(sizeof (version_requests) / sizeof (version_requests[0]))
@@ -293,6 +318,8 @@ int	(*ProcDamageVector[XDamageNumberRequests])(ClientPtr) = {
     ProcDamageCreate,
     ProcDamageDestroy,
     ProcDamageSubtract,
+/*************** Version 1.1 ****************/
+    ProcDamageAdd,
 };
 
 
@@ -361,12 +388,27 @@ SProcDamageSubtract (ClientPtr client)
     return (*ProcDamageVector[stuff->damageReqType]) (client);
 }
 
+static int
+SProcDamageAdd (ClientPtr client)
+{
+    register int n;
+    REQUEST(xDamageAddReq);
+
+    swaps (&stuff->length, n);
+    REQUEST_SIZE_MATCH(xDamageSubtractReq);
+    swapl (&stuff->drawable, n);
+    swapl (&stuff->region, n);
+    return (*ProcDamageVector[stuff->damageReqType]) (client);
+}
+
 int	(*SProcDamageVector[XDamageNumberRequests])(ClientPtr) = {
 /*************** Version 1 ******************/
     SProcDamageQueryVersion,
     SProcDamageCreate,
     SProcDamageDestroy,
     SProcDamageSubtract,
+/*************** Version 1.1 ****************/
+    SProcDamageAdd,
 };
 
 static int
diff --git a/dbe/dbe.c b/dbe/dbe.c
index 38375f92a..862393b53 100644
--- a/dbe/dbe.c
+++ b/dbe/dbe.c
@@ -39,6 +39,11 @@
 #endif
 
 #include <string.h>
+#if HAVE_STDINT_H
+#include <stdint.h>
+#elif !defined(UINT32_MAX)
+#define UINT32_MAX 0xffffffffU
+#endif
 
 #include <X11/X.h>
 #include <X11/Xproto.h>
@@ -711,11 +716,14 @@ ProcDbeSwapBuffers(ClientPtr client)
         return(Success);
     }
 
+    if (nStuff > UINT32_MAX / sizeof(DbeSwapInfoRec))
+	    return BadAlloc;
+
     /* Get to the swap info appended to the end of the request. */
     dbeSwapInfo = (xDbeSwapInfo *)&stuff[1];
 
     /* Allocate array to record swap information. */ 
-    swapInfo = (DbeSwapInfoPtr)ALLOCATE_LOCAL(nStuff * sizeof(DbeSwapInfoRec));
+    swapInfo = (DbeSwapInfoPtr)Xalloc(nStuff * sizeof(DbeSwapInfoRec));
     if (swapInfo == NULL)
     {
         return(BadAlloc);
@@ -730,14 +738,14 @@ ProcDbeSwapBuffers(ClientPtr client)
 	error = dixLookupWindow(&pWin, dbeSwapInfo[i].window, client,
 				DixWriteAccess);
 	if (error != Success) {
-            DEALLOCATE_LOCAL(swapInfo);
+            Xfree(swapInfo);
 	    return error;
         }
 
         /* Each window must be double-buffered - BadMatch. */
         if (DBE_WINDOW_PRIV(pWin) == NULL)
         {
-            DEALLOCATE_LOCAL(swapInfo);
+            Xfree(swapInfo);
             return(BadMatch);
         }
 
@@ -746,7 +754,7 @@ ProcDbeSwapBuffers(ClientPtr client)
         {
             if (dbeSwapInfo[i].window == dbeSwapInfo[j].window)
             {
-                DEALLOCATE_LOCAL(swapInfo);
+                Xfree(swapInfo);
                 return(BadMatch);
 	    }
         }
@@ -757,7 +765,7 @@ ProcDbeSwapBuffers(ClientPtr client)
             (dbeSwapInfo[i].swapAction != XdbeUntouched ) &&
             (dbeSwapInfo[i].swapAction != XdbeCopied    ))
         {
-            DEALLOCATE_LOCAL(swapInfo);
+            Xfree(swapInfo);
             return(BadValue);
         }
 
@@ -787,12 +795,12 @@ ProcDbeSwapBuffers(ClientPtr client)
         error = (*pDbeScreenPriv->SwapBuffers)(client, &nStuff, swapInfo);
         if (error != Success)
         {
-            DEALLOCATE_LOCAL(swapInfo);
+            Xfree(swapInfo);
             return(error);
         }
     }
     
-    DEALLOCATE_LOCAL(swapInfo);
+    Xfree(swapInfo);
     return(Success);
 
 } /* ProcDbeSwapBuffers() */
@@ -874,10 +882,12 @@ ProcDbeGetVisualInfo(ClientPtr client)
 
     REQUEST_AT_LEAST_SIZE(xDbeGetVisualInfoReq);
 
+    if (stuff->n > UINT32_MAX / sizeof(DrawablePtr))
+	    return BadAlloc;
     /* Make sure any specified drawables are valid. */
     if (stuff->n != 0)
     {
-        if (!(pDrawables = (DrawablePtr *)ALLOCATE_LOCAL(stuff->n *
+        if (!(pDrawables = (DrawablePtr *)Xalloc(stuff->n *
                                                  sizeof(DrawablePtr))))
         {
             return(BadAlloc);
@@ -890,7 +900,7 @@ ProcDbeGetVisualInfo(ClientPtr client)
 	    rc = dixLookupDrawable(pDrawables+i, drawables[i], client, 0,
 				   DixReadAccess);
 	    if (rc != Success) {
-                DEALLOCATE_LOCAL(pDrawables);
+                Xfree(pDrawables);
                 return rc;
             }
         }
@@ -902,7 +912,7 @@ ProcDbeGetVisualInfo(ClientPtr client)
     {
         if (pDrawables)
         {
-            DEALLOCATE_LOCAL(pDrawables);
+            Xfree(pDrawables);
         }
 
         return(BadAlloc);
@@ -929,7 +939,7 @@ ProcDbeGetVisualInfo(ClientPtr client)
             /* Free pDrawables if we needed to allocate it above. */
             if (pDrawables)
             {
-                DEALLOCATE_LOCAL(pDrawables);
+                Xfree(pDrawables);
             }
 
             return(BadAlloc);
@@ -1010,7 +1020,7 @@ ProcDbeGetVisualInfo(ClientPtr client)
 
     if (pDrawables)
     {
-        DEALLOCATE_LOCAL(pDrawables);
+        Xfree(pDrawables);
     }
 
     return(client->noClientException);
diff --git a/dix/dispatch.c b/dix/dispatch.c
index 51ad07da5..d44687ec3 100644
--- a/dix/dispatch.c
+++ b/dix/dispatch.c
@@ -3752,6 +3752,8 @@ InitClientPrivates(ClientPtr client)
     client->devPrivates = ppriv;
     sizes = clientPrivateSizes;
     ptr = (char *)(ppriv + clientPrivateLen);
+    if (ppriv)
+	bzero(ppriv, totalClientSize - sizeof(ClientRec));
     for (i = clientPrivateLen; --i >= 0; ppriv++, sizes++)
     {
 	if ( (size = *sizes) )
diff --git a/dix/dixutils.c b/dix/dixutils.c
index 084d2e4c5..e530360fe 100644
--- a/dix/dixutils.c
+++ b/dix/dixutils.c
@@ -219,7 +219,7 @@ dixLookupDrawable(DrawablePtr *pDraw, XID id, ClientPtr client,
 	pTmp = client->lastDrawable;
 
 	/* an access check is required for cached drawables */
-	rtype = (pTmp->type | M_WINDOW) ? RT_WINDOW : RT_PIXMAP;
+	rtype = (type & M_WINDOW) ? RT_WINDOW : RT_PIXMAP;
 	if (!XaceHook(XACE_RESOURCE_ACCESS, client, id, rtype, access, pTmp))
 	    return BadDrawable;
     } else
@@ -227,10 +227,10 @@ dixLookupDrawable(DrawablePtr *pDraw, XID id, ClientPtr client,
 						   access);
     if (!pTmp)
 	return BadDrawable;
-    if (!((1 << pTmp->type) | (type ? type : M_DRAWABLE)))
+    if (!((1 << pTmp->type) & (type ? type : M_DRAWABLE)))
 	return BadMatch;
 
-    if (pTmp->type | M_DRAWABLE) {
+    if (type & M_DRAWABLE) {
 	client->lastDrawable = pTmp;
 	client->lastDrawableID = id;
 	client->lastGCID = INVALID;
diff --git a/dix/getevents.c b/dix/getevents.c
index f37737ceb..7e0b63fc9 100644
--- a/dix/getevents.c
+++ b/dix/getevents.c
@@ -549,11 +549,7 @@ GetPointerEvents(xEvent *events, DeviceIntPtr pDev, int type, int buttons,
             y = valuators[1 - first_valuator];
         }
         else {
-<<<<<<< HEAD/dix/getevents.c
             y = pointer->valuator->lasty;
-=======
-                y = pointer->valuator->lasty;
->>>>>>> ca5ebe3971d8ebcfed00c5ebcd026cdd0ce0c6ba/dix/getevents.c
         }
     }
     else {
diff --git a/doc/Xserver.man.pre b/doc/Xserver.man.pre
index 2457edf22..aa931a88a 100644
--- a/doc/Xserver.man.pre
+++ b/doc/Xserver.man.pre
@@ -100,11 +100,6 @@ specifies a file which contains a collection of authorization records used
 to authenticate access.  See also the \fIxdm\fP(1) and 
 \fIXsecurity\fP(__miscmansuffix__) manual pages.
 .TP 8
-.B bc
-disables certain kinds of error checking, for bug compatibility with
-previous releases (e.g., to work around bugs in R2 and R3 xterms and toolkits).
-Deprecated.
-.TP 8
 .B \-bs
 disables backing store support on all screens.
 .TP 8
@@ -266,6 +261,10 @@ required by the X protocol, which allows the server to exceed the
 client's backing store expectations but does not provide a way to tell
 the client that it is doing so.
 .TP 8
+.B \-wr
+sets the default root window to solid white instead of the standard root weave
+pattern.
+.TP 8
 .B \-x \fIextension\fP
 loads the specified extension at init.
 This is a no-op for most implementations.
@@ -398,20 +397,14 @@ base directory for keyboard layout files.  This option is not available
 for setuid X servers (i.e., when the X server's real and effective uids
 are different).
 .TP 8
-.B \-ar1 \fImilliseconds\fP
+.B \-ardelay \fImilliseconds\fP
 sets the autorepeat delay (length of time in milliseconds that a key must
 be depressed before autorepeat starts).
 .TP 8
-.B \-ar2 \fImilliseconds\fP
+.B \-arinterval \fImilliseconds\fP
 sets the autorepeat interval (length of time in milliseconds that should
 elapse between autorepeat-generated keystrokes).
 .TP 8
-.B \-noloadxkb
-disables loading of an XKB keymap description on server startup.
-.TP 8
-.B \-xkbdb \fIfilename\fP
-uses \fIfilename\fP for default keyboard keymaps.
-.TP 8
 .B \-xkbmap \fIfilename\fP
 loads keyboard description in \fIfilename\fP on server startup.
 .SH SECURITY EXTENSION OPTIONS
diff --git a/exa/exa.c b/exa/exa.c
index b49065303..e9f42df45 100644
--- a/exa/exa.c
+++ b/exa/exa.c
@@ -32,6 +32,10 @@
 #include <dix-config.h>
 #endif
 
+#ifdef MITSHM
+#include "shmint.h"
+#endif
+
 #include <stdlib.h>
 
 #include "exa_priv.h"
@@ -118,17 +122,77 @@ exaGetDrawablePixmap(DrawablePtr pDrawable)
 }	
 
 /**
+ * Sets the offsets to add to coordinates to make them address the same bits in
+ * the backing drawable. These coordinates are nonzero only for redirected
+ * windows.
+ */
+static void
+exaGetDrawableDeltas (DrawablePtr pDrawable, PixmapPtr pPixmap,
+		      int *xp, int *yp)
+{
+#ifdef COMPOSITE
+    if (pDrawable->type == DRAWABLE_WINDOW) {
+	*xp = -pPixmap->screen_x;
+	*yp = -pPixmap->screen_y;
+	return;
+    }
+#endif
+
+    *xp = 0;
+    *yp = 0;
+}
+
+/**
+ * exaPixmapDirty() marks a pixmap as dirty, allowing for
+ * optimizations in pixmap migration when no changes have occurred.
+ */
+void
+exaPixmapDirty (PixmapPtr pPix, int x1, int y1, int x2, int y2)
+{
+    ExaPixmapPriv(pPix);
+    BoxRec box;
+    RegionPtr pDamageReg;
+    RegionRec region;
+
+    if (!pExaPixmap)
+	return;
+	
+    box.x1 = max(x1, 0);
+    box.y1 = max(y1, 0);
+    box.x2 = min(x2, pPix->drawable.width);
+    box.y2 = min(y2, pPix->drawable.height);
+
+    if (box.x1 >= box.x2 || box.y1 >= box.y2)
+	return;
+
+    pDamageReg = DamageRegion(pExaPixmap->pDamage);
+
+    REGION_INIT(pScreen, &region, &box, 1);
+    REGION_UNION(pScreen, pDamageReg, pDamageReg, &region);
+    REGION_UNINIT(pScreen, &region);
+}
+
+/**
  * exaDrawableDirty() marks a pixmap backing a drawable as dirty, allowing for
  * optimizations in pixmap migration when no changes have occurred.
  */
 void
-exaDrawableDirty (DrawablePtr pDrawable)
+exaDrawableDirty (DrawablePtr pDrawable, int x1, int y1, int x2, int y2)
 {
-    ExaPixmapPrivPtr pExaPixmap;
+    PixmapPtr pPix = exaGetDrawablePixmap(pDrawable);
+    int xoff, yoff;
 
-    pExaPixmap = ExaGetPixmapPriv(exaGetDrawablePixmap (pDrawable));
-    if (pExaPixmap != NULL)
-	pExaPixmap->dirty = TRUE;
+    x1 = max(x1, pDrawable->x);
+    y1 = max(y1, pDrawable->y);
+    x2 = min(x2, pDrawable->x + pDrawable->width);
+    y2 = min(y2, pDrawable->y + pDrawable->height);
+
+    if (x1 >= x2 || y1 >= y2)
+	return;
+
+    exaGetDrawableDeltas(pDrawable, pPix, &xoff, &yoff);
+
+    exaPixmapDirty(pPix, x1 + xoff, y1 + yoff, x2 + xoff, y2 + yoff);
 }
 
 static Bool
@@ -149,6 +213,7 @@ exaDestroyPixmap (PixmapPtr pPixmap)
 	    pPixmap->devPrivate.ptr = pExaPixmap->sys_ptr;
 	    pPixmap->devKind = pExaPixmap->sys_pitch;
 	}
+	REGION_UNINIT(pPixmap->drawable.pScreen, &pExaPixmap->validReg);
     }
     return fbDestroyPixmap (pPixmap);
 }
@@ -216,7 +281,20 @@ exaCreatePixmap(ScreenPtr pScreen, int w, int h, int depth)
 	return NULL;
     }
 
-    pExaPixmap->dirty = FALSE;
+    /* Set up damage tracking */
+    pExaPixmap->pDamage = DamageCreate (NULL, NULL, DamageReportNone, TRUE,
+					pScreen, pPixmap);
+
+    if (pExaPixmap->pDamage == NULL) {
+	fbDestroyPixmap (pPixmap);
+	return NULL;
+    }
+
+    DamageRegister (&pPixmap->drawable, pExaPixmap->pDamage);
+    DamageSetReportAfterOp (pExaPixmap->pDamage, TRUE);
+
+    /* None of the pixmap bits are valid initially */
+    REGION_NULL(pScreen, &pExaPixmap->validReg);
 
     return pPixmap;
 }
@@ -261,32 +339,14 @@ exaDrawableIsOffscreen (DrawablePtr pDrawable)
 /**
  * Returns the pixmap which backs a drawable, and the offsets to add to
  * coordinates to make them address the same bits in the backing drawable.
- * These coordinates are nonzero only for redirected windows.
  */
 PixmapPtr
 exaGetOffscreenPixmap (DrawablePtr pDrawable, int *xp, int *yp)
 {
-    PixmapPtr	pPixmap;
-    int		x, y;
+    PixmapPtr	pPixmap = exaGetDrawablePixmap (pDrawable);
+
+    exaGetDrawableDeltas (pDrawable, pPixmap, xp, yp);
 
-    if (pDrawable->type == DRAWABLE_WINDOW) {
-	pPixmap = (*pDrawable->pScreen->GetWindowPixmap) ((WindowPtr) pDrawable);
-#ifdef COMPOSITE
-	x = -pPixmap->screen_x;
-	y = -pPixmap->screen_y;
-#else
-	x = 0;
-	y = 0;
-#endif
-    }
-    else
-    {
-	pPixmap = (PixmapPtr) pDrawable;
-	x = 0;
-	y = 0;
-    }
-    *xp = x;
-    *yp = y;
     if (exaPixmapIsOffscreen (pPixmap))
 	return pPixmap;
     else
@@ -334,8 +394,7 @@ exaPrepareAccess(DrawablePtr pDrawable, int index)
 /**
  * exaFinishAccess() is EXA's wrapper for the driver's FinishAccess() handler.
  *
- * It deals with marking drawables as dirty, and calling the driver's
- * FinishAccess() only if necessary.
+ * It deals with calling the driver's FinishAccess() only if necessary.
  */
 void
 exaFinishAccess(DrawablePtr pDrawable, int index)
@@ -345,9 +404,6 @@ exaFinishAccess(DrawablePtr pDrawable, int index)
     PixmapPtr	    pPixmap;
     ExaPixmapPrivPtr pExaPixmap;
 
-    if (index == EXA_PREPARE_DEST)
-	exaDrawableDirty (pDrawable);
-
     pPixmap = exaGetDrawablePixmap (pDrawable);
 
     pExaPixmap = ExaGetPixmapPriv(pPixmap);
@@ -373,7 +429,7 @@ exaFinishAccess(DrawablePtr pDrawable, int index)
  * accelerated or may sync the card and fall back to fb.
  */
 static void
-exaValidateGC (GCPtr pGC, Mask changes, DrawablePtr pDrawable)
+exaValidateGC (GCPtr pGC, unsigned long changes, DrawablePtr pDrawable)
 {
     /* fbValidateGC will do direct access to pixmaps if the tiling has changed.
      * Preempt fbValidateGC by doing its work and masking the change out, so
@@ -404,6 +460,7 @@ exaValidateGC (GCPtr pGC, Mask changes, DrawablePtr pDrawable)
 		exaPrepareAccess(&pOldTile->drawable, EXA_PREPARE_SRC);
 		pNewTile = fb24_32ReformatTile (pOldTile,
 						pDrawable->bitsPerPixel);
+		exaPixmapDirty(pNewTile, 0, 0, pNewTile->drawable.width, pNewTile->drawable.height);
 		exaFinishAccess(&pOldTile->drawable, EXA_PREPARE_SRC);
 	    }
 	    if (pNewTile)
@@ -419,9 +476,14 @@ exaValidateGC (GCPtr pGC, Mask changes, DrawablePtr pDrawable)
 	if (!pGC->tileIsPixel && FbEvenTile (pGC->tile.pixmap->drawable.width *
 					     pDrawable->bitsPerPixel))
 	{
-	    exaPrepareAccess(&pGC->tile.pixmap->drawable, EXA_PREPARE_SRC);
+	    /* XXX This fixes corruption with tiled pixmaps, but may just be a
+	     * workaround for broken drivers
+	     */
+	    exaMoveOutPixmap(pGC->tile.pixmap);
 	    fbPadPixmap (pGC->tile.pixmap);
-	    exaFinishAccess(&pGC->tile.pixmap->drawable, EXA_PREPARE_SRC);
+	    exaPixmapDirty(pGC->tile.pixmap, 0, 0,
+			   pGC->tile.pixmap->drawable.width,
+			   pGC->tile.pixmap->drawable.height);
 	}
 	/* Mask out the GCTile change notification, now that we've done FB's
 	 * job for it.
@@ -560,7 +622,7 @@ exaDriverInit (ScreenPtr		pScreen,
 
     pScreen->devPrivates[exaScreenPrivateIndex].ptr = (pointer) pExaScr;
 
-    pExaScr->migration = ExaMigrationSmart;
+    pExaScr->migration = ExaMigrationAlways;
 
     exaDDXDriverInit(pScreen);
 
@@ -610,6 +672,13 @@ exaDriverInit (ScreenPtr		pScreen,
     miDisableCompositeWrapper(pScreen);
 #endif
 
+#ifdef MITSHM
+    /* Re-register with the MI funcs, which don't allow shared pixmaps.
+     * Shared pixmaps are almost always a performance loss for us, but this
+     * still allows for SHM PutImage.
+     */
+    ShmRegisterFuncs(pScreen, NULL);
+#endif
     /*
      * Hookup offscreen pixmaps
      */
diff --git a/exa/exa.h b/exa/exa.h
index 96465a775..bf723f723 100644
--- a/exa/exa.h
+++ b/exa/exa.h
@@ -39,7 +39,7 @@
 #include "fb.h"
 
 #define EXA_VERSION_MAJOR   2
-#define EXA_VERSION_MINOR   0
+#define EXA_VERSION_MINOR   1
 #define EXA_VERSION_RELEASE 0
 
 typedef struct _ExaOffscreenArea ExaOffscreenArea;
@@ -73,8 +73,8 @@ struct _ExaOffscreenArea {
 typedef struct _ExaDriver {
     /**
      * exa_major and exa_minor should be set by the driver to the version of
-     * EXA which the driver was compiled for (or configures itself at runtime to
-     * support).  This allows EXA to extend the structure for new features
+     * EXA which the driver was compiled for (or configures itself at runtime
+     * to support).  This allows EXA to extend the structure for new features
      * without breaking ABI for drivers compiled against older versions.
      */
     int exa_major, exa_minor;
@@ -716,6 +716,12 @@ exaGetPixmapSize(PixmapPtr pPix);
 void
 exaEnableDisableFBAccess (int index, Bool enable);
 
+void
+exaMoveInPixmap (PixmapPtr pPixmap);
+
+void
+exaMoveOutPixmap (PixmapPtr pPixmap);
+
 /**
  * Returns TRUE if the given planemask covers all the significant bits in the
  * pixel values for pDrawable.
diff --git a/exa/exa_accel.c b/exa/exa_accel.c
index bc77a4071..6fa481ad0 100644
--- a/exa/exa_accel.c
+++ b/exa/exa_accel.c
@@ -20,6 +20,11 @@
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * Authors:
+ *    Eric Anholt <eric@anholt.net>
+ *    Michel Dänzer <michel@tungstengraphics.com>
+ *
  */
 
 #ifdef HAVE_DIX_CONFIG_H
@@ -49,12 +54,12 @@ exaFillSpans(DrawablePtr pDrawable, GCPtr pGC, int n,
 
     pixmaps[0].as_dst = TRUE;
     pixmaps[0].as_src = FALSE;
-    pixmaps[0].pPix = exaGetDrawablePixmap (pDrawable);
+    pixmaps[0].pPix = pPixmap = exaGetDrawablePixmap (pDrawable);
 
     if (pExaScr->swappedOut ||
 	pGC->fillStyle != FillSolid ||
-	pDrawable->width > pExaScr->info->maxX ||
-	pDrawable->height > pExaScr->info->maxY)
+	pPixmap->drawable.width > pExaScr->info->maxX ||
+	pPixmap->drawable.height > pExaScr->info->maxY)
     {
 	exaDoMigration (pixmaps, 1, FALSE);
 	ExaCheckFillSpans (pDrawable, pGC, n, ppt, pwidth, fSorted);
@@ -104,6 +109,8 @@ exaFillSpans(DrawablePtr pDrawable, GCPtr pGC, int n,
 	    (*pExaScr->info->Solid) (pPixmap,
 				     fullX1 + off_x, fullY1 + off_y,
 				     fullX2 + off_x, fullY1 + 1 + off_y);
+	    exaPixmapDirty (pPixmap, fullX1 + off_x, fullY1 + off_y,
+			    fullX2 + off_x, fullY1 + 1 + off_y);
 	}
 	else
 	{
@@ -118,17 +125,19 @@ exaFillSpans(DrawablePtr pDrawable, GCPtr pGC, int n,
 		    partX2 = pbox->x2;
 		    if (partX2 > fullX2)
 			partX2 = fullX2;
-		    if (partX2 > partX1)
+		    if (partX2 > partX1) {
 			(*pExaScr->info->Solid) (pPixmap,
 						 partX1 + off_x, fullY1 + off_y,
 						 partX2 + off_x, fullY1 + 1 + off_y);
+			exaPixmapDirty (pPixmap, partX1 + off_x, fullY1 + off_y,
+					partX2 + off_x, fullY1 + 1 + off_y);
+		    }
 		}
 		pbox++;
 	    }
 	}
     }
     (*pExaScr->info->DoneSolid) (pPixmap);
-    exaDrawableDirty (pDrawable);
     exaMarkSync(pScreen);
 }
 
@@ -222,8 +231,8 @@ exaPutImage (DrawablePtr pDrawable, GCPtr pGC, int depth, int x, int y,
 
 	    exaFinishAccess(pDrawable, EXA_PREPARE_DEST);
 	}
+	exaPixmapDirty(pPix, x1 + xoff, y1 + yoff, x2 + xoff, y2 + yoff);
     }
-    exaDrawableDirty(pDrawable);
 
     return;
 
@@ -351,11 +360,12 @@ exaCopyNtoNTwoDir (DrawablePtr pSrcDrawable, DrawablePtr pDstDrawable,
 				       dst_off_y + pbox->y1 + i,
 				       pbox->x2 - pbox->x1, 1);
 	}
+	exaPixmapDirty(pDstPixmap, dst_off_x + pbox->x1, dst_off_y + pbox->y1,
+		       dst_off_x + pbox->x2, dst_off_y + pbox->y2);
     }
     if (dirsetup != 0)
 	pExaScr->info->DoneCopy(pDstPixmap);
     exaMarkSync(pDstDrawable->pScreen);
-    exaDrawableDirty(pDstDrawable);
     return TRUE;
 }
 
@@ -380,19 +390,19 @@ exaCopyNtoN (DrawablePtr    pSrcDrawable,
 
     pixmaps[0].as_dst = TRUE;
     pixmaps[0].as_src = FALSE;
-    pixmaps[0].pPix = exaGetDrawablePixmap (pDstDrawable);
+    pixmaps[0].pPix = pDstPixmap = exaGetDrawablePixmap (pDstDrawable);
     pixmaps[1].as_dst = FALSE;
     pixmaps[1].as_src = TRUE;
-    pixmaps[1].pPix = exaGetDrawablePixmap (pSrcDrawable);
+    pixmaps[1].pPix = pSrcPixmap = exaGetDrawablePixmap (pSrcDrawable);
 
     /* Respect maxX/maxY in a trivial way: don't set up drawing when we might
      * violate the limits.  The proper solution would be a temporary pixmap
      * adjusted so that the drawing happened within limits.
      */
-    if (pSrcDrawable->width > pExaScr->info->maxX ||
-	pSrcDrawable->height > pExaScr->info->maxY ||
-	pDstDrawable->width > pExaScr->info->maxX ||
-	pDstDrawable->height > pExaScr->info->maxY)
+    if (pSrcPixmap->drawable.width > pExaScr->info->maxX ||
+	pSrcPixmap->drawable.height > pExaScr->info->maxY ||
+	pDstPixmap->drawable.width > pExaScr->info->maxX ||
+	pDstPixmap->drawable.height > pExaScr->info->maxY)
     {
 	exaDoMigration (pixmaps, 2, FALSE);
 	goto fallback;
@@ -401,7 +411,8 @@ exaCopyNtoN (DrawablePtr    pSrcDrawable,
     }
 
     /* Mixed directions must be handled specially if the card is lame */
-    if (pExaScr->info->flags & EXA_TWO_BITBLT_DIRECTIONS && (dx*dy) < 0) {
+    if (pExaScr->info->flags & EXA_TWO_BITBLT_DIRECTIONS &&
+	reverse != upsidedown) {
 	if (!exaCopyNtoNTwoDir(pSrcDrawable, pDstDrawable, pGC, pbox, nbox,
 			       dx, dy))
 	    goto fallback;
@@ -411,7 +422,7 @@ exaCopyNtoN (DrawablePtr    pSrcDrawable,
     if ((pSrcPixmap = exaGetOffscreenPixmap (pSrcDrawable, &src_off_x, &src_off_y)) &&
 	(pDstPixmap = exaGetOffscreenPixmap (pDstDrawable, &dst_off_x, &dst_off_y)) &&
 	(*pExaScr->info->PrepareCopy) (pSrcPixmap, pDstPixmap,
-				       dx, dy,
+				       reverse ? -1 : 1, upsidedown ? -1 : 1,
 				       pGC ? pGC->alu : GXcopy,
 				       pGC ? pGC->planemask : FB_ALLONES))
     {
@@ -423,11 +434,13 @@ exaCopyNtoN (DrawablePtr    pSrcDrawable,
 				    pbox->x1 + dst_off_x, pbox->y1 + dst_off_y,
 				    pbox->x2 - pbox->x1,
 				    pbox->y2 - pbox->y1);
+	    exaPixmapDirty (pDstPixmap,
+			    pbox->x1 + dst_off_x, pbox->y1 + dst_off_y,
+			    pbox->x2 + dst_off_x, pbox->y2 + dst_off_y);
 	    pbox++;
 	}
 	(*pExaScr->info->DoneCopy) (pDstPixmap);
 	exaMarkSync(pDstDrawable->pScreen);
-	exaDrawableDirty (pDstDrawable);
 	return;
     }
 
@@ -442,6 +455,11 @@ fallback:
 		bitplane, closure);
     exaFinishAccess (pSrcDrawable, EXA_PREPARE_SRC);
     exaFinishAccess (pDstDrawable, EXA_PREPARE_DEST);
+    while (nbox--)
+    {
+	exaDrawableDirty (pDstDrawable, pbox->x1, pbox->y1, pbox->x2, pbox->y2);
+	pbox++;
+    }
 }
 
 RegionPtr
@@ -621,12 +639,12 @@ exaPolyFillRect(DrawablePtr pDrawable,
 
     pixmaps[0].as_dst = TRUE;
     pixmaps[0].as_src = FALSE;
-    pixmaps[0].pPix = exaGetDrawablePixmap (pDrawable);
+    pixmaps[0].pPix = pPixmap = exaGetDrawablePixmap (pDrawable);
  
     if (pExaScr->swappedOut ||
 	pGC->fillStyle != FillSolid ||
-	pDrawable->width > pExaScr->info->maxX ||
-	pDrawable->height > pExaScr->info->maxY)
+	pPixmap->drawable.width > pExaScr->info->maxX ||
+	pPixmap->drawable.height > pExaScr->info->maxY)
     {
 	exaDoMigration (pixmaps, 1, FALSE);
 	ExaCheckPolyFillRect (pDrawable, pGC, nrect, prect);
@@ -681,6 +699,8 @@ exaPolyFillRect(DrawablePtr pDrawable,
 	    (*pExaScr->info->Solid) (pPixmap,
 				     fullX1 + xoff, fullY1 + yoff,
 				     fullX2 + xoff, fullY2 + yoff);
+	    exaPixmapDirty (pPixmap, fullX1 + xoff, fullY1 + yoff,
+			    fullX2 + xoff, fullY2 + yoff);
 	}
 	else
 	{
@@ -706,15 +726,17 @@ exaPolyFillRect(DrawablePtr pDrawable,
 
 		pbox++;
 
-		if (partX1 < partX2 && partY1 < partY2)
+		if (partX1 < partX2 && partY1 < partY2) {
 		    (*pExaScr->info->Solid) (pPixmap,
 					     partX1 + xoff, partY1 + yoff,
 					     partX2 + xoff, partY2 + yoff);
+		    exaPixmapDirty (pPixmap, partX1 + xoff, partY1 + yoff,
+				    partX2 + xoff, partY2 + yoff);
+		}
 	    }
 	}
     }
     (*pExaScr->info->DoneSolid) (pPixmap);
-    exaDrawableDirty (pDrawable);
     exaMarkSync(pDrawable->pScreen);
 }
 
@@ -735,14 +757,15 @@ exaSolidBoxClipped (DrawablePtr	pDrawable,
     int		xoff, yoff;
     int		partX1, partX2, partY1, partY2;
     ExaMigrationRec pixmaps[1];
+    Bool	fallback = FALSE;
 
     pixmaps[0].as_dst = TRUE;
     pixmaps[0].as_src = FALSE;
-    pixmaps[0].pPix = exaGetDrawablePixmap (pDrawable);
- 
+    pixmaps[0].pPix = pPixmap = exaGetDrawablePixmap (pDrawable);
+
     if (pExaScr->swappedOut ||
-	pDrawable->width > pExaScr->info->maxX ||
-	pDrawable->height > pExaScr->info->maxY)
+	pPixmap->drawable.width > pExaScr->info->maxX ||
+	pPixmap->drawable.height > pExaScr->info->maxY)
     {
 	exaDoMigration (pixmaps, 1, FALSE);
 	goto fallback;
@@ -750,19 +773,21 @@ exaSolidBoxClipped (DrawablePtr	pDrawable,
 	exaDoMigration (pixmaps, 1, TRUE);
     }
 
-    if (!(pPixmap = exaGetOffscreenPixmap (pDrawable, &xoff, &yoff)) ||
+    pPixmap = exaGetOffscreenPixmap (pDrawable, &xoff, &yoff);
+
+    if (!pPixmap ||
 	!(*pExaScr->info->PrepareSolid) (pPixmap, GXcopy, pm, fg))
     {
 fallback:
 	EXA_FALLBACK(("to %p (%c)\n", pDrawable,
 		      exaDrawableLocation(pDrawable)));
+	fallback = TRUE;
 	exaPrepareAccess (pDrawable, EXA_PREPARE_DEST);
 	fg = fbReplicatePixel (fg, pDrawable->bitsPerPixel);
 	fbSolidBoxClipped (pDrawable, pClip, x1, y1, x2, y2,
 			   fbAnd (GXcopy, fg, pm),
 			   fbXor (GXcopy, fg, pm));
 	exaFinishAccess (pDrawable, EXA_PREPARE_DEST);
-	return;
     }
     for (nbox = REGION_NUM_RECTS(pClip), pbox = REGION_RECTS(pClip);
 	 nbox--;
@@ -790,12 +815,20 @@ fallback:
 	if (partY2 <= partY1)
 	    continue;
 
-	(*pExaScr->info->Solid) (pPixmap,
-				 partX1 + xoff, partY1 + yoff,
-				 partX2 + xoff, partY2 + yoff);
+	if (!fallback) {
+	    (*pExaScr->info->Solid) (pPixmap,
+				     partX1 + xoff, partY1 + yoff,
+				     partX2 + xoff, partY2 + yoff);
+	    exaPixmapDirty (pPixmap, partX1 + xoff, partY1 + yoff,
+			    partX2 + xoff, partY2 + yoff);
+	} else
+	    exaDrawableDirty (pDrawable, partX1, partY1, partX2, partY2);
     }
+
+    if (fallback)
+	return;
+
     (*pExaScr->info->DoneSolid) (pPixmap);
-    exaDrawableDirty (pDrawable);
     exaMarkSync(pDrawable->pScreen);
 }
 
@@ -908,12 +941,17 @@ exaImageGlyphBlt (DrawablePtr	pDrawable,
 			  pPriv->fg,
 			  gx + dstXoff,
 			  gHeight);
+		exaDrawableDirty (pDrawable, gx, gy, gx + gWidth, gy + gHeight);
 	    }
 	    else
 	    {
+		RegionPtr pClip = fbGetCompositeClip(pGC);
+		int nbox;
+		BoxPtr pbox;
+
 		gStride = GLYPHWIDTHBYTESPADDED(pci) / sizeof (FbStip);
 		fbPutXYImage (pDrawable,
-			      fbGetCompositeClip(pGC),
+			      pClip,
 			      pPriv->fg,
 			      pPriv->bg,
 			      pPriv->pm,
@@ -927,6 +965,18 @@ exaImageGlyphBlt (DrawablePtr	pDrawable,
 			      (FbStip *) pglyph,
 			      gStride,
 			      0);
+
+		for (nbox = REGION_NUM_RECTS(pClip), pbox = REGION_RECTS(pClip);
+		     nbox--; pbox++) {
+		    int x1 = max(gx, pbox->x1), x2 = min(gx + gWidth, pbox->x2);
+		    int y1 = max(gy, pbox->y1), y2 = min(gy + gHeight, pbox->y2);
+
+		    if (x1 >= x2 || y1 >= y2)
+			continue;
+
+		    exaDrawableDirty (pDrawable, gx, gy, gx + gWidth,
+				      gy + gHeight);
+		}
 	    }
 	}
 	x += pci->metrics.characterWidth;
@@ -994,13 +1044,15 @@ exaFillRegionSolid (DrawablePtr	pDrawable,
     PixmapPtr pPixmap;
     int xoff, yoff;
     ExaMigrationRec pixmaps[1];
+    int nbox = REGION_NUM_RECTS (pRegion);
+    BoxPtr pBox = REGION_RECTS (pRegion);
 
     pixmaps[0].as_dst = TRUE;
     pixmaps[0].as_src = FALSE;
-    pixmaps[0].pPix = exaGetDrawablePixmap (pDrawable);
+    pixmaps[0].pPix = pPixmap = exaGetDrawablePixmap (pDrawable);
  
-    if (pDrawable->width > pExaScr->info->maxX ||
-	pDrawable->height > pExaScr->info->maxY)
+    if (pPixmap->drawable.width > pExaScr->info->maxX ||
+	pPixmap->drawable.height > pExaScr->info->maxY)
     {
 	exaDoMigration (pixmaps, 1, FALSE);
 	goto fallback;
@@ -1011,19 +1063,17 @@ exaFillRegionSolid (DrawablePtr	pDrawable,
     if ((pPixmap = exaGetOffscreenPixmap (pDrawable, &xoff, &yoff)) &&
 	(*pExaScr->info->PrepareSolid) (pPixmap, GXcopy, FB_ALLONES, pixel))
     {
-	int	nbox = REGION_NUM_RECTS (pRegion);
-	BoxPtr	pBox = REGION_RECTS (pRegion);
-
 	while (nbox--)
 	{
 	    (*pExaScr->info->Solid) (pPixmap,
 				     pBox->x1 + xoff, pBox->y1 + yoff,
 				     pBox->x2 + xoff, pBox->y2 + yoff);
+	    exaPixmapDirty (pPixmap, pBox->x1 + xoff, pBox->y1 + yoff,
+			    pBox->x2 + xoff, pBox->y2 + yoff);
 	    pBox++;
 	}
 	(*pExaScr->info->DoneSolid) (pPixmap);
 	exaMarkSync(pDrawable->pScreen);
-	exaDrawableDirty (pDrawable);
     }
     else
     {
@@ -1034,6 +1084,11 @@ fallback:
 	fbFillRegionSolid (pDrawable, pRegion, 0,
 			   fbReplicatePixel (pixel, pDrawable->bitsPerPixel));
 	exaFinishAccess (pDrawable, EXA_PREPARE_DEST);
+	while (nbox--)
+	{
+	    exaDrawableDirty (pDrawable, pBox->x1, pBox->y1, pBox->x2, pBox->y2);
+	    pBox++;
+	}
     }
 }
 
@@ -1047,9 +1102,11 @@ exaFillRegionTiled (DrawablePtr	pDrawable,
 {
     ExaScreenPriv(pDrawable->pScreen);
     PixmapPtr pPixmap;
-    int xoff, yoff;
+    int xoff, yoff, tileXoff, tileYoff;
     int tileWidth, tileHeight;
     ExaMigrationRec pixmaps[2];
+    int nbox = REGION_NUM_RECTS (pRegion);
+    BoxPtr pBox = REGION_RECTS (pRegion);
 
     tileWidth = pTile->drawable.width;
     tileHeight = pTile->drawable.height;
@@ -1064,13 +1121,13 @@ exaFillRegionTiled (DrawablePtr	pDrawable,
 
     pixmaps[0].as_dst = TRUE;
     pixmaps[0].as_src = FALSE;
-    pixmaps[0].pPix = exaGetDrawablePixmap (pDrawable);
+    pixmaps[0].pPix = pPixmap = exaGetDrawablePixmap (pDrawable);
     pixmaps[1].as_dst = FALSE;
     pixmaps[1].as_src = TRUE;
     pixmaps[1].pPix = pTile;
 
-    if (pDrawable->width > pExaScr->info->maxX ||
-	pDrawable->height > pExaScr->info->maxY ||
+    if (pPixmap->drawable.width > pExaScr->info->maxX ||
+	pPixmap->drawable.height > pExaScr->info->maxY ||
 	tileWidth > pExaScr->info->maxX ||
 	tileHeight > pExaScr->info->maxY)
     {
@@ -1081,18 +1138,16 @@ exaFillRegionTiled (DrawablePtr	pDrawable,
     }
 
     pPixmap = exaGetOffscreenPixmap (pDrawable, &xoff, &yoff);
+
     if (!pPixmap)
 	goto fallback;
 
     if (!exaPixmapIsOffscreen(pTile))
 	goto fallback;
 
-    if ((*pExaScr->info->PrepareCopy) (pTile, pPixmap, 0, 0, GXcopy,
+    if ((*pExaScr->info->PrepareCopy) (exaGetOffscreenPixmap((DrawablePtr)pTile, &tileXoff, &tileYoff), pPixmap, 0, 0, GXcopy,
 				       FB_ALLONES))
     {
-	int nbox = REGION_NUM_RECTS (pRegion);
-	BoxPtr pBox = REGION_RECTS (pRegion);
-
 	while (nbox--)
 	{
 	    int height = pBox->y2 - pBox->y1;
@@ -1118,7 +1173,7 @@ exaFillRegionTiled (DrawablePtr	pDrawable,
 		    width -= w;
 
 		    (*pExaScr->info->Copy) (pPixmap,
-					    tileX, tileY,
+					    tileX + tileXoff, tileY + tileYoff,
 					    dstX + xoff, dstY + yoff,
 					    w, h);
 		    dstX += w;
@@ -1127,11 +1182,12 @@ exaFillRegionTiled (DrawablePtr	pDrawable,
 		dstY += h;
 		tileY = 0;
 	    }
+	    exaPixmapDirty (pPixmap, pBox->x1 + xoff, pBox->y1 + yoff,
+			    pBox->x2 + xoff, pBox->y2 + yoff);
 	    pBox++;
 	}
 	(*pExaScr->info->DoneCopy) (pPixmap);
 	exaMarkSync(pDrawable->pScreen);
-	exaDrawableDirty (pDrawable);
 	return;
     }
 
@@ -1144,6 +1200,11 @@ fallback:
     fbFillRegionTiled (pDrawable, pRegion, pTile);
     exaFinishAccess ((DrawablePtr)pTile, EXA_PREPARE_SRC);
     exaFinishAccess (pDrawable, EXA_PREPARE_DEST);
+    while (nbox--)
+    {
+	exaDrawableDirty (pDrawable, pBox->x1, pBox->y1, pBox->x2, pBox->y2);
+	pBox++;
+    }
 }
 
 void
diff --git a/exa/exa_migration.c b/exa/exa_migration.c
index 06a4b9330..eedc5fd03 100644
--- a/exa/exa_migration.c
+++ b/exa/exa_migration.c
@@ -22,6 +22,7 @@
  *
  * Authors:
  *    Eric Anholt <eric@anholt.net>
+ *    Michel Dänzer <michel@tungstengraphics.com>
  *
  */
 
@@ -58,6 +59,27 @@ exaPixmapIsPinned (PixmapPtr pPix)
 }
 
 /**
+ * The fallback path for UTS/DFS failing is to just memcpy.  exaCopyDirtyToSys
+ * and exaCopyDirtyToFb both needed to do this loop.
+ */
+static void
+exaMemcpyBox (PixmapPtr pPixmap, BoxPtr pbox, CARD8 *src, int src_pitch,
+	      CARD8 *dst, int dst_pitch)
+ {
+    int i, cpp = pPixmap->drawable.bitsPerPixel / 8;
+    int bytes = (pbox->x2 - pbox->x1) * cpp;
+
+    src += pbox->y1 * src_pitch + pbox->x1 * cpp;
+    dst += pbox->y1 * dst_pitch + pbox->x1 * cpp;
+
+    for (i = pbox->y2 - pbox->y1; i; i--) {
+	memcpy (dst, src, bytes);
+	src += src_pitch;
+	dst += dst_pitch;
+    }
+}
+ 
+/**
  * Returns TRUE if the pixmap is dirty (has been modified in its current
  * location compared to the other), or lacks a private for tracking
  * dirtiness.
@@ -67,7 +89,8 @@ exaPixmapIsDirty (PixmapPtr pPix)
 {
     ExaPixmapPriv (pPix);
 
-    return pExaPixmap == NULL || pExaPixmap->dirty == TRUE;
+    return pExaPixmap == NULL ||
+	REGION_NOTEMPTY (pScreen, DamageRegion(pExaPixmap->pDamage));
 }
 
 /**
@@ -98,54 +121,62 @@ exaCopyDirtyToSys (PixmapPtr pPixmap)
 {
     ExaScreenPriv (pPixmap->drawable.pScreen);
     ExaPixmapPriv (pPixmap);
+    RegionPtr pRegion = DamageRegion (pExaPixmap->pDamage);
     CARD8 *save_ptr;
     int save_pitch;
-
-    if (!pExaPixmap->dirty)
-	return;
+    BoxPtr pBox = REGION_RECTS(pRegion);
+    int nbox = REGION_NUM_RECTS(pRegion);
+    Bool do_sync = FALSE;
 
     save_ptr = pPixmap->devPrivate.ptr;
     save_pitch = pPixmap->devKind;
     pPixmap->devPrivate.ptr = pExaPixmap->fb_ptr;
     pPixmap->devKind = pExaPixmap->fb_pitch;
 
-    if (pExaScr->info->DownloadFromScreen == NULL ||
-	!pExaScr->info->DownloadFromScreen (pPixmap,
-					    0,
-					    0,
-					    pPixmap->drawable.width,
-					    pPixmap->drawable.height,
-					    pExaPixmap->sys_ptr,
-					    pExaPixmap->sys_pitch))
-    {
-	char *src, *dst;
-	int src_pitch, dst_pitch, i, bytes;
-
-	exaPrepareAccess(&pPixmap->drawable, EXA_PREPARE_SRC);
-
-	dst = pExaPixmap->sys_ptr;
-	dst_pitch = pExaPixmap->sys_pitch;
-	src = pExaPixmap->fb_ptr;
-	src_pitch = pExaPixmap->fb_pitch;
-	bytes = src_pitch < dst_pitch ? src_pitch : dst_pitch;
-
-	for (i = 0; i < pPixmap->drawable.height; i++) {
-	    memcpy (dst, src, bytes);
-	    dst += dst_pitch;
-	    src += src_pitch;
+    while (nbox--) {
+	pBox->x1 = max(pBox->x1, 0);
+	pBox->y1 = max(pBox->y1, 0);
+	pBox->x2 = min(pBox->x2, pPixmap->drawable.width);
+	pBox->y2 = min(pBox->y2, pPixmap->drawable.height);
+
+	if (pBox->x1 >= pBox->x2 || pBox->y1 >= pBox->y2)
+	    continue;
+
+	if (pExaScr->info->DownloadFromScreen == NULL ||
+	    !pExaScr->info->DownloadFromScreen (pPixmap,
+						pBox->x1, pBox->y1,
+						pBox->x2 - pBox->x1,
+						pBox->y2 - pBox->y1,
+						pExaPixmap->sys_ptr
+						+ pBox->y1 * pExaPixmap->sys_pitch
+						+ pBox->x1 * pPixmap->drawable.bitsPerPixel / 8,
+						pExaPixmap->sys_pitch))
+	{
+	    exaPrepareAccess(&pPixmap->drawable, EXA_PREPARE_SRC);
+	    exaMemcpyBox (pPixmap, pBox,
+			  pExaPixmap->fb_ptr, pExaPixmap->fb_pitch,
+			  pExaPixmap->sys_ptr, pExaPixmap->sys_pitch);
+	    exaFinishAccess(&pPixmap->drawable, EXA_PREPARE_SRC);
 	}
-	exaFinishAccess(&pPixmap->drawable, EXA_PREPARE_SRC);
+	else
+	    do_sync = TRUE;
+
+	pBox++;
     }
 
     /* Make sure the bits have actually landed, since we don't necessarily sync
      * when accessing pixmaps in system memory.
      */
-    exaWaitSync (pPixmap->drawable.pScreen);
+    if (do_sync)
+	exaWaitSync (pPixmap->drawable.pScreen);
 
     pPixmap->devPrivate.ptr = save_ptr;
     pPixmap->devKind = save_pitch;
 
-    pExaPixmap->dirty = FALSE;
+    /* The previously damaged bits are now no longer damaged but valid */
+    REGION_UNION(pPixmap->drawable.pScreen,
+		 &pExaPixmap->validReg, &pExaPixmap->validReg, pRegion);
+    DamageEmpty (pExaPixmap->pDamage);
 }
 
 /**
@@ -158,49 +189,59 @@ exaCopyDirtyToFb (PixmapPtr pPixmap)
 {
     ExaScreenPriv (pPixmap->drawable.pScreen);
     ExaPixmapPriv (pPixmap);
+    RegionPtr pRegion = DamageRegion (pExaPixmap->pDamage);
     CARD8 *save_ptr;
     int save_pitch;
-
-    if (!pExaPixmap->dirty)
-	return;
+    BoxPtr pBox = REGION_RECTS(pRegion);
+    int nbox = REGION_NUM_RECTS(pRegion);
+    Bool do_sync = FALSE;
 
     save_ptr = pPixmap->devPrivate.ptr;
     save_pitch = pPixmap->devKind;
     pPixmap->devPrivate.ptr = pExaPixmap->fb_ptr;
     pPixmap->devKind = pExaPixmap->fb_pitch;
 
-    if (pExaScr->info->UploadToScreen == NULL ||
-	!pExaScr->info->UploadToScreen (pPixmap,
-					0,
-					0,
-					pPixmap->drawable.width,
-					pPixmap->drawable.height,
-					pExaPixmap->sys_ptr,
-					pExaPixmap->sys_pitch))
-    {
-	char *src, *dst;
-	int src_pitch, dst_pitch, i, bytes;
-
-	exaPrepareAccess(&pPixmap->drawable, EXA_PREPARE_DEST);
-
-	dst = pExaPixmap->fb_ptr;
-	dst_pitch = pExaPixmap->fb_pitch;
-	src = pExaPixmap->sys_ptr;
-	src_pitch = pExaPixmap->sys_pitch;
-	bytes = src_pitch < dst_pitch ? src_pitch : dst_pitch;
-
-	for (i = 0; i < pPixmap->drawable.height; i++) {
-	    memcpy (dst, src, bytes);
-	    dst += dst_pitch;
-	    src += src_pitch;
+    while (nbox--) {
+	pBox->x1 = max(pBox->x1, 0);
+	pBox->y1 = max(pBox->y1, 0);
+	pBox->x2 = min(pBox->x2, pPixmap->drawable.width);
+	pBox->y2 = min(pBox->y2, pPixmap->drawable.height);
+
+	if (pBox->x1 >= pBox->x2 || pBox->y1 >= pBox->y2)
+	    continue;
+
+	if (pExaScr->info->UploadToScreen == NULL ||
+	    !pExaScr->info->UploadToScreen (pPixmap,
+					    pBox->x1, pBox->y1,
+					    pBox->x2 - pBox->x1,
+					    pBox->y2 - pBox->y1,
+					    pExaPixmap->sys_ptr
+					    + pBox->y1 * pExaPixmap->sys_pitch
+					    + pBox->x1 * pPixmap->drawable.bitsPerPixel / 8,
+					    pExaPixmap->sys_pitch))
+	{
+	    exaPrepareAccess(&pPixmap->drawable, EXA_PREPARE_DEST);
+	    exaMemcpyBox (pPixmap, pBox,
+			  pExaPixmap->sys_ptr, pExaPixmap->sys_pitch,
+			  pExaPixmap->fb_ptr, pExaPixmap->fb_pitch);
+	    exaFinishAccess(&pPixmap->drawable, EXA_PREPARE_DEST);
 	}
-	exaFinishAccess(&pPixmap->drawable, EXA_PREPARE_DEST);
+	else
+	    do_sync = TRUE;
+
+	pBox++;
     }
 
+    if (do_sync)
+	exaMarkSync (pPixmap->drawable.pScreen);
+
     pPixmap->devPrivate.ptr = save_ptr;
     pPixmap->devKind = save_pitch;
 
-    pExaPixmap->dirty = FALSE;
+    /* The previously damaged bits are now no longer damaged but valid */
+    REGION_UNION(pPixmap->drawable.pScreen,
+		 &pExaPixmap->validReg, &pExaPixmap->validReg, pRegion);
+    DamageEmpty (pExaPixmap->pDamage);
 }
 
 /**
@@ -208,11 +249,12 @@ exaCopyDirtyToFb (PixmapPtr pPixmap)
  * Called when the memory manager decides it's time to kick the pixmap out of
  * framebuffer entirely.
  */
-static void
+void
 exaPixmapSave (ScreenPtr pScreen, ExaOffscreenArea *area)
 {
     PixmapPtr pPixmap = area->privData;
     ExaPixmapPriv(pPixmap);
+    RegionPtr pDamageReg = DamageRegion(pExaPixmap->pDamage);
 
     DBG_MIGRATE (("Save %p (%p) (%dx%d) (%c)\n", pPixmap,
 		  (void*)(ExaGetPixmapPriv(pPixmap)->area ?
@@ -231,10 +273,9 @@ exaPixmapSave (ScreenPtr pScreen, ExaOffscreenArea *area)
     pExaPixmap->fb_ptr = NULL;
     pExaPixmap->area = NULL;
 
-    /* Mark it dirty now, to say that there is important data in the
-     * system-memory copy.
-     */
-    pExaPixmap->dirty = TRUE;
+    /* Mark all valid bits as damaged, so they'll get copied to FB next time */
+    REGION_UNION(pPixmap->drawable.pScreen, pDamageReg, pDamageReg,
+		 &pExaPixmap->validReg);
 }
 
 /**
@@ -413,32 +454,57 @@ exaMigrateTowardSys (PixmapPtr pPixmap)
  * If the pixmap has both a framebuffer and system memory copy, this function
  * asserts that both of them are the same.
  */
-static void
+static Bool
 exaAssertNotDirty (PixmapPtr pPixmap)
 {
     ExaPixmapPriv (pPixmap);
     CARD8 *dst, *src;
-    int dst_pitch, src_pitch, data_row_bytes, y;
+    RegionPtr pValidReg = &pExaPixmap->validReg;
+    int dst_pitch, src_pitch, cpp, y, nbox = REGION_NUM_RECTS(pValidReg);
+    BoxPtr pBox = REGION_RECTS(pValidReg);
+    Bool ret = TRUE;
 
     if (pExaPixmap == NULL || pExaPixmap->fb_ptr == NULL)
-	return;
+	return ret;
 
     dst = pExaPixmap->sys_ptr;
     dst_pitch = pExaPixmap->sys_pitch;
     src = pExaPixmap->fb_ptr;
     src_pitch = pExaPixmap->fb_pitch;
-    data_row_bytes = pPixmap->drawable.width *
-		     pPixmap->drawable.bitsPerPixel / 8;
+    cpp = pPixmap->drawable.bitsPerPixel / 8;
 
     exaPrepareAccess(&pPixmap->drawable, EXA_PREPARE_SRC);
-    for (y = 0; y < pPixmap->drawable.height; y++) {
-	if (memcmp(dst, src, data_row_bytes) != 0) {
-	     abort();
-	}
-	dst += dst_pitch;
-	src += src_pitch;
+    while (nbox--) {
+	    int rowbytes;
+
+	    pBox->x1 = max(pBox->x1, 0);
+	    pBox->y1 = max(pBox->y1, 0);
+	    pBox->x2 = min(pBox->x2, pPixmap->drawable.width);
+	    pBox->y2 = min(pBox->y2, pPixmap->drawable.height);
+
+	    if (pBox->x1 >= pBox->x2 || pBox->y1 >= pBox->y2)
+		continue;
+
+	    rowbytes = (pBox->x2 - pBox->x1) * cpp;
+	    src += pBox->y1 * src_pitch + pBox->x1 * cpp;
+	    dst += pBox->y1 * dst_pitch + pBox->x1 * cpp;
+
+	    for (y = pBox->y2 - pBox->y1; y; y--) {
+		if (memcmp(dst + pBox->y1 * dst_pitch + pBox->x1 * cpp,
+			   src + pBox->y1 * src_pitch + pBox->x1 * cpp,
+			   (pBox->x2 - pBox->x1) * cpp) != 0) {
+		    ret = FALSE;
+		    break;
+		}
+		src += src_pitch;
+		dst += dst_pitch;
+	    }
+	    src -= pBox->y1 * src_pitch + pBox->x1 * cpp;
+	    dst -= pBox->y1 * dst_pitch + pBox->x1 * cpp;
     }
     exaFinishAccess(&pPixmap->drawable, EXA_PREPARE_SRC);
+
+    return ret;
 }
 
 /**
@@ -462,8 +528,9 @@ exaDoMigration (ExaMigrationPtr pixmaps, int npixmaps, Bool can_accel)
      */
     if (pExaScr->checkDirtyCorrectness) {
 	for (i = 0; i < npixmaps; i++) {
-	    if (!exaPixmapIsDirty (pixmaps[i].pPix))
-		exaAssertNotDirty (pixmaps[i].pPix);
+	    if (!exaPixmapIsDirty (pixmaps[i].pPix) &&
+		!exaAssertNotDirty (pixmaps[i].pPix))
+		ErrorF("%s: Pixmap %d dirty but not marked as such!\n", __func__, i);
 	}
     }
     /* If anything is pinned in system memory, we won't be able to
diff --git a/exa/exa_offscreen.c b/exa/exa_offscreen.c
index 9e0aa5d25..7708dd739 100644
--- a/exa/exa_offscreen.c
+++ b/exa/exa_offscreen.c
@@ -81,15 +81,14 @@ ExaOffscreenKickOut (ScreenPtr pScreen, ExaOffscreenArea *area)
  * @param save callback for when the area is evicted from memory
  * @param privdata private data for the save callback.
  *
- * Allocates offscreen memory from the device associated with pScreen.  size and
- * align deteremine where and how large the allocated area is, and locked will
- * mark whether it should be held in card memory.  privdata may be any pointer
- * for the save callback when the area is removed.
+ * Allocates offscreen memory from the device associated with pScreen.  size
+ * and align deteremine where and how large the allocated area is, and locked
+ * will mark whether it should be held in card memory.  privdata may be any
+ * pointer for the save callback when the area is removed.
  *
- * Note that locked areas do get evicted on VT switch, because during that time
- * all offscreen memory becomes inaccessible.  This may change in the future,
- * but drivers should be aware of this and provide a callback to mark that their
- * locked allocation was evicted, and then restore it if necessary on EnterVT.
+ * Note that locked areas do get evicted on VT switch unless the driver
+ * requested version 2.1 or newer behavior.  In that case, the save callback is
+ * still called.
  */
 ExaOffscreenArea *
 exaOffscreenAlloc (ScreenPtr pScreen, int size, int align,
@@ -256,6 +255,9 @@ exaOffscreenAlloc (ScreenPtr pScreen, int size, int align,
     return area;
 }
 
+/**
+ * Ejects all offscreen areas, and uninitializes the offscreen memory manager.
+ */
 void
 ExaOffscreenSwapOut (ScreenPtr pScreen)
 {
@@ -283,12 +285,56 @@ ExaOffscreenSwapOut (ScreenPtr pScreen)
     ExaOffscreenFini (pScreen);
 }
 
+/** Ejects all pixmaps managed by EXA. */
+static void
+ExaOffscreenEjectPixmaps (ScreenPtr pScreen)
+{
+    ExaScreenPriv (pScreen);
+
+    ExaOffscreenValidate (pScreen);
+    /* loop until a single free area spans the space */
+    for (;;)
+    {
+	ExaOffscreenArea *area;
+
+	for (area = pExaScr->info->offScreenAreas; area != NULL;
+	     area = area->next)
+	{
+	    if (area->state == ExaOffscreenRemovable &&
+		area->save == exaPixmapSave)
+	    {
+		(void) ExaOffscreenKickOut (pScreen, area);
+		ExaOffscreenValidate (pScreen);
+		break;
+	    }
+	}
+	if (area == NULL)
+	    break;
+    }
+    ExaOffscreenValidate (pScreen);
+}
+
 void
 ExaOffscreenSwapIn (ScreenPtr pScreen)
 {
     exaOffscreenInit (pScreen);
 }
 
+/**
+ * Prepares EXA for disabling of FB access, or restoring it.
+ *
+ * In version 2.1, the disabling results in pixmaps being ejected, while other
+ * allocations remain.  With this plus the prevention of migration while
+ * swappedOut is set, EXA by itself should not cause any access of the
+ * framebuffer to occur while swapped out.  Any remaining issues are the
+ * responsibility of the driver.
+ *
+ * Prior to version 2.1, all allocations, including locked ones, are ejected
+ * when access is disabled, and the allocator is torn down while swappedOut
+ * is set.  This is more drastic, and caused implementation difficulties for
+ * many drivers that could otherwise handle the lack of FB access while
+ * swapped out.
+ */
 void
 exaEnableDisableFBAccess (int index, Bool enable)
 {
@@ -296,10 +342,14 @@ exaEnableDisableFBAccess (int index, Bool enable)
     ExaScreenPriv (pScreen);
 
     if (!enable) {
-	ExaOffscreenSwapOut (pScreen);
+	if (pExaScr->info->exa_minor < 1)
+	    ExaOffscreenSwapOut (pScreen);
+	else
+	    ExaOffscreenEjectPixmaps (pScreen);
 	pExaScr->swappedOut = TRUE;
     } else {
-	ExaOffscreenSwapIn (pScreen);
+	if (pExaScr->info->exa_minor < 1)
+	    ExaOffscreenSwapIn (pScreen);
 	pExaScr->swappedOut = FALSE;
     }
 }
@@ -390,6 +440,7 @@ ExaOffscreenMarkUsed (PixmapPtr pPixmap)
 	    if (area->state == ExaOffscreenRemovable)
 		area->score = (area->score * 7) / 8;
 	}
+	iter = 0;
     }
 }
 
diff --git a/exa/exa_priv.h b/exa/exa_priv.h
index 03ee0eddb..984cb669b 100644
--- a/exa/exa_priv.h
+++ b/exa/exa_priv.h
@@ -51,6 +51,7 @@
 #ifdef RENDER
 #include "fbpict.h"
 #endif
+#include "damage.h"
 
 #define DEBUG_TRACE_FALL	0
 #define DEBUG_MIGRATE		0
@@ -160,16 +161,16 @@ typedef struct {
     unsigned int    fb_size;	/**< size of pixmap in framebuffer memory */
 
     /**
-     * If area is NULL, then dirty == TRUE means that the pixmap has been
-     * modified, so the contents are defined.  Used to avoid uploads of
-     * undefined data.
-     *
-     * If area is non-NULL, then dirty == TRUE means that the pixmap data at
-     * pPixmap->devPrivate.ptr (either fb_ptr or sys_ptr) has been changed
-     * compared to the copy in the other location.  This is used to avoid
-     * uploads/downloads of unmodified data.
+     * The damage record contains the areas of the pixmap's current location
+     * (framebuffer or system) that have been damaged compared to the other
+     * location.
      */
-    Bool	    dirty;
+    DamagePtr	    pDamage;
+    /**
+     * The valid region marks the valid bits of a drawable (at least, as it's
+     * derived from damage, which may be overreported).
+     */
+    RegionRec	    validReg;
 } ExaPixmapPrivRec, *ExaPixmapPrivPtr;
  
 typedef struct _ExaMigrationRec {
@@ -315,7 +316,7 @@ ExaCheckComposite (CARD8      op,
 		  CARD16     height);
 #endif
 
-/* exaoffscreen.c */
+/* exa_offscreen.c */
 void
 ExaOffscreenMarkUsed (PixmapPtr pPixmap);
 
@@ -339,7 +340,10 @@ void
 exaFinishAccess(DrawablePtr pDrawable, int index);
 
 void
-exaDrawableDirty(DrawablePtr pDrawable);
+exaPixmapDirty(PixmapPtr pPix, int x1, int y1, int x2, int y2);
+
+void
+exaDrawableDirty(DrawablePtr pDrawable, int x1, int y1, int x2, int y2);
 
 Bool
 exaDrawableIsOffscreen (DrawablePtr pDrawable);
@@ -409,9 +413,6 @@ void
 exaDoMigration (ExaMigrationPtr pixmaps, int npixmaps, Bool can_accel);
 
 void
-exaMoveInPixmap (PixmapPtr pPixmap);
-
-void
-exaMoveOutPixmap (PixmapPtr pPixmap);
+exaPixmapSave (ScreenPtr pScreen, ExaOffscreenArea *area);
 
 #endif /* EXAPRIV_H */
diff --git a/exa/exa_render.c b/exa/exa_render.c
index 9affb9f11..75108a75c 100644
--- a/exa/exa_render.c
+++ b/exa/exa_render.c
@@ -302,12 +302,12 @@ exaTryDriverSolidFill(PicturePtr	pSrc,
 	(*pExaScr->info->Solid) (pDstPix,
 				 pbox->x1 + dst_off_x, pbox->y1 + dst_off_y,
 				 pbox->x2 + dst_off_x, pbox->y2 + dst_off_y);
+	exaPixmapDirty (pDstPix, pbox->x1 + dst_off_x, pbox->y1 + dst_off_y,
+			pbox->x2 + dst_off_x, pbox->y2 + dst_off_y);
 	pbox++;
     }
-
     (*pExaScr->info->DoneSolid) (pDstPix);
     exaMarkSync(pDst->pDrawable->pScreen);
-    exaDrawableDirty (pDst->pDrawable);
 
     REGION_UNINIT(pDst->pDrawable->pScreen, &region);
     return 1;
@@ -336,16 +336,21 @@ exaTryDriverComposite(CARD8		op,
     struct _Pixmap scratch;
     ExaMigrationRec pixmaps[3];
 
+    pSrcPix = exaGetDrawablePixmap(pSrc->pDrawable);
+    pDstPix = exaGetDrawablePixmap(pDst->pDrawable);
+    if (pMask)
+	pMaskPix = exaGetDrawablePixmap(pMask->pDrawable);
+
     /* Bail if we might exceed coord limits by rendering from/to these.  We
      * should really be making some scratch pixmaps with offsets and coords
      * adjusted to deal with this, but it hasn't been done yet.
      */
-    if (pSrc->pDrawable->width > pExaScr->info->maxX ||
-	pSrc->pDrawable->height > pExaScr->info->maxY ||
-	pDst->pDrawable->width > pExaScr->info->maxX ||
-	pDst->pDrawable->height > pExaScr->info->maxY || 
-	(pMask && (pMask->pDrawable->width > pExaScr->info->maxX ||
-		   pMask->pDrawable->height > pExaScr->info->maxY)))
+    if (pSrcPix->drawable.width > pExaScr->info->maxX ||
+	pSrcPix->drawable.height > pExaScr->info->maxY ||
+	pDstPix->drawable.width > pExaScr->info->maxX ||
+	pDstPix->drawable.height > pExaScr->info->maxY || 
+	(pMask && (pMaskPix->drawable.width > pExaScr->info->maxX ||
+		   pMaskPix->drawable.height > pExaScr->info->maxY)))
     {
 	return -1;
     }
@@ -441,12 +446,12 @@ exaTryDriverComposite(CARD8		op,
 				     pbox->y1 + dst_off_y,
 				     pbox->x2 - pbox->x1,
 				     pbox->y2 - pbox->y1);
+	exaPixmapDirty (pDstPix, pbox->x1 + dst_off_x, pbox->y1 + dst_off_y,
+			pbox->x2 + dst_off_x, pbox->y2 + dst_off_y);
 	pbox++;
     }
-
     (*pExaScr->info->DoneComposite) (pDstPix);
     exaMarkSync(pDst->pDrawable->pScreen);
-    exaDrawableDirty (pDst->pDrawable);
 
     REGION_UNINIT(pDst->pDrawable->pScreen, &region);
     return 1;
@@ -705,16 +710,19 @@ void
 exaRasterizeTrapezoid (PicturePtr pPicture, xTrapezoid  *trap,
 		       int x_off, int y_off)
 {
+    DrawablePtr pDraw = pPicture->pDrawable;
     ExaMigrationRec pixmaps[1];
 
     pixmaps[0].as_dst = TRUE;
     pixmaps[0].as_src = TRUE;
-    pixmaps[0].pPix = exaGetDrawablePixmap (pPicture->pDrawable);
+    pixmaps[0].pPix = exaGetDrawablePixmap (pDraw);
     exaDoMigration(pixmaps, 1, FALSE);
 
-    exaPrepareAccess(pPicture->pDrawable, EXA_PREPARE_DEST);
+    exaPrepareAccess(pDraw, EXA_PREPARE_DEST);
     fbRasterizeTrapezoid(pPicture, trap, x_off, y_off);
-    exaFinishAccess(pPicture->pDrawable, EXA_PREPARE_DEST);
+    exaDrawableDirty(pDraw, pDraw->x, pDraw->y,
+		     pDraw->x + pDraw->width, pDraw->y + pDraw->height);
+    exaFinishAccess(pDraw, EXA_PREPARE_DEST);
 }
 
 /**
@@ -725,16 +733,19 @@ void
 exaAddTriangles (PicturePtr pPicture, INT16 x_off, INT16 y_off, int ntri,
 		 xTriangle *tris)
 {
+    DrawablePtr pDraw = pPicture->pDrawable;
     ExaMigrationRec pixmaps[1];
 
     pixmaps[0].as_dst = TRUE;
     pixmaps[0].as_src = TRUE;
-    pixmaps[0].pPix = exaGetDrawablePixmap (pPicture->pDrawable);
+    pixmaps[0].pPix = exaGetDrawablePixmap (pDraw);
     exaDoMigration(pixmaps, 1, FALSE);
 
-    exaPrepareAccess(pPicture->pDrawable, EXA_PREPARE_DEST);
+    exaPrepareAccess(pDraw, EXA_PREPARE_DEST);
     fbAddTriangles(pPicture, x_off, y_off, ntri, tris);
-    exaFinishAccess(pPicture->pDrawable, EXA_PREPARE_DEST);
+    exaDrawableDirty(pDraw, pDraw->x, pDraw->y,
+		     pDraw->x + pDraw->width, pDraw->y + pDraw->height);
+    exaFinishAccess(pDraw, EXA_PREPARE_DEST);
 }
 
 /**
@@ -1023,10 +1034,11 @@ exaGlyphs (CARD8	op,
 
 		exaCopyArea (&pScratchPixmap->drawable, &pPixmap->drawable, pGC,
 			     0, 0, glyph->info.width, glyph->info.height, 0, 0);
-	    } else {
-		exaDrawableDirty (&pPixmap->drawable);
 	    }
 
+	    exaPixmapDirty (pPixmap, 0, 0,
+			    glyph->info.width, glyph->info.height);
+
 	    if (maskFormat)
 	    {
 		exaComposite (PictOpAdd, pPicture, NULL, pMask, 0, 0, 0, 0,
diff --git a/exa/exa_unaccel.c b/exa/exa_unaccel.c
index f9df6adc4..7713a08c9 100644
--- a/exa/exa_unaccel.c
+++ b/exa/exa_unaccel.c
@@ -200,11 +200,33 @@ ExaCheckPolyFillRect (DrawablePtr pDrawable, GCPtr pGC,
 		     int nrect, xRectangle *prect)
 {
     EXA_FALLBACK(("to %p (%c)\n", pDrawable, exaDrawableLocation(pDrawable)));
-    exaPrepareAccess (pDrawable, EXA_PREPARE_DEST);
-    exaPrepareAccessGC (pGC);
-    fbPolyFillRect (pDrawable, pGC, nrect, prect);
-    exaFinishAccessGC (pGC);
-    exaFinishAccess (pDrawable, EXA_PREPARE_DEST);
+
+    if (nrect) {
+	int x1 = max(prect->x, 0), y1 = max(prect->y, 0);
+	int x2 = min(prect->x + prect->width, pDrawable->width);
+	int y2 = min(prect->y + prect->height, pDrawable->height);
+
+	exaPrepareAccess (pDrawable, EXA_PREPARE_DEST);
+	exaPrepareAccessGC (pGC);
+	fbPolyFillRect (pDrawable, pGC, nrect, prect);
+	exaFinishAccessGC (pGC);
+	exaFinishAccess (pDrawable, EXA_PREPARE_DEST);
+
+	/* Only track bounding box of damage, as this path can degenerate to
+	 * zillions of damage boxes
+	 */
+	while (--nrect)
+	{
+	    prect++;
+	    x1 = min(x1, prect->x);
+	    x2 = max(x2, prect->x + prect->width);
+	    y1 = min(y1, prect->y);
+	    y2 = max(y2, prect->y + prect->height);
+	}
+
+	exaDrawableDirty (pDrawable, pDrawable->x + x1, pDrawable->y + y1,
+			  pDrawable->x + x2, pDrawable->y + y2);
+    }
 }
 
 void
diff --git a/fb/fbpict.h b/fb/fbpict.h
index 5cdde9ef5..434526e32 100644
--- a/fb/fbpict.h
+++ b/fb/fbpict.h
@@ -105,9 +105,6 @@ fbCanGetSolid(PicturePtr pict)
     }
 }
 
-#define fbCanGetSolid(pict) \
-(pict->pDrawable != NULL && pict->pDrawable->width == 1 && pict->pDrawable->height == 1)
-
 #define fbComposeGetSolid(pict, bits, fmt) { \
     FbBits	*__bits__; \
     FbStride	__stride__; \
diff --git a/hw/xfree86/common/xf86Module.h b/hw/xfree86/common/xf86Module.h
index 3c3247e40..281183960 100644
--- a/hw/xfree86/common/xf86Module.h
+++ b/hw/xfree86/common/xf86Module.h
@@ -84,7 +84,7 @@ typedef enum {
  * mask is 0xFFFF0000.
  */
 #define ABI_ANSIC_VERSION	SET_ABI_VERSION(0, 3)
-#define ABI_VIDEODRV_VERSION	SET_ABI_VERSION(1, 1)
+#define ABI_VIDEODRV_VERSION	SET_ABI_VERSION(1, 2)
 #define ABI_XINPUT_VERSION	SET_ABI_VERSION(1, 0)
 #define ABI_EXTENSION_VERSION	SET_ABI_VERSION(0, 3)
 #define ABI_FONT_VERSION	SET_ABI_VERSION(0, 5)
diff --git a/hw/xfree86/common/xf86fbman.c b/hw/xfree86/common/xf86fbman.c
index 8141a8373..d64cfaee4 100644
--- a/hw/xfree86/common/xf86fbman.c
+++ b/hw/xfree86/common/xf86fbman.c
@@ -368,10 +368,8 @@ AllocateArea(
    /* look through the free boxes */
    for(i = 0; i < num; i++, boxp++) {
 	x = boxp->x1;
-	if(granularity) {
-	    int tmp = x % granularity;
-	    if(tmp) x += (granularity - tmp);
-	}
+	if (granularity > 1)
+	    x = ((x + granularity - 1) / granularity) * granularity;
 
 	if(((boxp->y2 - boxp->y1) < h) || ((boxp->x2 - x) < w))
 	   continue;
@@ -398,10 +396,8 @@ AllocateArea(
 
 	   boxp = &(link->area.box);
 	   x = boxp->x1;
- 	   if(granularity) {
-		int tmp = x % granularity;
-		if(tmp) x += (granularity - tmp);
-	   }
+ 	   if (granularity > 1)
+		x = ((x + granularity - 1) / granularity) * granularity;
 
 	   if(((boxp->y2 - boxp->y1) < h) || ((boxp->x2 - x) < w)) {
 		link = link->next;
@@ -685,10 +681,8 @@ localQueryLargestOffscreenArea(
 
     while(nbox--) {
 	x = pbox->x1;
-	if(granularity) {
-	   int tmp = x % granularity;
-	   if(tmp) x += (granularity - tmp);
-        }
+	if (granularity > 1)
+	   x = ((x + granularity - 1) / granularity) * granularity;
 
 	w = pbox->x2 - x;
 	h = pbox->y2 - pbox->y1;
@@ -845,7 +839,9 @@ AllocateLinear(
    while (linear) {
  	/* Make sure we get a free area that's not an XY fallback case */
       if (!linear->area && linear->free) {
-	 offset = (linear->linear.offset + granularity) & ~granularity;
+	 offset = linear->linear.offset;
+	 if (granularity > 1)
+	    offset = ((offset + granularity - 1) / granularity) * granularity;
 	 end = offset+size;
 	 if (end <= (linear->linear.offset + linear->linear.size))
 	    break;
@@ -935,17 +931,20 @@ localAllocateOffscreenLinear(
    extents = REGION_EXTENTS(pScreen, offman->InitialBoxes);
    pitch = extents->x2 - extents->x1;
 
-   if (gran && gran > pitch) {
-	/* we can't match the specified alignment with XY allocations */
-	xfree(link);
-	return NULL;
-   }
-   if (gran && (pitch % gran)) {
-       /* pitch and granularity aren't a perfect match, let's allocate
-	* a bit more so we can align later on
-	*/
-       length += gran - 1;
-   }
+   if (gran > 1) {
+        if (gran > pitch) {
+            /* we can't match the specified alignment with XY allocations */
+            xfree(link);
+            return NULL;
+        }
+
+        if (pitch % gran) {
+            /* pitch and granularity aren't a perfect match, let's allocate
+             * a bit more so we can align later on
+             */
+            length += gran - 1;
+        }
+    }
 
    if(length < pitch) { /* special case */
 	w = length;
@@ -968,8 +967,8 @@ localAllocateOffscreenLinear(
 	linear->pScreen = pScreen;
 	linear->size = h * w;
 	linear->offset = (pitch * area->box.y1) + area->box.x1;
-	if (gran && linear->offset % gran)
-		linear->offset += gran - (linear->offset % gran);
+	if (gran > 1)
+            linear->offset += ((linear->offset + gran - 1) / gran) * gran;
 	linear->granularity = gran;
 	linear->MoveLinearCallback = moveCB;
 	linear->RemoveLinearCallback = removeCB;
@@ -1435,9 +1434,12 @@ xf86AllocateLinearOffscreenArea (
    extents = REGION_EXTENTS(pScreen, offman->InitialBoxes);
    w = extents->x2 - extents->x1;
 
-   if(gran && ((gran > w) || (w % gran))) {
-	/* we can't match the specified alignment with XY allocations */
-	return NULL;
+   if (gran > 1) {
+	if (gran > w)
+	    return NULL;
+
+	if (w % gran)
+	    length += gran - 1;
    }
 
    if(length <= w) { /* special case */
diff --git a/hw/xfree86/doc/man/xorg.conf.man.pre b/hw/xfree86/doc/man/xorg.conf.man.pre
index 8d52b2bcf..bbba21112 100644
--- a/hw/xfree86/doc/man/xorg.conf.man.pre
+++ b/hw/xfree86/doc/man/xorg.conf.man.pre
@@ -649,7 +649,7 @@ being
 that are passed to the module when it is loaded.
 .PP
 Example: the extmod module (which contains a miscellaneous group of
-server extensions) can be loaded, with the __xservername__-DGA extension
+server extensions) can be loaded, with the XFree86-DGA extension
 disabled by using the following entry:
 .PP
 .RS 4
diff --git a/hw/xfree86/exa/exa.man.pre b/hw/xfree86/exa/exa.man.pre
index ea41b90e4..b0eecd5cc 100644
--- a/hw/xfree86/exa/exa.man.pre
+++ b/hw/xfree86/exa/exa.man.pre
@@ -35,6 +35,6 @@ Default: No.
 Chooses an alternate pixmap migration heuristic, for debugging purposes.  The
 default is intended to be the best performing one for general use, though others
 may help with specific use cases.  Available options include \*qalways\*q,
-\*qgreedy\*q, and \*qsmart\*q.  Default: smart.
+\*qgreedy\*q, and \*qsmart\*q.  Default: always.
 .SH AUTHORS
 Authors include: Keith Packard, Eric Anholt, Zack Rusin, and Michel Dänzer
diff --git a/hw/xfree86/fbdevhw/fbdevhw.c b/hw/xfree86/fbdevhw/fbdevhw.c
index 70bed620b..a573b8f5b 100644
--- a/hw/xfree86/fbdevhw/fbdevhw.c
+++ b/hw/xfree86/fbdevhw/fbdevhw.c
@@ -183,12 +183,20 @@ print_xfree_mode(char *txt, DisplayModePtr mode)
 static void
 xfree2fbdev_fblayout(ScrnInfoPtr pScrn, struct fb_var_screeninfo *var)
 {
-	var->xres_virtual   = pScrn->virtualX;
+	var->xres_virtual   = pScrn->displayWidth ? pScrn->displayWidth :
+			      pScrn->virtualX;
 	var->yres_virtual   = pScrn->virtualY;
 	var->bits_per_pixel = pScrn->bitsPerPixel;
-	var->red.length     = pScrn->weight.red;
-	var->green.length   = pScrn->weight.green;
-	var->blue.length    = pScrn->weight.blue;
+	if (pScrn->defaultVisual == TrueColor ||
+	    pScrn->defaultVisual == DirectColor) {
+	    var->red.length     = pScrn->weight.red;
+	    var->green.length   = pScrn->weight.green;
+	    var->blue.length    = pScrn->weight.blue;
+	} else {
+	    var->red.length     = 8;
+	    var->green.length   = 8;
+	    var->blue.length    = 8;
+	}
 }
 
 static void
@@ -227,6 +235,26 @@ xfree2fbdev_timing(DisplayModePtr mode, struct fb_var_screeninfo *var)
 		var->vmode = FB_VMODE_NONINTERLACED;
 }
 
+static Bool
+fbdev_modes_equal(struct fb_var_screeninfo *set, struct fb_var_screeninfo *req)
+{
+	return (set->xres_virtual >= req->xres_virtual &&
+		set->yres_virtual == req->yres_virtual &&
+		set->bits_per_pixel == req->bits_per_pixel &&
+		set->red.length == req->red.length &&
+		set->green.length == req->green.length &&
+		set->blue.length == req->blue.length &&
+		set->xres == req->xres && set->yres == req->yres &&
+		set->pixclock == req->pixclock &&
+		set->right_margin == req->right_margin &&
+		set->hsync_len == req->hsync_len &&
+		set->left_margin == req->left_margin &&
+		set->lower_margin == req->lower_margin &&
+		set->vsync_len == req->vsync_len &&
+		set->upper_margin == req->upper_margin &&
+		set->sync == req->sync && set->vmode == req->vmode);
+}
+
 static void
 fbdev2xfree_timing(struct fb_var_screeninfo *var, DisplayModePtr mode)
 {
@@ -470,13 +498,53 @@ fbdevHWGetVidmem(ScrnInfoPtr pScrn)
 	return fPtr->fix.smem_len;
 }
 
+static Bool
+fbdevHWSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode, Bool check)
+{
+	fbdevHWPtr fPtr = FBDEVHWPTR(pScrn);
+	struct fb_var_screeninfo req_var = fPtr->var, set_var;
+	
+	TRACE_ENTER("SetMode");
+
+	xfree2fbdev_fblayout(pScrn, &req_var);
+	xfree2fbdev_timing(mode, &req_var);
+
+#if DEBUG
+	print_xfree_mode("init", mode);
+	print_fbdev_mode("init", &req_var);
+#endif
+
+	set_var = req_var;
+
+	if (check)
+		set_var.activate = FB_ACTIVATE_TEST;
+
+	if (0 != ioctl(fPtr->fd, FBIOPUT_VSCREENINFO, (void*)(&set_var))) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "FBIOPUT_VSCREENINFO: %s\n", strerror(errno));
+		return FALSE;
+	}
+
+	if (!fbdev_modes_equal(&set_var, &req_var)) {
+		if (!check)
+			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+				   "FBIOPUT_VSCREENINFO succeeded but modified "
+				   "mode\n");
+#if DEBUG
+		print_fbdev_mode("returned", &set_var);
+#endif
+		return FALSE;
+	}
+
+	if (!check)
+		fPtr->var = set_var;
+
+	return TRUE;
+}
+
 void
 fbdevHWSetVideoModes(ScrnInfoPtr pScrn)
 {
-	fbdevHWPtr fPtr = FBDEVHWPTR(pScrn);
-	int virtX = pScrn->display->virtualX;
-	int virtY = pScrn->display->virtualY;
-	struct fb_var_screeninfo var;
 	char **modename;
 	DisplayModePtr mode,this,last = pScrn->modes;
 
@@ -484,6 +552,9 @@ fbdevHWSetVideoModes(ScrnInfoPtr pScrn)
 	if (NULL == pScrn->display->modes)
 		return;
 
+	pScrn->virtualX = pScrn->display->virtualX;
+	pScrn->virtualY = pScrn->display->virtualY;
+
 	for (modename = pScrn->display->modes; *modename != NULL; modename++) {
 		for (mode = pScrn->monitor->Modes; mode != NULL; mode = mode->next)
 			if (0 == strcmp(mode->name,*modename))
@@ -493,27 +564,20 @@ fbdevHWSetVideoModes(ScrnInfoPtr pScrn)
 				   "\tmode \"%s\" not found\n", *modename);
 			continue;
 		}
-		memset(&var,0,sizeof(var));
-		xfree2fbdev_timing(mode,&var);
-		var.xres_virtual = virtX;
-		var.yres_virtual = virtY;
-		var.bits_per_pixel = pScrn->bitsPerPixel;
-		var.red.length = pScrn->weight.red;
-		var.green.length = pScrn->weight.green;
-		var.blue.length = pScrn->weight.blue;
-
-		var.activate = FB_ACTIVATE_TEST;
-		if (var.xres_virtual < var.xres) var.xres_virtual = var.xres;
-		if (var.yres_virtual < var.yres) var.yres_virtual = var.yres;
-		if (-1 == ioctl(fPtr->fd,FBIOPUT_VSCREENINFO,(void*)(&var))) {
+
+		if (!fbdevHWSetMode(pScrn, mode, TRUE)) {
 			xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 				   "\tmode \"%s\" test failed\n", *modename);
 			continue;
 		}
 		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 			   "\tmode \"%s\" ok\n", *modename);
-		if (virtX < var.xres) virtX = var.xres;
-		if (virtY < var.yres) virtY = var.yres;
+
+		if (pScrn->virtualX < mode->HDisplay)
+			pScrn->virtualX = mode->HDisplay;
+		if (pScrn->virtualY < mode->VDisplay)
+			pScrn->virtualY = mode->VDisplay;
+
 		if (NULL == pScrn->modes) {
 			pScrn->modes = xnfalloc(sizeof(DisplayModeRec));
 			this = pScrn->modes;
@@ -530,8 +594,6 @@ fbdevHWSetVideoModes(ScrnInfoPtr pScrn)
 		}
 		last = this;
 	}
-	pScrn->virtualX     = virtX;
-	pScrn->virtualY     = virtY;
 }
 
 DisplayModePtr
@@ -673,21 +735,12 @@ fbdevHWModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {	
 	fbdevHWPtr fPtr = FBDEVHWPTR(pScrn);
 	
-	TRACE_ENTER("ModeInit");
-	xfree2fbdev_fblayout(pScrn, &fPtr->var);
-	xfree2fbdev_timing(mode,  &fPtr->var);
-#if DEBUG
-	print_xfree_mode("init",mode);
-	print_fbdev_mode("init",&fPtr->var);
-#endif
 	pScrn->vtSema = TRUE;
 
 	/* set */
-	if (0 != ioctl(fPtr->fd,FBIOPUT_VSCREENINFO,(void*)(&fPtr->var))) {
-		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-			   "FBIOPUT_VSCREENINFO: %s\n", strerror(errno));
+	if (!fbdevHWSetMode(pScrn, mode, FALSE))
 		return FALSE;
-	}
+
 	/* read back */
 	if (0 != ioctl(fPtr->fd,FBIOGET_FSCREENINFO,(void*)(&fPtr->fix))) {
 		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -699,6 +752,20 @@ fbdevHWModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 			   "FBIOGET_VSCREENINFO: %s\n", strerror(errno));
 		return FALSE;
 	}
+
+	if (pScrn->defaultVisual == TrueColor ||
+	    pScrn->defaultVisual == DirectColor) {
+	    /* XXX: This is a hack, but it should be a NOP for all the setups that
+	     * worked before and actually seems to fix some others...
+	     */
+	    pScrn->offset.red   = fPtr->var.red.offset;
+	    pScrn->offset.green = fPtr->var.green.offset;
+	    pScrn->offset.blue  = fPtr->var.blue.offset;
+	    pScrn->mask.red     = ((1 << fPtr->var.red.length) - 1) << fPtr->var.red.offset;
+	    pScrn->mask.green   = ((1 << fPtr->var.green.length) - 1) << fPtr->var.green.offset;
+	    pScrn->mask.blue    = ((1 << fPtr->var.blue.length) - 1) << fPtr->var.blue.offset;
+	}
+
 	return TRUE;
 }
 
@@ -767,18 +834,12 @@ ModeStatus
 fbdevHWValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
 {
 	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-	fbdevHWPtr fPtr = FBDEVHWPTR(pScrn);
-	struct fb_var_screeninfo var;
 
 	TRACE_ENTER("ValidMode");
-	memcpy(&var,&fPtr->var,sizeof(var));
-	xfree2fbdev_timing(mode, &var);
-	var.activate = FB_ACTIVATE_TEST;
-	if (0 != ioctl(fPtr->fd,FBIOPUT_VSCREENINFO,(void*)(&fPtr->var))) {
-		xf86DrvMsg(scrnIndex, X_ERROR,
-			   "FBIOPUT_VSCREENINFO: %s\n", strerror(errno));
+
+	if (!fbdevHWSetMode(pScrn, mode, TRUE))
 		return MODE_BAD;
-	}
+
 	return MODE_OK;
 }
 
@@ -786,15 +847,12 @@ Bool
 fbdevHWSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
 {
 	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-	fbdevHWPtr fPtr = FBDEVHWPTR(pScrn);
 
 	TRACE_ENTER("SwitchMode");
-	xfree2fbdev_timing(mode, &fPtr->var);
-	if (0 != ioctl(fPtr->fd,FBIOPUT_VSCREENINFO,(void*)(&fPtr->var))) {
-		xf86DrvMsg(scrnIndex, X_ERROR,
-			   "FBIOPUT_VSCREENINFO: %s\n", strerror(errno));
+
+	if (!fbdevHWSetMode(pScrn, mode, FALSE))
 		return FALSE;
-	}
+
 	return TRUE;
 }
 
diff --git a/hw/xfree86/loader/dlloader.c b/hw/xfree86/loader/dlloader.c
index a0e867056..2afdef789 100644
--- a/hw/xfree86/loader/dlloader.c
+++ b/hw/xfree86/loader/dlloader.c
@@ -113,6 +113,10 @@ DLFindSymbol(const char *name)
     DLModuleList *l;
     void *p;
 
+    p = dlsym(RTLD_DEFAULT, name);
+    if (p != NULL)
+	return p;
+
     for (l = dlModuleList; l != NULL; l = l->next) {
         p = DLFindSymbolLocal(l->module, name);
 	if (p)
diff --git a/hw/xfree86/loader/loadmod.c b/hw/xfree86/loader/loadmod.c
index 12f5dc9cc..ec0f181db 100644
--- a/hw/xfree86/loader/loadmod.c
+++ b/hw/xfree86/loader/loadmod.c
@@ -903,7 +903,7 @@ doLoadModule(const char *module, const char *path, const char **subdirlist,
      * check the elements in the path
      */
     if (PathIsAbsolute(module))
-	xstrdup(module);
+	found = xstrdup(module);
     path_elem = pathlist;
     while (!found && *path_elem != NULL) {
 	found = FindModule(m, *path_elem, subdirlist, patterns);
diff --git a/hw/xfree86/os-support/bus/linuxPci.c b/hw/xfree86/os-support/bus/linuxPci.c
index 03388f1ff..55ed87859 100644
--- a/hw/xfree86/os-support/bus/linuxPci.c
+++ b/hw/xfree86/os-support/bus/linuxPci.c
@@ -570,7 +570,8 @@ linuxMapPci(int ScreenNum, int Flags, PCITAG Tag,
 
 	xf86InitVidMem();
 
-	if (((fd = linuxPciOpenFile(Tag ,FALSE)) < 0) ||
+       prot = ((Flags & VIDMEM_READONLY) == 0);
+       if (((fd = linuxPciOpenFile(Tag, prot)) < 0) ||
 	    (ioctl(fd, mmap_ioctl, 0) < 0))
 	    break;
 
diff --git a/hw/xfree86/os-support/linux/Makefile.am b/hw/xfree86/os-support/linux/Makefile.am
index 9c4fa4984..10f24400f 100644
--- a/hw/xfree86/os-support/linux/Makefile.am
+++ b/hw/xfree86/os-support/linux/Makefile.am
@@ -6,9 +6,14 @@ PLATFORM_DEFINES = -DOS_PROBE_PCI_CHIPSET=lnxProbePciChipset
 PLATFORM_INCLUDES = -I$(srcdir)/../shared
 endif
 if LINUX_ALPHA
-PLATFORM_PCI_SUPPORT = lnx_ev56.c \
+noinst_LTLIBRARIES += liblinuxev56.la
+PLATFORM_PCI_SUPPORT = \
        $(srcdir)/lnx_axp.c \
        $(srcdir)/../shared/xf86Axp.c
+
+liblinuxev56_la_CFLAGS = -mcpu=ev56
+
+liblinuxev56_la_SOURCES = lnx_ev56.c
 endif
 
 if LNXACPI
@@ -48,3 +53,7 @@ EXTRA_DIST = \
 	$(LNX_EXTRA_SRCS) \
 	lnx.h \
 	$(srcdir)/../shared/xf86Axp.h
+
+if LINUX_ALPHA
+liblinux_la_LIBADD = liblinuxev56.la
+endif
diff --git a/hw/xfree86/os-support/linux/lnx_ev56.c b/hw/xfree86/os-support/linux/lnx_ev56.c
index 78756a67c..11c45e538 100644
--- a/hw/xfree86/os-support/linux/lnx_ev56.c
+++ b/hw/xfree86/os-support/linux/lnx_ev56.c
@@ -1,4 +1,4 @@
-
+/* This file has to be built with -mcpu=ev56 */
 #ifdef HAVE_XORG_CONFIG_H
 #include <xorg-config.h>
 #endif
diff --git a/hw/xfree86/scanpci/pci.ids b/hw/xfree86/scanpci/pci.ids
index d48e25c58..64713d034 100644
--- a/hw/xfree86/scanpci/pci.ids
+++ b/hw/xfree86/scanpci/pci.ids
@@ -11,7 +11,7 @@
 #	This file can be distributed under either the GNU General Public License
 #	(version 2 or higher) or the 3-clause BSD License.
 #
-#	Daily snapshot on Wed 2006-12-06 02:05:02
+#	Daily snapshot on Thu 2007-01-18 02:05:01
 #
 
 # Vendors, devices and subsystems. Please keep sorted.
@@ -23,11 +23,28 @@
 
 0000  Gammagraphx, Inc.
 001a  Ascend Communications, Inc.
+001c  PEAK-System Technik GmbH
+	0001  PCAN-PCI CAN-Bus controller
 0033  Paradyne corp.
 003d  Lockheed Martin-Marietta Corp
 # Real TJN ID is e159, but they got it wrong several times --mj
 0059  Tiger Jet Network Inc. (Wrong ID)
 0070  Hauppauge computer works Inc.
+	0003  WinTV PVR-250
+	0009  WinTV PVR-150
+	0801  WinTV PVR-150
+	0807  WinTV PVR-150
+	4000  WinTV PVR-350
+	4001  WinTV PVR-250 (v1)
+	4009  WinTV PVR-250
+	4800  WinTV PVR-350
+	4801  WinTV PVR-250 MCE
+	4803  WinTV PVR-250
+	8003  WinTV PVR-150
+	8801  WinTV PVR-150
+	c801  WinTV PVR-150
+	e807  WinTV PVR-500 MCE (1st tuner)
+	e817  WinTV PVR-500 MCE (2nd tuner)
 0071  Nebula Electronics Ltd.
 0095  Silicon Image, Inc. (Wrong ID)
 	0680  Ultra ATA/133 IDE RAID CONTROLLER CARD
@@ -51,6 +68,7 @@
 0315  SK-Electronics Co., Ltd.
 0357  TTTech AG
 	000a  TTP-Monitoring Card V2.0
+0403  Future Technology Devices International Ltd
 0432  SCM Microsystems, Inc.
 	0001  Pluto2 DVB-T Receiver for PCMCIA [EasyWatch MobilSet]
 045e  Microsoft
@@ -63,6 +81,7 @@
 	001a  FSD7000 802.11g PCI Wireless card
 	0109  F5U409-CU USB/Serial Portable Adapter
 	7050  F5D7050 802.11g Wireless USB Adapter
+	705c  F5D7050 v4
 05a9  OmniVision
 	8519  OV519 series
 05e3  CyberDoor
@@ -78,23 +97,42 @@
 067b  Prolific Technology, Inc.
 	2303  PL-2303 USB-to-Serial Converter
 	3507  PL-3507 Hi-Speed USB & IEEE 1394 Combo to IDE Bridge Controller
+069d  Hughes Network Systems (HNS)
 0721  Sapphire, Inc.
+07ca  AVerMedia Technologies Inc.
+	b808  AVerTV DVB-T Volar (USB 2.0)
 07e2  ELMEG Communication Systems GmbH
+0842  NPG, Personal Grand Technology
+08ff  AuthenTec
+	afe4  [Anchor] AF-S2 FingerLoc Sensor Module
 # Wrong ID used in subsystem ID of VIA USB controllers.
 0925  VIA Technologies, Inc. (Wrong ID)
 093a  PixArt Imaging Inc.
+	010e  Innovage Mini Digital Camera
+	010f  SDC-300 Webcam
+	2468  CIF Single Chip
+	2603  Philips Webcam SPC500NC
+	2608  Maxell MaxCam RotaWeb
 09c1  Arris
 	0704  CM 200E Cable Modem
 0a89  BREA Technologies Inc
+0ace  ZyDAS
+	1211  ZD1211 IEEE 802.11b+g USB Adapter
 0b0b  Rhino Equiment Corp.
 	0105  Rhino R1T1
 	0205  Rhino R4FXO
+	0206  RCB4FXO 4-channel FXO analog telphony card
 	0305  Rhino R4T1
 	0405  Rhino R8FXX
+	0406  RCB8FXX 8-channel modular analog telphony card
 	0505  Rhino R24FXX
-	0506  Rhino R2T1
+	0506  RCB24FXS 24-Channel FXS analog telphony card
 	0605  Rhino R2T1
 	0705  Rhino R24FXS
+	0706  RCB24FXO 24-Channel FXO analog telphony card
+	0905  R1T3 Single T3 Digital Telephony Card
+	0906  RCB24FXX 24-channel modular analog telphony card
+	0a06  RCB672FXX 672-channel modular analog telphony card
 0b49  ASCII Corporation
 	064f  Trance Vibrator
 0ccd  TerraTec Electronic GmbH
@@ -288,16 +326,33 @@
 	0041  53C1035ZC PCI-X Fusion-MPT Dual Ultra320 SCSI
 	0050  SAS1064 PCI-X Fusion-MPT SAS
 	0054  SAS1068 PCI-X Fusion-MPT SAS
+	0055  SAS1068 PCI-X Fusion-MPT SAS
+		1033 8336  SAS1068
 	0056  SAS1064E PCI-Express Fusion-MPT SAS
 	0058  SAS1068E PCI-Express Fusion-MPT SAS
 	005a  SAS1066E PCI-Express Fusion-MPT SAS
 	005c  SAS1064A PCI-X Fusion-MPT SAS
 	005e  SAS1066 PCI-X Fusion-MPT SAS
 	0060  MegaRAID SAS 1078
+		1000 1006  MegaRAID SAS 8888ELP
+		1000 100a  MegaRAID SAS 8708ELP
+		1000 100e  MegaRAID SAS 8884E
+		1000 100f  MegaRAID SAS 8708E
+		1000 1010  MegaRAID SATA 350-8ELP
+		1000 1011  MegaRAID SATA 350-4ELP
+		1000 1012  MegaRAID SAS 8704ELP
+		1014 0363  MegaRAID SAS PCI Express ROMB
+		1014 0364  SystemX MegaRAID SAS 8808E
+		1014 0365  SystemX MegaRAID SAS 8884E
 		1028 1f0a  PERC 6/E Adapter RAID Controller
 		1028 1f0b  PERC 6/i Adapter RAID Controller
 		1028 1f0c  PERC 6/i Integrated RAID Controller
-		1028 1f0d  PERC 6/i Enhanced RAID Controller
+		1028 1f0d  CERC 6/i Adapter RAID Controller
+		1028 1f11  CERC 6/i Adapter RAID Controller
+		1043 824d  MegaRAID SAS PCI Express ROMB
+		1170 002f  MegaRAID SAS PCI Express ROMB
+		8086 34cc  Integrated RAID Controller SROMBSAS28E
+		8086 34cd  Integrated RAID Controller SROMBSAS28E
 	0062  SAS1078 PCI-Express Fusion-MPT SAS
 		1000 0062  SAS1078 PCI-Express Fusion-MPT SAS
 	008f  53c875J
@@ -317,6 +372,9 @@
 		1025 004d  MegaRAID ACER ROMB-2E RAID Controller
 		1028 0001  PowerEdge RAID Controller PERC4e/SC
 		1028 0002  PowerEdge RAID Controller PERC4e/DC
+		1028 0012  PowerEdge RAID Controller RAC4
+		1028 0015  PowerEdge RAID Controller PERC5
+		1028 1f03  PowerEdge RAID Controller PERC5
 		1734 1065  FSC MegaRAID PCI Express ROMB
 		8086 0002  MegaRAID Intel RAID Controller SRCU42E
 	0409  MegaRAID
@@ -330,6 +388,7 @@
 		1000 1002  MegaRAID SAS 8480E
 		1000 1003  MegaRAID SAS 8344ELP
 		1000 1004  MegaRAID SAS 8308ELP
+		1000 1008  MegaRAID SAS 84016E
 		1000 100c  MegaRAID SATA 300-12E
 		1000 100d  MegaRAID SATA 300-16E
 		1000 2004  MegaRAID SATA 300-8ELP
@@ -338,8 +397,8 @@
 		1054 3016  MegaRAID SAS RoMB Server
 		1734 1081  MegaRAID SAS PCI Express ROMB
 		1734 10a3  MegaRAID SAS PCI Express ROMB
-		8086 1001  SRCSAS18E RAID Controller
-		8086 1003  SRCSAS144E RAID Controller
+		8086 1001  RAID Controller SRCSAS18E
+		8086 1003  RAID Controller SRCSAS144E
 		8086 3500  SROMBSAS18E RAID Controller
 		8086 3501  SROMBSAS18E RAID Controller
 		8086 3504  SROMBSAS18E RAID Controller
@@ -509,7 +568,11 @@
 		103c 308b  MX6125
 	4379  ATI 4379 Serial ATA Controller
 	437a  ATI 437A Serial ATA Controller
+		1002 4379  ATI 4379 Serial ATA Controller
+		1002 437a  ATI 437A Serial ATA Controller
+		14f1 8800  Leadtek WinFast TV2000XP Expert
 	437b  SB450 HDA Audio
+		1734 10b8  Realtek High Definition Audio
 	4380  SB600 Non-Raid-5 SATA
 	4381  SB600 Raid-5 SATA
 	4382  SB600 AC97 Audio
@@ -584,6 +647,7 @@
 		1734 007a  Primergy RX300
 		8086 3411  SDS2 Mainboard
 		8086 3427  S875WP1-E mainboard
+		8086 5744  S845WD1-E mainboard
 	4753  Rage XC
 		1002 4753  Rage XC
 	4754  3D Rage I/II 215GT [Mach64 GT]
@@ -711,10 +775,12 @@
 		1025 005a  TravelMate 290
 		103c 088c  NC8000 laptop
 		103c 0890  NC6000 laptop
+		144d c00c  P35 notebook
 		1462 0311  MSI M510A
 		1734 1055  Amilo M1420W
 	4e51  M10 NQ [Radeon Mobility 9600]
 	4e52  RV350 [Mobility Radeon 9600 M10]
+		144d c00c  P35 notebook
 	4e53  M10 NS [Radeon Mobility 9600]
 	4e54  M10 NT [FireGL Mobility T2]
 	4e56  M11 NV [FireGL Mobility T2e]
@@ -900,7 +966,7 @@
 	554d  R430 [Radeon X800 XL] (PCIe)
 	554f  R430 [Radeon X800 (PCIE)]
 	5550  R423 [Fire GL V7100]
-	5551  R423 UQ [FireGL V7200 (PCIE)]
+	5551  R423 [FireGL V5100 (PCIE)]
 	5552  R423 UR [FireGL V5100 (PCIE)]
 	5554  R423 UT [FireGL V7100 (PCIE)]
 	5569  R423 UI [Radeon X800PRO (PCIE)] Secondary
@@ -936,6 +1002,7 @@
 		1025 0080  Aspire 5024WLMMi
 		103c 308b  MX6125
 	5951  ATI Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge
+	5952  RD580 [CrossFire Xpress 3200] Chipset Host Bridge
 	5954  RS480 [Radeon Xpress 200G Series]
 		1002 5954  RV370 [Radeon Xpress 200G Series]
 	5955  ATI Radeon XPRESS 200M 5955 (PCIE)
@@ -954,6 +1021,7 @@
 		18bc 0053  Radeon 9200 Game Buster VIVO
 	5962  RV280 [Radeon 9200]
 	5964  RV280 [Radeon 9200 SE]
+		1002 5964  ATI Radeon 9200 SE, 64-bit 128MB DDR, 200/166MHz
 		1043 c006  ASUS Radeon 9200 SE / TD / 128M
 		1458 4018  Radeon 9200 SE
 		1458 4032  Radeon 9200 SE 128MB
@@ -966,11 +1034,12 @@
 		18bc 0173  GC-R9200L(SE)-C3H [Radeon 9200 Game Buster]
 	5969  ES1000
 	5974  RS482 [Radeon Xpress 200]
-	5975  RS482 [Radeon Xpress 200M]
+	5975  RS485 [Radeon Xpress 1100 IGP]
 	5a33  Radeon Xpress 200 Host Bridge
 	5a34  RS480 PCI-X Root Port
 # Comes in pair with 5a3f
 	5a36  RS480 PCI Bridge
+	5a37  RS480 PCI Bridge
 	5a38  RS480 PCI Bridge
 # Comes in pair with 5a38
 	5a39  RS480 PCI Bridge
@@ -998,6 +1067,7 @@
 	5c61  M9+ 5C61 [Radeon Mobility 9200 (AGP)]
 	5c63  M9+ 5C63 [Radeon Mobility 9200 (AGP)]
 		1002 5c63  Apple iBook G4 2004
+		144d c00c  P30 notebook
 	5d44  RV280 [Radeon 9200 SE] (Secondary)
 		1458 4019  Radeon 9200 SE (Secondary)
 		1458 4032  Radeon 9200 SE 128MB
@@ -1052,11 +1122,13 @@
 		1002 0323  All-in-Wonder X1800XL (Secondary)
 		1002 0d03  Radeon X1800 CrossFire Edition (Secondary)
 	7140  RV515 [Radeon X1600]
-	7142  RV515 [Radeon X1300]
+	7142  RV515 PRO [ATI Radeon X1300/X1550 Series]
 		1002 0322  All-in-Wonder 2006 PCI-E Edition
+	7143  RV505 [Radeon X1550 Series]
 	7145  Radeon Mobility X1400
 	7146  RV515 [Radeon X1300]
 		1002 0322  All-in-Wonder 2006 PCI-E Edition
+	7147  RV505 [Radeon X1550 64-bit]
 	7149  M52 [ATI Mobility Radeon X1300]
 	714a  M52 [ATI Mobility Radeon X1300]
 	714b  M52 [ATI Mobility Radeon X1300]
@@ -1064,28 +1136,47 @@
 	714d  RV515 [Radeon X1300]
 	714e  RV515 [Radeon X1300]
 	7152  RV515 GL ATI FireGL V3300 Primary
+	7153  RV515GL [FireGL V3350]
 	715e  RV515 [Radeon X1300]
-	7162  RV515 [Radeon X1300] (Secondary)
+	715f  RV505 CE [Radeon X1550 64-bit]
+	7162  RV515 PRO [ATI Radeon X1300/X1550 Series Secondary]
 		1002 0323  All-in-Wonder 2006 PCI-E Edition (Secondary)
 	7166  RV515 [Radeon X1300] (Secondary)
 		1002 0323  All-in-Wonder 2006 PCI-E Edition (Secondary)
 	7172  RV515 GL ATI FireGL V3300 Secondary
-	7180  RV516 Radeon X1300 Series Primary
+	7173  RV515GL [FireGL V3350 Secondary]
+	7180  RV516 [ATI Radeon X1300/X1550 Series]
 	7181  RV516 XT Radeon X1600 Series Primary
-	71a0  RV516 Radeon X1300 Series Secondary
+	7183  RV516 [ATI Radeon X1300/X1550 Series]
+	7187  RV516 [ATI Radeon X1300/X1550 Series]
+	7188  M64-S [ATI Mobility Radeon X2300]
+	718a  ATI Mobility Radeon X2300
+	718c  M62CSP64 [ATI Mobility Radeon X1350]
+	718d  M64CSP128 [ATI Mobility Radeon X1450]
+	7193  RV516 [Radeon X1550 Series]
+	719b  FireMV 2250
+	719f  RV516LE [Radeon X1550 64-bit]
+	71a0  RV516 [ATI Radeon X1300/X1550 Series Secondary]
 	71a1  RV516 XT Radeon X1600 Series Secondary
+	71a3  RV516 [ATI Radeon X1300 Pro Secondary]
+	71a7  RV516 [ATI Radeon X1300/X1550 Series Secondary]
+	71bb  FireMV 2250 Secondary
 	71c0  RV530 [Radeon X1600]
 	71c2  RV530 [Radeon X1600]
 	71c4  M56GL [ATI Mobility FireGL V5200]
 		17aa 2007  ThinkPad T60p
 	71c5  M56P [Radeon Mobility X1600]
 	71c6  RV530LE [Radeon X1600]
+	71c7  RV535 [Radeon X1650 Series]
 	71ce  RV530LE [Radeon X1600]
 	71d5  M66-P ATI Mobility Radeon X1700
 	71d6  M66-XT ATI Mobility Radeon X1700
 	71de  RV530LE [Radeon X1600]
 	71e0  RV530 [Radeon X1600] (Secondary)
 	71e2  RV530 [Radeon X1600] (Secondary)
+	71e7  RV535 [Radeon X1650 Series]
+	7210  M71 [ATI Mobility Radeon X2100]
+	7211  M71 [ATI Mobility Radeon X2100 Secondary]
 	7240  R580 [Radeon X1900]
 	7241  R580 [Radeon X1900]
 	7242  R580 [Radeon X1900]
@@ -1098,15 +1189,29 @@
 	7249  R580 [Radeon X1900 XT] Primary
 	724a  R580 [Radeon X1900]
 	724b  R580 [Radeon X1900]
+		1002 0b12  Radeon X1900 Primary Display Device
+		1002 0b13  Radeon X1900 Secondary Display Device
 	724c  R580 [Radeon X1900]
 	724d  R580 [Radeon X1900]
-	724e  R580 [FireGL V7300/V7350] Primary (PCIE)
+	724e  R580 [AMD Stream Processor]
 	7269  R580 [Radeon X1900 XT] Secondary
-	726e  R580 [FireGL V7300/V7350] Secondary (PCIE)
+	726b  R580 [Radeon X1900]
+	726e  R580 [AMD Stream Processor Secondary]
+	7280  ATI Radeon X1950 Pro Primary (PCIE)
+	7288  ATI Radeon X1950 GT
+	7291  ATI Radeon X1650 XT Primary (PCIE)
+	7293  Radeon X1650 Series
+	72a0  ATI Radeon X1950 Pro Secondary (PCIE)
+	72a8  ATI Radeon X1950 GT Secondary
+	72b1  ATI Radeon X1650 XT Secondary (PCIE)
+	72b3  ATI Radeon X1650 Series Secondary
 	7833  Radeon 9100 IGP Host Bridge
 	7834  Radeon 9100 PRO IGP
 	7835  Radeon Mobility 9200 IGP
 	7838  Radeon 9100 IGP PCI/AGP Bridge
+	791e  ATI Radeon Xpress 1200 Series
+	791f  ATI Radeon Xpress 1200 Series
+	793f  ATI Radeon Xpress 1200 Series Secondary
 	7c37  RV350 AQ [Radeon 9600 SE]
 	cab0  AGP Bridge [IGP 320M]
 	cab2  RS200/RS200M AGP Bridge [IGP 340M]
@@ -1556,6 +1661,8 @@
 	2003  Am 1771 MBW [Alchemy]
 	2020  53c974 [PCscsi]
 	2040  79c974
+# CS5536 [Geode companion] Host Bridge
+	2080  Conrad Kostecki
 	2081  Geode LX Video
 	2082  Geode LX AES Security Block
 	208f  CS5536 GeodeLink PCI South Bridge
@@ -1742,13 +1849,21 @@
 		1028 0001  PowerEdge 2400
 	0002  PowerEdge Expandable RAID Controller 3/Di
 		1028 0002  PowerEdge 4400
+		1028 00d1  PERC 3/DiV [Viper]
+		1028 00d9  PERC 3/DiL [Lexus]
 	0003  PowerEdge Expandable RAID Controller 3/Si
 		1028 0003  PowerEdge 2450
+# PowerEdge Codename Iguana
+	0004  PowerEdge Expandable RAID Controller 3/Di [Iguana]
+		1028 0004  PERC 3/DiF [Iguana]
 	0006  PowerEdge Expandable RAID Controller 3/Di
 	0007  Remote Access Card III
 	0008  Remote Access Card III
 	0009  Remote Access Card III: BMC/SMIC device not present
 	000a  PowerEdge Expandable RAID Controller 3/Di
+		1028 0106  PERC 3/DiJ [Jaguar]
+		1028 011b  PERC 3/DiD [Dagger]
+		1028 0121  PERC 3/DiB [Boxster]
 	000c  Embedded Remote Access or ERA/O
 	000d  Embedded Remote Access: BMC/SMIC device
 	000e  PowerEdge Expandable RAID controller 4/Di
@@ -1764,6 +1879,9 @@
 		1028 0170  PowerEdge Expandable RAID Controller 4e/Di
 	0014  Remote Access Card 4 Daughter Card SMIC interface
 	0015  PowerEdge Expandable RAID controller 5i
+		1028 1f01  PERC 5/E Adapter RAID Controller
+		1028 1f02  PERC 5/i Adapter RAID Controller
+	1f03  PERC 5/i
 1029  Siemens Nixdorf IS
 102a  LSI Logic
 	0000  HYDRA
@@ -1964,6 +2082,7 @@
 		102f 00f8  ATM Meteor 155
 	0030  TC35815CF PCI 10/100 Mbit Ethernet Controller
 	0031  TC35815CF PCI 10/100 Mbit Ethernet Controller with WOL
+	0032  TC35815CF PCI 10/100 Mbit Ethernet Controller on TX4939
 	0105  TC86C001 [goku-s] IDE
 	0106  TC86C001 [goku-s] USB 1.1 Host
 	0107  TC86C001 [goku-s] USB Device Controller
@@ -2107,6 +2226,7 @@
 		1019 0a14  K7S5A motherboard
 		1039 0900  SiS900 10/100 Ethernet Adapter
 		1043 8035  CUSI-FX motherboard
+		1462 0900  MS-6701 motherboard
 	0961  SiS961 [MuTIOL Media IO]
 	0962  SiS962 [MuTIOL Media IO]
 	0963  SiS963 [MuTIOL Media IO]
@@ -2129,6 +2249,7 @@
 		1019 0970  P6STP-FL motherboard
 		1039 5513  SiS5513 EIDE Controller (A,B step)
 		1043 8035  CUSI-FX motherboard
+		1462 7010  MS-6701 motherboard
 	5517  5517
 	5571  5571
 	5581  5581 Pentium Chipset
@@ -2161,10 +2282,14 @@
 		1019 0a14  K7S5A motherboard
 		1039 7000  Onboard USB Controller
 		1462 5470  K7SOM+ 5.2C Motherboard
+		1462 7010  MS-6701 motherboard
 	7002  USB 2.0 Controller
+		1462 7010  MS-6701 motherboard
 		1509 7002  Onboard USB Controller
 	7007  FireWire Controller
+		1462 701d  MS-6701
 	7012  AC'97 Sound Controller
+		1462 7010  MS-6701 motherboard
 		15bd 1001  DFI 661FX motherboard
 # There are may be different modem codecs here (Intel537 compatible and incompatible)
 	7013  AC'97 Modem Controller
@@ -2252,10 +2377,13 @@
 	12ee  PCI-X 2.0 Local Bus Adapter
 	12f8  Broadcom BCM4306 802.11b/g Wireless LAN
 	12fa  BCM4306 802.11b/g Wireless LAN Controller
+	1302  RMP-3 Shared Memory Driver
+	1303  RMP-3 (Remote Management Processor)
 	2910  E2910A PCIBus Exerciser
 	2925  E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer
 	3080  Pavilion ze2028ea
 	3085  Realtek RTL8139/8139C/8139C+
+	30b5  Compaq Presario V3000Z
 	3220  Smart Array P600
 		103c 3225  3 Gb/s SAS RAID
 	3230  Smart Array Controller
@@ -2292,8 +2420,10 @@
 	80c5  nForce3 chipset motherboard [SK8N]
 	80df  v9520 Magic/T
 	815a  A8N-SLI Motherboard nForce4 SATA
+	8168  Realtek PCI-E Gigabit Ethernet Controller (RTL8111B)
 	8187  802.11a/b/g Wireless LAN Card
 	8188  Tiger Hybrid TV Capture Device
+	81f4  EN7300TC512/TD/128M/A(C262G) [Graphics Card EN7300TC512]
 1044  Adaptec (formerly DPT)
 	1012  Domino RAID Engine
 	a400  SmartCache/Raid I-IV Controller
@@ -2444,6 +2574,7 @@
 	8023  TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link)
 		103c 088c  NC8000 laptop
 		1043 808b  K8N4-E Mainboard
+		1043 815b  P5W DH Deluxe Motherboard
 	8024  TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link)
 	8025  TSB82AA2 IEEE-1394b Link Layer Controller
 		1458 1000  GA-K8N Ultra-9 Mainboard
@@ -2483,14 +2614,17 @@
 	8038  PCI6515 SmartCard Controller
 	8039  PCIxx12 Cardbus Controller
 		103c 309f  nx9420
+		103c 30a1  NC2400
 	803a  PCIxx12 OHCI Compliant IEEE 1394 Host Controller
 		103c 309f  nx9420
+		103c 30a1  NC2400
 	803b  5-in-1 Multimedia Card Reader (SD/MMC/MS/MS PRO/xD)
 		103c 309f  nx9420
 	803c  PCIxx12 SDA Standard Compliant SD Host Controller
 		103c 309f  nx9420
 	803d  PCIxx12 GemCore based SmartCard controller
 		103c 309f  nx9420
+		103c 30a1  NC2400
 	8201  PCI1620 Firmware Loading Function
 	8204  PCI7410,7510,7610 PCI Firmware Loading Function
 		1028 0139  Latitude D400
@@ -2548,6 +2682,7 @@
 	ac42  PCI4451 PC card Cardbus Controller
 		1028 00e6  PCI4451 PC card CardBus Controller (Inspiron 8100)
 	ac44  PCI4510 PC card Cardbus Controller
+		1028 0149  Inspiron 5100
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
 		1071 8160  MIM2000
@@ -2560,7 +2695,7 @@
 		1028 0139  Latitude D400
 		1028 014e  Latitude D800
 	ac50  PCI1410 PC card Cardbus Controller
-	ac51  PCI1420
+	ac51  PCI1420 PC card Cardbus Controller
 		0e11 004e  Evo N600c
 		1014 0148  ThinkPad A20m
 		1014 023b  ThinkPad T23 (2647-4MG)
@@ -2588,6 +2723,7 @@
 	ac8d  PCI 7620
 	ac8e  PCI7420 CardBus Controller
 	ac8f  PCI7420/7620 Combo CardBus, 1394a-2000 OHCI and SD/MS-Pro Controller
+		1028 018d  Inspiron 700m
 	fe00  FireWire Host Controller
 	fe03  12C01A FireWire Host Controller
 104d  Sony Corporation
@@ -2673,6 +2809,7 @@
 		ecc0 0072  Mona rev.2
 	18c0  MPC8265A/8266/8272
 	18c1  MPC8271/MPC8272
+	3052  SM56 Data Fax Modem
 	3055  SM56 Data Fax Modem
 	3410  DSP56361 Digital Signal Processor
 		ecc0 0050  Gina24 rev.0
@@ -2721,6 +2858,7 @@
 1059  Teknor Industrial Computers Inc
 105a  Promise Technology, Inc.
 	0d30  PDC20265 (FastTrak100 Lite/Ultra100)
+		1043 8042  ASUS AV7266-E South Bridge Promise RAID
 		105a 4d33  Ultra100
 	0d38  20263
 		105a 4d39  Fasttrak66
@@ -2749,6 +2887,7 @@
 	4d30  PDC20267 (FastTrak100/Ultra100)
 		105a 4d33  Ultra100
 		105a 4d39  FastTrak100
+		8086 5744  S845WD1-E mainboard
 	4d33  20246
 		105a 4d33  20246 IDE Controller
 	4d38  PDC20262 (FastTrak66/Ultra66)
@@ -2777,7 +2916,12 @@
 	7275  PDC20277 (SBFastTrak133 Lite)
 	8002  SATAII150 SX8
 	8350  80333 [SuperTrak EX8350/EX16350], 80331 [SuperTrak EX8300/EX16300]
+	8650  IOP1348 [SuperTrak EX4650/EX8650/EX8654]
+		105a 4600  SuperTrak EX4650
+		105a 8601  SuperTrak EX8650
+		105a 8602  SuperTrak EX8654
 	c350  80333 [SuperTrak EX12350]
+	e350  80333 [SuperTrak EX24350]
 105b  Foxconn International, Inc.
 105c  Wipro Infotech Limited
 105d  Number 9 Computer Company
@@ -2990,6 +3134,7 @@
 	0012  YMF-754 [DS-1E Audio Controller]
 		1073 0012  DS-XG PCI Audio Codec
 	0020  DS-1 Audio
+	1000  SW1000XG [XG Factory]
 	2000  DS2416 Digital Mixing Card
 		1073 2000  DS2416 Digital Mixing Card
 1074  NexGen Microsystems
@@ -3021,7 +3166,7 @@
 		103c 12dd  4Gb Fibre Channel [AB429A]
 	2432  ISP2432-based 4Gb Fibre Channel to PCI Express HBA
 	3022  ISP4022-based Ethernet NIC
-	3032  ISP4032-based Ethernet NIC
+	3032  ISP4032-based Ethernet IPv6 NIC
 	4010  ISP4010-based iSCSI TOE HBA
 	4022  ISP4022-based iSCSI TOE HBA
 	4032  ISP4032-based iSCSI TOE IPv6 HBA
@@ -3329,6 +3474,7 @@
 		13e9 0070  Win/TV (Audio Section)
 		144f 3000  MagicTView CPH060 - Audio
 		1461 0002  Avermedia PCTV98 Audio Capture
+		1461 0003  UltraTV PCI 350
 		1461 0004  AVerTV WDM Audio Capture
 		1461 0761  AVerTV DVB-T
 		1461 0771  AverMedia AVerTV DVB-T 771
@@ -3417,6 +3563,8 @@
 	4002  TIO-CE PCI Express Port
 	8001  O2 1394
 	8002  G-net NT
+	8010  Broadcom e-net [SGI IO9/IO10 BaseIO]
+	8018  Broadcom e-net [SGI A330 Server BaseIO]
 10aa  ACC Microelectronics
 	0000  ACCM 2188
 10ab  Digicom
@@ -3468,6 +3616,7 @@
 		10b5 2978  SH ARC-PCIu SOHARD ARCNET card
 		10b5 3025  Alpermann+Velte PCL PCI L (3V/5V): Timecode Reader Board
 		10b5 3068  Alpermann+Velte PCL PCI HD (3V/5V): Timecode Reader Board
+		12fe 0111  CPCI-ASIO4 (ESD 4-port Serial Interface Board)
 		1397 3136  4xS0-ISDN PCI Adapter
 		1397 3137  S2M-E1-ISDN PCI Adapter
 		1518 0200  Kontron ThinkIO-C
@@ -3522,6 +3671,7 @@
 		10b5 2844  Innes Corp TVS Encoder card
 		12c7 4001  Intel Dialogic DM/V960-4T1 PCI
 		12d9 0002  PCI Prosody Card rev 1.5
+		14b4 d100  Dektec DTA-100
 		16df 0011  PIKA PrimeNet MM PCI
 		16df 0012  PIKA PrimeNet MM cPCI 8
 		16df 0013  PIKA PrimeNet MM cPCI 8 (without CAS Signaling)
@@ -6060,6 +6210,7 @@
 	0140  HT2100 PCI-Express Bridge
 	0141  HT2100 PCI-Express Bridge
 	0142  HT2100 PCI-Express Bridge
+	0144  HT2100 PCI-Express Bridge
 	0200  OSB4 South Bridge
 	0201  CSB5 South Bridge
 		4c53 1080  CT8 mainboard
@@ -10413,9 +10564,9 @@
 	0962  80960RM [i960RM Bridge]
 	0964  80960RP [i960 RP Microprocessor/Bridge]
 	1000  82542 Gigabit Ethernet Controller
-		0e11 b0df  NC1632 Gigabit Ethernet Adapter (1000-SX)
-		0e11 b0e0  NC1633 Gigabit Ethernet Adapter (1000-LX)
-		0e11 b123  NC1634 Gigabit Ethernet Adapter (1000-SX)
+		0e11 b0df  NC6132 Gigabit Ethernet Adapter (1000-SX)
+		0e11 b0e0  NC6133 Gigabit Ethernet Adapter (1000-LX)
+		0e11 b123  NC6134 Gigabit Ethernet Adapter (1000-LX)
 		1014 0119  Netfinity Gigabit Ethernet SX Adapter
 		8086 1000  PRO/1000 Gigabit Server Adapter
 	1001  82543GC Gigabit Ethernet Controller (Fiber)
@@ -10834,6 +10985,8 @@
 		8086 0006  82557 10/100 with Wake on LAN
 		8086 0007  82558 10/100 Adapter
 		8086 0008  82558 10/100 with Wake on LAN
+# 8086:0009 revision 5, 82558B based
+		8086 0009  PRO/100+ PCI (TP)
 		8086 000a  EtherExpress PRO/100+ Management Adapter
 		8086 000b  EtherExpress PRO/100+
 		8086 000c  EtherExpress PRO/100+ Management Adapter
@@ -10909,6 +11062,7 @@
 		8086 3010  EtherExpress PRO/100 S Network Connection
 		8086 3011  EtherExpress PRO/100 S Network Connection
 		8086 3012  EtherExpress PRO/100 Network Connection
+		8086 301a  S845WD1-E mainboard
 		8086 3411  SDS2 Mainboard
 	122d  430FX - 82437FX TSC [Triton I]
 	122e  82371FB PIIX ISA [Triton I]
@@ -10996,6 +11150,7 @@
 	2426  82801AB AC'97 Modem
 	2428  82801AB PCI Bridge
 	2440  82801BA ISA Bridge (LPC)
+		8086 5744  S845WD1-E
 	2442  82801BA/BAM USB (Hub #1)
 		1014 01c6  Netvista A40/A40p
 		1025 1016  Travelmate 612 TX
@@ -11006,6 +11161,7 @@
 		147b 0507  TH7II-RAID
 		8086 4532  D815EEA2 mainboard
 		8086 4557  D815EGEW Mainboard
+		8086 5744  S845WD1-E mainboard
 	2443  82801BA/BAM SMBus
 		1014 01c6  Netvista A40/A40p
 		1025 1016  Travelmate 612 TX
@@ -11016,6 +11172,7 @@
 		147b 0507  TH7II-RAID
 		8086 4532  D815EEA2 mainboard
 		8086 4557  D815EGEW Mainboard
+		8086 5744  S845WD1-E mainboard
 	2444  82801BA/BAM USB (Hub #2)
 		1025 1016  Travelmate 612 TX
 		1028 00c7  Dimension 8100
@@ -11024,6 +11181,7 @@
 		104d 80df  Vaio PCG-FX403
 		147b 0507  TH7II-RAID
 		8086 4532  D815EEA2 mainboard
+		8086 5744  S845WD1-E mainboard
 	2445  82801BA/BAM AC'97 Audio
 		0e11 000b  Compaq Deskpro EN Audio
 		0e11 0088  Evo D500
@@ -11082,6 +11240,7 @@
 		147b 0507  TH7II-RAID
 		8086 4532  D815EEA2 mainboard
 		8086 4557  D815EGEW Mainboard
+		8086 5744  S845WD1-E mainboard
 	244c  82801BAM ISA Bridge (LPC)
 	244e  82801 PCI Bridge
 		1014 0267  NetVista A30p
@@ -11174,6 +11333,7 @@
 		103c 0890  NC6000 laptop
 		103c 08b0  tc1100 tablet
 		1071 8160  MIM2000
+		144d c00c  P30/P35 notebook
 		1458 24c2  GA-8PE667 Ultra
 		1462 5800  845PE Max (MS-6580)
 		1734 1004  D1451 Mainboard (SCENIC N300, i845GV)
@@ -11742,17 +11902,21 @@
 		103c 099c  NX6110/NC6120
 		1043 1881  GMA 900 915GM Integrated Graphics
 	27a0  Mobile 945GM/PM/GMS/940GML and 945GT Express Memory Controller Hub
+		103c 30a1  NC2400
 		17aa 2017  Thinkpad R60e model 0657
 	27a1  Mobile 945GM/PM/GMS/940GML and 945GT Express PCI Express Root Port
 	27a2  Mobile 945GM/GMS/940GML Express Integrated Graphics Controller
+		103c 30a1  NC2400
 		17aa 201a  Thinkpad R60e model 0657
 	27a6  Mobile 945GM/GMS/940GML Express Integrated Graphics Controller
+		103c 30a1  NC2400
 		17aa 201a  Thinkpad R60e model 0657
 	27b0  82801GH (ICH7DH) LPC Interface Bridge
 	27b8  82801GB/GR (ICH7 Family) LPC Interface Bridge
 		107b 5048  E4500
 		8086 544e  DeskTop Board D945GTP
 	27b9  82801GBM (ICH7-M) LPC Interface Bridge
+		103c 30a1  NC2400
 		10f7 8338  Panasonic CF-Y5 laptop
 		17aa 2009  ThinkPad T60/R60 series
 	27bd  82801GHM (ICH7-M DH) LPC Interface Bridge
@@ -11766,22 +11930,27 @@
 		17aa 200d  Thinkpad R60e model 0657
 	27c6  82801GHM (ICH7-M DH) Serial ATA Storage Controller RAID
 	27c8  82801G (ICH7 Family) USB UHCI #1
+		103c 30a1  NC2400
 		107b 5048  E4500
 		17aa 200a  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27c9  82801G (ICH7 Family) USB UHCI #2
+		103c 30a1  NC2400
 		107b 5048  E4500
 		17aa 200a  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27ca  82801G (ICH7 Family) USB UHCI #3
+		103c 30a1  NC2400
 		107b 5048  E4500
 		17aa 200a  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27cb  82801G (ICH7 Family) USB UHCI #4
+		103c 30a1  NC2400
 		107b 5048  E4500
 		17aa 200a  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27cc  82801G (ICH7 Family) USB2 EHCI Controller
+		103c 30a1  NC2400
 		17aa 200b  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27d0  82801G (ICH7 Family) PCI Express Port 1
@@ -11789,10 +11958,12 @@
 	27d4  82801G (ICH7 Family) PCI Express Port 3
 	27d6  82801G (ICH7 Family) PCI Express Port 4
 	27d8  82801G (ICH7 Family) High Definition Audio Controller
+		103c 30a1  NC2400
 		107b 5048  E4500
 		10f7 8338  Panasonic CF-Y5 laptop
 		1179 ff31  Toshiba America Information Systems:AC97 Data Fax SoftModem with SmartCP
 		152d 0753  Softmodem
+		1734 10ad  Conexant softmodem SmartCP
 		17aa 2010  ThinkPad T60/R60 series
 	27da  82801G (ICH7 Family) SMBus Controller
 		10f7 8338  Panasonic CF-Y5 laptop
@@ -11803,6 +11974,7 @@
 	27dd  82801G (ICH7 Family) AC'97 Modem Controller
 	27de  82801G (ICH7 Family) AC'97 Audio Controller
 	27df  82801G (ICH7 Family) IDE Controller
+		103c 30a1  NC2400
 		107b 5048  E4500
 		10f7 8338  Panasonic CF-Y5 laptop
 		17aa 200c  Thinkpad R60e model 0657
@@ -11846,6 +12018,34 @@
 	284b  82801H (ICH8 Family) HD Audio Controller
 	284f  82801H (ICH8 Family) Thermal Reporting Device
 	2850  Mobile IDE Controller
+	2910  LPC Interface Controller
+	2920  4 port SATA IDE Controller
+	2921  2 port SATA IDE Controller
+	2922  6 port SATA AHCI Controller
+	2923  4 port SATA AHCI Controller
+	2925  SATA RAID Controller
+	2926  2 port SATA IDE Controller
+	2928  Mobile 2 port SATA IDE Controller
+	292d  Mobile 2 port SATA IDE Controller
+	292e  Mobile 1 port SATA IDE Controller
+	2930  SMBus Controller
+	2932  Thermal Subsystem
+	2934  USB UHCI Controller #1
+	2935  USB UHCI Controller #2
+	2936  USB UHCI Controller #3
+	2937  USB UHCI Controller #4
+	2938  USB UHCI Controller #5
+	2939  USB UHCI Controller #6
+	293a  USB2 EHCI Controller #1
+	293c  USB2 EHCI Controller #2
+	293e  HD Audio Controller
+	2940  PCI Express Port 1
+	2942  PCI Express Port 2
+	2944  PCI Express Port 3
+	2946  PCI Express Port 4
+	2948  PCI Express Port 5
+	294a  PCI Express Port 6
+	294c  Gigabit Ethernet Controller
 	2970  82946GZ/PL/GL Memory Controller Hub
 	2971  82946GZ/PL/GL PCI Express Root Port
 	2972  82946GZ/GL Integrated Graphics Controller
@@ -11873,6 +12073,37 @@
 	29a5  82P965/G965 HECI Controller
 	29a6  82P965/G965 PT IDER Controller
 	29a7  82P965/G965 KT Controller
+	29b0  DRAM Controller
+	29b1  PCI Express Root Port
+	29b2  Integrated Graphics Controller
+	29b3  Integrated Graphics Controller
+	29b4  HECI Controller
+	29b5  HECI Controller
+	29b6  PT IDER Controller
+	29b7  Serial KT Controller
+	29c0  DRAM Controller
+	29c1  PCI Express Root Port
+	29c2  Integrated Graphics Controller
+	29c3  Integrated Graphics Controller
+	29c4  HECI Controller
+	29c5  HECI Controller
+	29c6  PT IDER Controller
+	29c7  Serial KT Controller
+	29cf  Virtual HECI Controller
+	29e0  DRAM Controller
+	29e1  Host-Primary PCI Express Bridge
+	29e4  HECI Controller
+	29e5  HECI Controller
+	29e6  PT IDER Controller
+	29e7  Serial KT Controller
+	29e9  Host-Secondary PCI Express Bridge
+	29f0  Server DRAM Controller
+	29f1  Server Host-Primary PCI Express Bridge
+	29f4  Server HECI Controller
+	29f5  Server HECI Controller
+	29f6  Server PT IDER Controller
+	29f7  Server Serial KT Controller
+	29f9  Server Host-Secondary PCI Express Bridge
 	2a00  Mobile Memory Controller Hub
 	2a01  Mobile PCI Express Root Port
 	2a02  Mobile Integrated Graphics Controller
@@ -11978,7 +12209,42 @@
 	35b6  3100 Chipset PCI Express Port A
 	35b7  3100 Chipset PCI Express Port A1
 	35c8  3100 Extended Configuration Test Overflow Registers
+	3600  Server Memory Controller Hub
+	3604  Server PCI Express Port 1
+	3605  Server PCI Express Port 2
+	3606  Server PCI Express Port 3
+	3607  Server PCI Express Port 4
+	3608  Server PCI Express Port 5
+	3609  Server PCI Express Port 6
+	360a  Server PCI Express Port 7
+	360b  Server IOAT DMA Controller
+	360c  Server FSB Registers
+	360d  Server Snoop Filter Registers
+	360e  Server Reserved Registers
+	360f  Server FBD Branch 0 Registers
+	3610  Server FBD Branch 1 Registers
+	4000  Memory Controller Hub
+	4008  Memory Controller Hub
+	4010  Memory Controller Hub
+	4021  PCI Express Port 1
+	4022  PCI Express Port 2
+	4023  PCI Express Port 3
+	4024  PCI Express Port 4
+	4025  PCI Express Port 5
+	4026  PCI Express Port 6
+	4027  PCI Express Port 7
+	4028  PCI Express Port 8
+	4029  PCI Express Port 9
+	402d  IBIST Registers
+	402e  IBIST Registers
+	402f  DMA/DCA Engine
+	4030  FSB Registers
+	4032  I/OxAPIC
+	4035  FBD Registers
+	4036  FBD Registers
 	4220  PRO/Wireless 2200BG Network Connection
+		2731 8086  WLAN-Adapter
+		8086 2731  Samsung P35 integrated WLAN
 	4222  PRO/Wireless 3945ABG Network Connection
 		8086 1005  PRO/Wireless 3945BG Network Connection
 		8086 1034  PRO/Wireless 3945BG Network Connection
@@ -11994,6 +12260,23 @@
 	5201  EtherExpress PRO/100 Intelligent Server
 		8086 0001  EtherExpress PRO/100 Server Ethernet Adapter
 	530d  80310 IOP [IO Processor]
+	65c0  Memory Controller Hub
+	65e2  PCI Express x4 Port 2
+	65e3  PCI Express x4 Port 3
+	65e4  PCI Express x4 Port 4
+	65e5  PCI Express x4 Port 5
+	65e6  PCI Express x4 Port 6
+	65e7  PCI Express x4 Port 7
+	65f0  FSB Registers
+	65f1  Reserved Registers
+	65f3  Reserved Registers
+	65f5  DDR Channel 0 Registers
+	65f6  DDR Channel 1 Registers
+	65f7  PCI Express x8 Port 2-3
+	65f8  PCI Express x8 Port 4-5
+	65f9  PCI Express x8 Port 6-7
+	65fa  PCI Express x16 Port 4-7
+	65ff  DMA Engine
 	7000  82371SB PIIX3 ISA [Natoma/Triton II]
 	7010  82371SB PIIX3 IDE [Natoma/Triton II]
 	7020  82371SB PIIX3 USB [Natoma/Triton II]
@@ -12092,6 +12375,7 @@
 	9622  Integrated RAID
 	9641  Integrated RAID
 	96a1  Integrated RAID
+	a620  6400/6402 Advanced Memory Buffer (AMB)
 	b152  21152 PCI-to-PCI Bridge
 # observed, and documented in Intel revision note; new mask of 1011:0026
 	b154  21154 PCI-to-PCI Bridge
diff --git a/hw/xfree86/scanpci/xf86PciStdIds.h b/hw/xfree86/scanpci/xf86PciStdIds.h
index 0cf8d4e55..d2784f5d9 100644
--- a/hw/xfree86/scanpci/xf86PciStdIds.h
+++ b/hw/xfree86/scanpci/xf86PciStdIds.h
@@ -30,6 +30,10 @@ static const char pci_vendor_0000[] = "Gammagraphx, Inc.";
 static const char pci_vendor_001a[] = "Ascend Communications, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_001c[] = "PEAK-System Technik GmbH";
+static const char pci_device_001c_0001[] = "PCAN-PCI CAN-Bus controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0033[] = "Paradyne corp.";
 #endif
 static const char pci_vendor_003d[] = "Lockheed Martin-Marietta Corp";
@@ -38,6 +42,21 @@ static const char pci_vendor_0059[] = "Tiger Jet Network Inc. (Wrong ID)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0070[] = "Hauppauge computer works Inc.";
+static const char pci_device_0070_0003[] = "WinTV PVR-250";
+static const char pci_device_0070_0009[] = "WinTV PVR-150";
+static const char pci_device_0070_0801[] = "WinTV PVR-150";
+static const char pci_device_0070_0807[] = "WinTV PVR-150";
+static const char pci_device_0070_4000[] = "WinTV PVR-350";
+static const char pci_device_0070_4001[] = "WinTV PVR-250 (v1)";
+static const char pci_device_0070_4009[] = "WinTV PVR-250";
+static const char pci_device_0070_4800[] = "WinTV PVR-350";
+static const char pci_device_0070_4801[] = "WinTV PVR-250 MCE";
+static const char pci_device_0070_4803[] = "WinTV PVR-250";
+static const char pci_device_0070_8003[] = "WinTV PVR-150";
+static const char pci_device_0070_8801[] = "WinTV PVR-150";
+static const char pci_device_0070_c801[] = "WinTV PVR-150";
+static const char pci_device_0070_e807[] = "WinTV PVR-500 MCE (1st tuner)";
+static const char pci_device_0070_e817[] = "WinTV PVR-500 MCE (2nd tuner)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0071[] = "Nebula Electronics Ltd.";
@@ -85,6 +104,9 @@ static const char pci_vendor_0357[] = "TTTech AG";
 static const char pci_device_0357_000a[] = "TTP-Monitoring Card V2.0";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0403[] = "Future Technology Devices International Ltd";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0432[] = "SCM Microsystems, Inc.";
 static const char pci_device_0432_0001[] = "Pluto2 DVB-T Receiver for PCMCIA [EasyWatch MobilSet]";
 #endif
@@ -105,6 +127,7 @@ static const char pci_vendor_050d[] = "Belkin";
 static const char pci_device_050d_001a[] = "FSD7000 802.11g PCI Wireless card";
 static const char pci_device_050d_0109[] = "F5U409-CU USB/Serial Portable Adapter";
 static const char pci_device_050d_7050[] = "F5D7050 802.11g Wireless USB Adapter";
+static const char pci_device_050d_705c[] = "F5D7050 v4";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_05a9[] = "OmniVision";
@@ -132,16 +155,35 @@ static const char pci_device_067b_2303[] = "PL-2303 USB-to-Serial Converter";
 static const char pci_device_067b_3507[] = "PL-3507 Hi-Speed USB & IEEE 1394 Combo to IDE Bridge Controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_069d[] = "Hughes Network Systems (HNS)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0721[] = "Sapphire, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_07ca[] = "AVerMedia Technologies Inc.";
+static const char pci_device_07ca_b808[] = "AVerTV DVB-T Volar (USB 2.0)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_07e2[] = "ELMEG Communication Systems GmbH";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0842[] = "NPG, Personal Grand Technology";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_08ff[] = "AuthenTec";
+static const char pci_device_08ff_afe4[] = "[Anchor] AF-S2 FingerLoc Sensor Module";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0925[] = "VIA Technologies, Inc. (Wrong ID)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_093a[] = "PixArt Imaging Inc.";
+static const char pci_device_093a_010e[] = "Innovage Mini Digital Camera";
+static const char pci_device_093a_010f[] = "SDC-300 Webcam";
+static const char pci_device_093a_2468[] = "CIF Single Chip";
+static const char pci_device_093a_2603[] = "Philips Webcam SPC500NC";
+static const char pci_device_093a_2608[] = "Maxell MaxCam RotaWeb";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_09c1[] = "Arris";
@@ -151,15 +193,25 @@ static const char pci_device_09c1_0704[] = "CM 200E Cable Modem";
 static const char pci_vendor_0a89[] = "BREA Technologies Inc";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0ace[] = "ZyDAS";
+static const char pci_device_0ace_1211[] = "ZD1211 IEEE 802.11b+g USB Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0b0b[] = "Rhino Equiment Corp.";
 static const char pci_device_0b0b_0105[] = "Rhino R1T1";
 static const char pci_device_0b0b_0205[] = "Rhino R4FXO";
+static const char pci_device_0b0b_0206[] = "RCB4FXO 4-channel FXO analog telphony card";
 static const char pci_device_0b0b_0305[] = "Rhino R4T1";
 static const char pci_device_0b0b_0405[] = "Rhino R8FXX";
+static const char pci_device_0b0b_0406[] = "RCB8FXX 8-channel modular analog telphony card";
 static const char pci_device_0b0b_0505[] = "Rhino R24FXX";
-static const char pci_device_0b0b_0506[] = "Rhino R2T1";
+static const char pci_device_0b0b_0506[] = "RCB24FXS 24-Channel FXS analog telphony card";
 static const char pci_device_0b0b_0605[] = "Rhino R2T1";
 static const char pci_device_0b0b_0705[] = "Rhino R24FXS";
+static const char pci_device_0b0b_0706[] = "RCB24FXO 24-Channel FXO analog telphony card";
+static const char pci_device_0b0b_0905[] = "R1T3 Single T3 Digital Telephony Card";
+static const char pci_device_0b0b_0906[] = "RCB24FXX 24-channel modular analog telphony card";
+static const char pci_device_0b0b_0a06[] = "RCB672FXX 672-channel modular analog telphony card";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0b49[] = "ASCII Corporation";
@@ -524,12 +576,48 @@ static const char pci_subsys_1000_0040_1000_0066[] = "MegaRAID SCSI 320-2XRWS";
 static const char pci_device_1000_0041[] = "53C1035ZC PCI-X Fusion-MPT Dual Ultra320 SCSI";
 static const char pci_device_1000_0050[] = "SAS1064 PCI-X Fusion-MPT SAS";
 static const char pci_device_1000_0054[] = "SAS1068 PCI-X Fusion-MPT SAS";
+static const char pci_device_1000_0055[] = "SAS1068 PCI-X Fusion-MPT SAS";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0055_1033_8336[] = "SAS1068";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1000_0056[] = "SAS1064E PCI-Express Fusion-MPT SAS";
 static const char pci_device_1000_0058[] = "SAS1068E PCI-Express Fusion-MPT SAS";
 static const char pci_device_1000_005a[] = "SAS1066E PCI-Express Fusion-MPT SAS";
 static const char pci_device_1000_005c[] = "SAS1064A PCI-X Fusion-MPT SAS";
 static const char pci_device_1000_005e[] = "SAS1066 PCI-X Fusion-MPT SAS";
 static const char pci_device_1000_0060[] = "MegaRAID SAS 1078";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1006[] = "MegaRAID SAS 8888ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_100a[] = "MegaRAID SAS 8708ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_100e[] = "MegaRAID SAS 8884E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_100f[] = "MegaRAID SAS 8708E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1010[] = "MegaRAID SATA 350-8ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1011[] = "MegaRAID SATA 350-4ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1012[] = "MegaRAID SAS 8704ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1014_0363[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1014_0364[] = "SystemX MegaRAID SAS 8808E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1014_0365[] = "SystemX MegaRAID SAS 8884E";
+#endif
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_0060_1028_1f0a[] = "PERC 6/E Adapter RAID Controller";
@@ -547,7 +635,28 @@ static const char pci_subsys_1000_0060_1028_1f0c[] = "PERC 6/i Integrated RAID C
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1000_0060_1028_1f0d[] = "PERC 6/i Enhanced RAID Controller";
+static const char pci_subsys_1000_0060_1028_1f0d[] = "CERC 6/i Adapter RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1028_1f11[] = "CERC 6/i Adapter RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1043_824d[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1170_002f[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_8086_34cc[] = "Integrated RAID Controller SROMBSAS28E";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_8086_34cd[] = "Integrated RAID Controller SROMBSAS28E";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1000_0062[] = "SAS1078 PCI-Express Fusion-MPT SAS";
@@ -617,6 +726,21 @@ static const char pci_subsys_1000_0408_1028_0001[] = "PowerEdge RAID Controller
 static const char pci_subsys_1000_0408_1028_0002[] = "PowerEdge RAID Controller PERC4e/DC";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0408_1028_0012[] = "PowerEdge RAID Controller RAC4";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0408_1028_0015[] = "PowerEdge RAID Controller PERC5";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0408_1028_1f03[] = "PowerEdge RAID Controller PERC5";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_0408_1734_1065[] = "FSC MegaRAID PCI Express ROMB";
 #endif
@@ -661,6 +785,9 @@ static const char pci_subsys_1000_0411_1000_1003[] = "MegaRAID SAS 8344ELP";
 static const char pci_subsys_1000_0411_1000_1004[] = "MegaRAID SAS 8308ELP";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_1008[] = "MegaRAID SAS 84016E";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_0411_1000_100c[] = "MegaRAID SATA 300-12E";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -688,12 +815,12 @@ static const char pci_subsys_1000_0411_1734_10a3[] = "MegaRAID SAS PCI Express R
 #endif
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1000_0411_8086_1001[] = "SRCSAS18E RAID Controller";
+static const char pci_subsys_1000_0411_8086_1001[] = "RAID Controller SRCSAS18E";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1000_0411_8086_1003[] = "SRCSAS144E RAID Controller";
+static const char pci_subsys_1000_0411_8086_1003[] = "RAID Controller SRCSAS144E";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
@@ -1038,7 +1165,19 @@ static const char pci_subsys_1002_4378_103c_308b[] = "MX6125";
 #endif
 static const char pci_device_1002_4379[] = "ATI 4379 Serial ATA Controller";
 static const char pci_device_1002_437a[] = "ATI 437A Serial ATA Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437a_1002_4379[] = "ATI 4379 Serial ATA Controller";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437a_1002_437a[] = "ATI 437A Serial ATA Controller";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437a_14f1_8800[] = "Leadtek WinFast TV2000XP Expert";
+#endif
 static const char pci_device_1002_437b[] = "SB450 HDA Audio";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437b_1734_10b8[] = "Realtek High Definition Audio";
+#endif
 static const char pci_device_1002_4380[] = "SB600 Non-Raid-5 SATA";
 static const char pci_device_1002_4381[] = "SB600 Raid-5 SATA";
 static const char pci_device_1002_4382[] = "SB600 AC97 Audio";
@@ -1203,6 +1342,9 @@ static const char pci_subsys_1002_4752_8086_3411[] = "SDS2 Mainboard";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4752_8086_3427[] = "S875WP1-E mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4752_8086_5744[] = "S845WD1-E mainboard";
+#endif
 static const char pci_device_1002_4753[] = "Rage XC";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4753_1002_4753[] = "Rage XC";
@@ -1450,6 +1592,9 @@ static const char pci_subsys_1002_4e50_103c_088c[] = "NC8000 laptop";
 static const char pci_subsys_1002_4e50_103c_0890[] = "NC6000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4e50_144d_c00c[] = "P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4e50_1462_0311[] = "MSI M510A";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -1457,6 +1602,9 @@ static const char pci_subsys_1002_4e50_1734_1055[] = "Amilo M1420W";
 #endif
 static const char pci_device_1002_4e51[] = "M10 NQ [Radeon Mobility 9600]";
 static const char pci_device_1002_4e52[] = "RV350 [Mobility Radeon 9600 M10]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4e52_144d_c00c[] = "P35 notebook";
+#endif
 static const char pci_device_1002_4e53[] = "M10 NS [Radeon Mobility 9600]";
 static const char pci_device_1002_4e54[] = "M10 NT [FireGL Mobility T2]";
 static const char pci_device_1002_4e56[] = "M11 NV [FireGL Mobility T2e]";
@@ -1822,7 +1970,7 @@ static const char pci_device_1002_554b[] = "R423 UK [Radeon X800SE (PCIE)]";
 static const char pci_device_1002_554d[] = "R430 [Radeon X800 XL] (PCIe)";
 static const char pci_device_1002_554f[] = "R430 [Radeon X800 (PCIE)]";
 static const char pci_device_1002_5550[] = "R423 [Fire GL V7100]";
-static const char pci_device_1002_5551[] = "R423 UQ [FireGL V7200 (PCIE)]";
+static const char pci_device_1002_5551[] = "R423 [FireGL V5100 (PCIE)]";
 static const char pci_device_1002_5552[] = "R423 UR [FireGL V5100 (PCIE)]";
 static const char pci_device_1002_5554[] = "R423 UT [FireGL V7100 (PCIE)]";
 static const char pci_device_1002_5569[] = "R423 UI [Radeon X800PRO (PCIE)] Secondary";
@@ -1874,6 +2022,7 @@ static const char pci_subsys_1002_5950_1025_0080[] = "Aspire 5024WLMMi";
 static const char pci_subsys_1002_5950_103c_308b[] = "MX6125";
 #endif
 static const char pci_device_1002_5951[] = "ATI Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge";
+static const char pci_device_1002_5952[] = "RD580 [CrossFire Xpress 3200] Chipset Host Bridge";
 static const char pci_device_1002_5954[] = "RS480 [Radeon Xpress 200G Series]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5954_1002_5954[] = "RV370 [Radeon Xpress 200G Series]";
@@ -1917,6 +2066,9 @@ static const char pci_subsys_1002_5961_18bc_0053[] = "Radeon 9200 Game Buster VI
 static const char pci_device_1002_5962[] = "RV280 [Radeon 9200]";
 static const char pci_device_1002_5964[] = "RV280 [Radeon 9200 SE]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5964_1002_5964[] = "ATI Radeon 9200 SE, 64-bit 128MB DDR, 200/166MHz";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5964_1043_c006[] = "ASUS Radeon 9200 SE / TD / 128M";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -1948,10 +2100,11 @@ static const char pci_subsys_1002_5964_18bc_0173[] = "GC-R9200L(SE)-C3H [Radeon
 #endif
 static const char pci_device_1002_5969[] = "ES1000";
 static const char pci_device_1002_5974[] = "RS482 [Radeon Xpress 200]";
-static const char pci_device_1002_5975[] = "RS482 [Radeon Xpress 200M]";
+static const char pci_device_1002_5975[] = "RS485 [Radeon Xpress 1100 IGP]";
 static const char pci_device_1002_5a33[] = "Radeon Xpress 200 Host Bridge";
 static const char pci_device_1002_5a34[] = "RS480 PCI-X Root Port";
 static const char pci_device_1002_5a36[] = "RS480 PCI Bridge";
+static const char pci_device_1002_5a37[] = "RS480 PCI Bridge";
 static const char pci_device_1002_5a38[] = "RS480 PCI Bridge";
 static const char pci_device_1002_5a39[] = "RS480 PCI Bridge";
 static const char pci_device_1002_5a3f[] = "RS480 PCI Bridge";
@@ -1994,6 +2147,9 @@ static const char pci_device_1002_5c63[] = "M9+ 5C63 [Radeon Mobility 9200 (AGP)
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5c63_1002_5c63[] = "Apple iBook G4 2004";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5c63_144d_c00c[] = "P30 notebook";
+#endif
 static const char pci_device_1002_5d44[] = "RV280 [Radeon 9200 SE] (Secondary)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5d44_1458_4019[] = "Radeon 9200 SE (Secondary)";
@@ -2078,15 +2234,17 @@ static const char pci_subsys_1002_7129_1002_0323[] = "All-in-Wonder X1800XL (Sec
 static const char pci_subsys_1002_7129_1002_0d03[] = "Radeon X1800 CrossFire Edition (Secondary)";
 #endif
 static const char pci_device_1002_7140[] = "RV515 [Radeon X1600]";
-static const char pci_device_1002_7142[] = "RV515 [Radeon X1300]";
+static const char pci_device_1002_7142[] = "RV515 PRO [ATI Radeon X1300/X1550 Series]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7142_1002_0322[] = "All-in-Wonder 2006 PCI-E Edition";
 #endif
+static const char pci_device_1002_7143[] = "RV505 [Radeon X1550 Series]";
 static const char pci_device_1002_7145[] = "Radeon Mobility X1400";
 static const char pci_device_1002_7146[] = "RV515 [Radeon X1300]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7146_1002_0322[] = "All-in-Wonder 2006 PCI-E Edition";
 #endif
+static const char pci_device_1002_7147[] = "RV505 [Radeon X1550 64-bit]";
 static const char pci_device_1002_7149[] = "M52 [ATI Mobility Radeon X1300]";
 static const char pci_device_1002_714a[] = "M52 [ATI Mobility Radeon X1300]";
 static const char pci_device_1002_714b[] = "M52 [ATI Mobility Radeon X1300]";
@@ -2094,8 +2252,10 @@ static const char pci_device_1002_714c[] = "M52 [ATI Mobility Radeon X1300]";
 static const char pci_device_1002_714d[] = "RV515 [Radeon X1300]";
 static const char pci_device_1002_714e[] = "RV515 [Radeon X1300]";
 static const char pci_device_1002_7152[] = "RV515 GL ATI FireGL V3300 Primary";
+static const char pci_device_1002_7153[] = "RV515GL [FireGL V3350]";
 static const char pci_device_1002_715e[] = "RV515 [Radeon X1300]";
-static const char pci_device_1002_7162[] = "RV515 [Radeon X1300] (Secondary)";
+static const char pci_device_1002_715f[] = "RV505 CE [Radeon X1550 64-bit]";
+static const char pci_device_1002_7162[] = "RV515 PRO [ATI Radeon X1300/X1550 Series Secondary]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7162_1002_0323[] = "All-in-Wonder 2006 PCI-E Edition (Secondary)";
 #endif
@@ -2104,10 +2264,23 @@ static const char pci_device_1002_7166[] = "RV515 [Radeon X1300] (Secondary)";
 static const char pci_subsys_1002_7166_1002_0323[] = "All-in-Wonder 2006 PCI-E Edition (Secondary)";
 #endif
 static const char pci_device_1002_7172[] = "RV515 GL ATI FireGL V3300 Secondary";
-static const char pci_device_1002_7180[] = "RV516 Radeon X1300 Series Primary";
+static const char pci_device_1002_7173[] = "RV515GL [FireGL V3350 Secondary]";
+static const char pci_device_1002_7180[] = "RV516 [ATI Radeon X1300/X1550 Series]";
 static const char pci_device_1002_7181[] = "RV516 XT Radeon X1600 Series Primary";
-static const char pci_device_1002_71a0[] = "RV516 Radeon X1300 Series Secondary";
+static const char pci_device_1002_7183[] = "RV516 [ATI Radeon X1300/X1550 Series]";
+static const char pci_device_1002_7187[] = "RV516 [ATI Radeon X1300/X1550 Series]";
+static const char pci_device_1002_7188[] = "M64-S [ATI Mobility Radeon X2300]";
+static const char pci_device_1002_718a[] = "ATI Mobility Radeon X2300";
+static const char pci_device_1002_718c[] = "M62CSP64 [ATI Mobility Radeon X1350]";
+static const char pci_device_1002_718d[] = "M64CSP128 [ATI Mobility Radeon X1450]";
+static const char pci_device_1002_7193[] = "RV516 [Radeon X1550 Series]";
+static const char pci_device_1002_719b[] = "FireMV 2250";
+static const char pci_device_1002_719f[] = "RV516LE [Radeon X1550 64-bit]";
+static const char pci_device_1002_71a0[] = "RV516 [ATI Radeon X1300/X1550 Series Secondary]";
 static const char pci_device_1002_71a1[] = "RV516 XT Radeon X1600 Series Secondary";
+static const char pci_device_1002_71a3[] = "RV516 [ATI Radeon X1300 Pro Secondary]";
+static const char pci_device_1002_71a7[] = "RV516 [ATI Radeon X1300/X1550 Series Secondary]";
+static const char pci_device_1002_71bb[] = "FireMV 2250 Secondary";
 static const char pci_device_1002_71c0[] = "RV530 [Radeon X1600]";
 static const char pci_device_1002_71c2[] = "RV530 [Radeon X1600]";
 static const char pci_device_1002_71c4[] = "M56GL [ATI Mobility FireGL V5200]";
@@ -2116,12 +2289,16 @@ static const char pci_subsys_1002_71c4_17aa_2007[] = "ThinkPad T60p";
 #endif
 static const char pci_device_1002_71c5[] = "M56P [Radeon Mobility X1600]";
 static const char pci_device_1002_71c6[] = "RV530LE [Radeon X1600]";
+static const char pci_device_1002_71c7[] = "RV535 [Radeon X1650 Series]";
 static const char pci_device_1002_71ce[] = "RV530LE [Radeon X1600]";
 static const char pci_device_1002_71d5[] = "M66-P ATI Mobility Radeon X1700";
 static const char pci_device_1002_71d6[] = "M66-XT ATI Mobility Radeon X1700";
 static const char pci_device_1002_71de[] = "RV530LE [Radeon X1600]";
 static const char pci_device_1002_71e0[] = "RV530 [Radeon X1600] (Secondary)";
 static const char pci_device_1002_71e2[] = "RV530 [Radeon X1600] (Secondary)";
+static const char pci_device_1002_71e7[] = "RV535 [Radeon X1650 Series]";
+static const char pci_device_1002_7210[] = "M71 [ATI Mobility Radeon X2100]";
+static const char pci_device_1002_7211[] = "M71 [ATI Mobility Radeon X2100 Secondary]";
 static const char pci_device_1002_7240[] = "R580 [Radeon X1900]";
 static const char pci_device_1002_7241[] = "R580 [Radeon X1900]";
 static const char pci_device_1002_7242[] = "R580 [Radeon X1900]";
@@ -2134,15 +2311,33 @@ static const char pci_device_1002_7248[] = "R580 [Radeon X1900]";
 static const char pci_device_1002_7249[] = "R580 [Radeon X1900 XT] Primary";
 static const char pci_device_1002_724a[] = "R580 [Radeon X1900]";
 static const char pci_device_1002_724b[] = "R580 [Radeon X1900]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_724b_1002_0b12[] = "Radeon X1900 Primary Display Device";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_724b_1002_0b13[] = "Radeon X1900 Secondary Display Device";
+#endif
 static const char pci_device_1002_724c[] = "R580 [Radeon X1900]";
 static const char pci_device_1002_724d[] = "R580 [Radeon X1900]";
-static const char pci_device_1002_724e[] = "R580 [FireGL V7300/V7350] Primary (PCIE)";
+static const char pci_device_1002_724e[] = "R580 [AMD Stream Processor]";
 static const char pci_device_1002_7269[] = "R580 [Radeon X1900 XT] Secondary";
-static const char pci_device_1002_726e[] = "R580 [FireGL V7300/V7350] Secondary (PCIE)";
+static const char pci_device_1002_726b[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_726e[] = "R580 [AMD Stream Processor Secondary]";
+static const char pci_device_1002_7280[] = "ATI Radeon X1950 Pro Primary (PCIE)";
+static const char pci_device_1002_7288[] = "ATI Radeon X1950 GT";
+static const char pci_device_1002_7291[] = "ATI Radeon X1650 XT Primary (PCIE)";
+static const char pci_device_1002_7293[] = "Radeon X1650 Series";
+static const char pci_device_1002_72a0[] = "ATI Radeon X1950 Pro Secondary (PCIE)";
+static const char pci_device_1002_72a8[] = "ATI Radeon X1950 GT Secondary";
+static const char pci_device_1002_72b1[] = "ATI Radeon X1650 XT Secondary (PCIE)";
+static const char pci_device_1002_72b3[] = "ATI Radeon X1650 Series Secondary";
 static const char pci_device_1002_7833[] = "Radeon 9100 IGP Host Bridge";
 static const char pci_device_1002_7834[] = "Radeon 9100 PRO IGP";
 static const char pci_device_1002_7835[] = "Radeon Mobility 9200 IGP";
 static const char pci_device_1002_7838[] = "Radeon 9100 IGP PCI/AGP Bridge";
+static const char pci_device_1002_791e[] = "ATI Radeon Xpress 1200 Series";
+static const char pci_device_1002_791f[] = "ATI Radeon Xpress 1200 Series";
+static const char pci_device_1002_793f[] = "ATI Radeon Xpress 1200 Series Secondary";
 static const char pci_device_1002_7c37[] = "RV350 AQ [Radeon 9600 SE]";
 static const char pci_device_1002_cab0[] = "AGP Bridge [IGP 320M]";
 static const char pci_device_1002_cab2[] = "RS200/RS200M AGP Bridge [IGP 340M]";
@@ -3003,6 +3198,7 @@ static const char pci_subsys_1022_2001_1668_0299[] = "ActionLink Home Network Ad
 static const char pci_device_1022_2003[] = "Am 1771 MBW [Alchemy]";
 static const char pci_device_1022_2020[] = "53c974 [PCscsi]";
 static const char pci_device_1022_2040[] = "79c974";
+static const char pci_device_1022_2080[] = "Conrad Kostecki";
 static const char pci_device_1022_2081[] = "Geode LX Video";
 static const char pci_device_1022_2082[] = "Geode LX AES Security Block";
 static const char pci_device_1022_208f[] = "CS5536 GeodeLink PCI South Bridge";
@@ -3245,15 +3441,34 @@ static const char pci_device_1028_0002[] = "PowerEdge Expandable RAID Controller
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1028_0002_1028_0002[] = "PowerEdge 4400";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0002_1028_00d1[] = "PERC 3/DiV [Viper]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0002_1028_00d9[] = "PERC 3/DiL [Lexus]";
+#endif
 static const char pci_device_1028_0003[] = "PowerEdge Expandable RAID Controller 3/Si";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1028_0003_1028_0003[] = "PowerEdge 2450";
 #endif
+static const char pci_device_1028_0004[] = "PowerEdge Expandable RAID Controller 3/Di [Iguana]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0004_1028_0004[] = "PERC 3/DiF [Iguana]";
+#endif
 static const char pci_device_1028_0006[] = "PowerEdge Expandable RAID Controller 3/Di";
 static const char pci_device_1028_0007[] = "Remote Access Card III";
 static const char pci_device_1028_0008[] = "Remote Access Card III";
 static const char pci_device_1028_0009[] = "Remote Access Card III: BMC/SMIC device not present";
 static const char pci_device_1028_000a[] = "PowerEdge Expandable RAID Controller 3/Di";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_000a_1028_0106[] = "PERC 3/DiJ [Jaguar]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_000a_1028_011b[] = "PERC 3/DiD [Dagger]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_000a_1028_0121[] = "PERC 3/DiB [Boxster]";
+#endif
 static const char pci_device_1028_000c[] = "Embedded Remote Access or ERA/O";
 static const char pci_device_1028_000d[] = "Embedded Remote Access: BMC/SMIC device";
 static const char pci_device_1028_000e[] = "PowerEdge Expandable RAID controller 4/Di";
@@ -3279,6 +3494,13 @@ static const char pci_subsys_1028_0013_1028_0170[] = "PowerEdge Expandable RAID
 #endif
 static const char pci_device_1028_0014[] = "Remote Access Card 4 Daughter Card SMIC interface";
 static const char pci_device_1028_0015[] = "PowerEdge Expandable RAID controller 5i";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0015_1028_1f01[] = "PERC 5/E Adapter RAID Controller";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0015_1028_1f02[] = "PERC 5/i Adapter RAID Controller";
+#endif
+static const char pci_device_1028_1f03[] = "PERC 5/i";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1029[] = "Siemens Nixdorf IS";
 #endif
@@ -3779,6 +4001,7 @@ static const char pci_subsys_102f_0020_102f_00f8[] = "ATM Meteor 155";
 #endif
 static const char pci_device_102f_0030[] = "TC35815CF PCI 10/100 Mbit Ethernet Controller";
 static const char pci_device_102f_0031[] = "TC35815CF PCI 10/100 Mbit Ethernet Controller with WOL";
+static const char pci_device_102f_0032[] = "TC35815CF PCI 10/100 Mbit Ethernet Controller on TX4939";
 static const char pci_device_102f_0105[] = "TC86C001 [goku-s] IDE";
 static const char pci_device_102f_0106[] = "TC86C001 [goku-s] USB 1.1 Host";
 static const char pci_device_102f_0107[] = "TC86C001 [goku-s] USB Device Controller";
@@ -3991,6 +4214,9 @@ static const char pci_subsys_1039_0900_1039_0900[] = "SiS900 10/100 Ethernet Ada
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_0900_1043_8035[] = "CUSI-FX motherboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_0900_1462_0900[] = "MS-6701 motherboard";
+#endif
 static const char pci_device_1039_0961[] = "SiS961 [MuTIOL Media IO]";
 static const char pci_device_1039_0962[] = "SiS962 [MuTIOL Media IO]";
 static const char pci_device_1039_0963[] = "SiS963 [MuTIOL Media IO]";
@@ -4019,6 +4245,9 @@ static const char pci_subsys_1039_5513_1039_5513[] = "SiS5513 EIDE Controller (A
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_5513_1043_8035[] = "CUSI-FX motherboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_5513_1462_7010[] = "MS-6701 motherboard";
+#endif
 static const char pci_device_1039_5517[] = "5517";
 static const char pci_device_1039_5571[] = "5571";
 static const char pci_device_1039_5581[] = "5581 Pentium Chipset";
@@ -4077,13 +4306,25 @@ static const char pci_subsys_1039_7001_1039_7000[] = "Onboard USB Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_7001_1462_5470[] = "K7SOM+ 5.2C Motherboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7001_1462_7010[] = "MS-6701 motherboard";
+#endif
 static const char pci_device_1039_7002[] = "USB 2.0 Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7002_1462_7010[] = "MS-6701 motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_7002_1509_7002[] = "Onboard USB Controller";
 #endif
 static const char pci_device_1039_7007[] = "FireWire Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7007_1462_701d[] = "MS-6701";
+#endif
 static const char pci_device_1039_7012[] = "AC'97 Sound Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7012_1462_7010[] = "MS-6701 motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_7012_15bd_1001[] = "DFI 661FX motherboard";
 #endif
 static const char pci_device_1039_7013[] = "AC'97 Modem Controller";
@@ -4255,10 +4496,13 @@ static const char pci_device_103c_12ec[] = "sx2000 I/O Controller";
 static const char pci_device_103c_12ee[] = "PCI-X 2.0 Local Bus Adapter";
 static const char pci_device_103c_12f8[] = "Broadcom BCM4306 802.11b/g Wireless LAN";
 static const char pci_device_103c_12fa[] = "BCM4306 802.11b/g Wireless LAN Controller";
+static const char pci_device_103c_1302[] = "RMP-3 Shared Memory Driver";
+static const char pci_device_103c_1303[] = "RMP-3 (Remote Management Processor)";
 static const char pci_device_103c_2910[] = "E2910A PCIBus Exerciser";
 static const char pci_device_103c_2925[] = "E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer";
 static const char pci_device_103c_3080[] = "Pavilion ze2028ea";
 static const char pci_device_103c_3085[] = "Realtek RTL8139/8139C/8139C+";
+static const char pci_device_103c_30b5[] = "Compaq Presario V3000Z";
 static const char pci_device_103c_3220[] = "Smart Array P600";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_103c_3220_103c_3225[] = "3 Gb/s SAS RAID";
@@ -4314,8 +4558,10 @@ static const char pci_device_1043_80bb[] = "v9180 Magic/T [GeForce4 MX440 AGP 8x
 static const char pci_device_1043_80c5[] = "nForce3 chipset motherboard [SK8N]";
 static const char pci_device_1043_80df[] = "v9520 Magic/T";
 static const char pci_device_1043_815a[] = "A8N-SLI Motherboard nForce4 SATA";
+static const char pci_device_1043_8168[] = "Realtek PCI-E Gigabit Ethernet Controller (RTL8111B)";
 static const char pci_device_1043_8187[] = "802.11a/b/g Wireless LAN Card";
 static const char pci_device_1043_8188[] = "Tiger Hybrid TV Capture Device";
+static const char pci_device_1043_81f4[] = "EN7300TC512/TD/128M/A(C262G) [Graphics Card EN7300TC512]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1044[] = "Adaptec (formerly DPT)";
@@ -4632,6 +4878,9 @@ static const char pci_subsys_104c_8023_103c_088c[] = "NC8000 laptop";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_8023_1043_808b[] = "K8N4-E Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8023_1043_815b[] = "P5W DH Deluxe Motherboard";
+#endif
 static const char pci_device_104c_8024[] = "TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link)";
 static const char pci_device_104c_8025[] = "TSB82AA2 IEEE-1394b Link Layer Controller";
 #ifdef INIT_SUBSYS_INFO
@@ -4719,10 +4968,16 @@ static const char pci_device_104c_8039[] = "PCIxx12 Cardbus Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_8039_103c_309f[] = "nx9420";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8039_103c_30a1[] = "NC2400";
+#endif
 static const char pci_device_104c_803a[] = "PCIxx12 OHCI Compliant IEEE 1394 Host Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_803a_103c_309f[] = "nx9420";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_803a_103c_30a1[] = "NC2400";
+#endif
 static const char pci_device_104c_803b[] = "5-in-1 Multimedia Card Reader (SD/MMC/MS/MS PRO/xD)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_803b_103c_309f[] = "nx9420";
@@ -4735,6 +4990,9 @@ static const char pci_device_104c_803d[] = "PCIxx12 GemCore based SmartCard cont
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_803d_103c_309f[] = "nx9420";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_803d_103c_30a1[] = "NC2400";
+#endif
 static const char pci_device_104c_8201[] = "PCI1620 Firmware Loading Function";
 static const char pci_device_104c_8204[] = "PCI7410,7510,7610 PCI Firmware Loading Function";
 #ifdef INIT_SUBSYS_INFO
@@ -4831,6 +5089,9 @@ static const char pci_subsys_104c_ac42_1028_00e6[] = "PCI4451 PC card CardBus Co
 #endif
 static const char pci_device_104c_ac44[] = "PCI4510 PC card Cardbus Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac44_1028_0149[] = "Inspiron 5100";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_ac44_1028_0163[] = "Latitude D505";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -4858,7 +5119,7 @@ static const char pci_subsys_104c_ac4a_1028_0139[] = "Latitude D400";
 static const char pci_subsys_104c_ac4a_1028_014e[] = "Latitude D800";
 #endif
 static const char pci_device_104c_ac50[] = "PCI1410 PC card Cardbus Controller";
-static const char pci_device_104c_ac51[] = "PCI1420";
+static const char pci_device_104c_ac51[] = "PCI1420 PC card Cardbus Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_ac51_0e11_004e[] = "Evo N600c";
 #endif
@@ -4922,6 +5183,9 @@ static const char pci_subsys_104c_ac60_175c_8800[] = "ASI88xx Audio Adapter";
 static const char pci_device_104c_ac8d[] = "PCI 7620";
 static const char pci_device_104c_ac8e[] = "PCI7420 CardBus Controller";
 static const char pci_device_104c_ac8f[] = "PCI7420/7620 Combo CardBus, 1394a-2000 OHCI and SD/MS-Pro Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac8f_1028_018d[] = "Inspiron 700m";
+#endif
 static const char pci_device_104c_fe00[] = "FireWire Host Controller";
 static const char pci_device_104c_fe03[] = "12C01A FireWire Host Controller";
 static const char pci_vendor_104d[] = "Sony Corporation";
@@ -5086,6 +5350,7 @@ static const char pci_subsys_1057_1801_ecc0_0072[] = "Mona rev.2";
 #endif
 static const char pci_device_1057_18c0[] = "MPC8265A/8266/8272";
 static const char pci_device_1057_18c1[] = "MPC8271/MPC8272";
+static const char pci_device_1057_3052[] = "SM56 Data Fax Modem";
 static const char pci_device_1057_3055[] = "SM56 Data Fax Modem";
 static const char pci_device_1057_3410[] = "DSP56361 Digital Signal Processor";
 #ifdef INIT_SUBSYS_INFO
@@ -5198,6 +5463,9 @@ static const char pci_vendor_1059[] = "Teknor Industrial Computers Inc";
 static const char pci_vendor_105a[] = "Promise Technology, Inc.";
 static const char pci_device_105a_0d30[] = "PDC20265 (FastTrak100 Lite/Ultra100)";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_0d30_1043_8042[] = "ASUS AV7266-E South Bridge Promise RAID";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_105a_0d30_105a_4d33[] = "Ultra100";
 #endif
 static const char pci_device_105a_0d38[] = "20263";
@@ -5243,6 +5511,11 @@ static const char pci_subsys_105a_4d30_105a_4d33[] = "Ultra100";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_105a_4d30_105a_4d39[] = "FastTrak100";
 #endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_4d30_8086_5744[] = "S845WD1-E mainboard";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_105a_4d33[] = "20246";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_105a_4d33_105a_4d33[] = "20246 IDE Controller";
@@ -5295,7 +5568,18 @@ static const char pci_device_105a_6629[] = "PDC20619 (FastTrak TX4000)";
 static const char pci_device_105a_7275[] = "PDC20277 (SBFastTrak133 Lite)";
 static const char pci_device_105a_8002[] = "SATAII150 SX8";
 static const char pci_device_105a_8350[] = "80333 [SuperTrak EX8350/EX16350], 80331 [SuperTrak EX8300/EX16300]";
+static const char pci_device_105a_8650[] = "IOP1348 [SuperTrak EX4650/EX8650/EX8654]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_8650_105a_4600[] = "SuperTrak EX4650";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_8650_105a_8601[] = "SuperTrak EX8650";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_8650_105a_8602[] = "SuperTrak EX8654";
+#endif
 static const char pci_device_105a_c350[] = "80333 [SuperTrak EX12350]";
+static const char pci_device_105a_e350[] = "80333 [SuperTrak EX24350]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_105b[] = "Foxconn International, Inc.";
@@ -5672,6 +5956,7 @@ static const char pci_device_1073_0012[] = "YMF-754 [DS-1E Audio Controller]";
 static const char pci_subsys_1073_0012_1073_0012[] = "DS-XG PCI Audio Codec";
 #endif
 static const char pci_device_1073_0020[] = "DS-1 Audio";
+static const char pci_device_1073_1000[] = "SW1000XG [XG Factory]";
 static const char pci_device_1073_2000[] = "DS2416 Digital Mixing Card";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1073_2000_1073_2000[] = "DS2416 Digital Mixing Card";
@@ -5737,7 +6022,7 @@ static const char pci_subsys_1077_2422_103c_12dd[] = "4Gb Fibre Channel [AB429A]
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1077_2432[] = "ISP2432-based 4Gb Fibre Channel to PCI Express HBA";
 static const char pci_device_1077_3022[] = "ISP4022-based Ethernet NIC";
-static const char pci_device_1077_3032[] = "ISP4032-based Ethernet NIC";
+static const char pci_device_1077_3032[] = "ISP4032-based Ethernet IPv6 NIC";
 static const char pci_device_1077_4010[] = "ISP4010-based iSCSI TOE HBA";
 static const char pci_device_1077_4022[] = "ISP4022-based iSCSI TOE HBA";
 static const char pci_device_1077_4032[] = "ISP4032-based iSCSI TOE IPv6 HBA";
@@ -6307,6 +6592,9 @@ static const char pci_subsys_109e_0878_144f_3000[] = "MagicTView CPH060 - Audio"
 static const char pci_subsys_109e_0878_1461_0002[] = "Avermedia PCTV98 Audio Capture";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_109e_0878_1461_0003[] = "UltraTV PCI 350";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_0878_1461_0004[] = "AVerTV WDM Audio Capture";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -6491,6 +6779,8 @@ static const char pci_device_10a9_4001[] = "TIO-CE PCI Express Bridge";
 static const char pci_device_10a9_4002[] = "TIO-CE PCI Express Port";
 static const char pci_device_10a9_8001[] = "O2 1394";
 static const char pci_device_10a9_8002[] = "G-net NT";
+static const char pci_device_10a9_8010[] = "Broadcom e-net [SGI IO9/IO10 BaseIO]";
+static const char pci_device_10a9_8018[] = "Broadcom e-net [SGI A330 Server BaseIO]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10aa[] = "ACC Microelectronics";
@@ -6589,6 +6879,9 @@ static const char pci_subsys_10b5_9030_10b5_3025[] = "Alpermann+Velte PCL PCI L
 static const char pci_subsys_10b5_9030_10b5_3068[] = "Alpermann+Velte PCL PCI HD (3V/5V): Timecode Reader Board";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9030_12fe_0111[] = "CPCI-ASIO4 (ESD 4-port Serial Interface Board)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9030_1397_3136[] = "4xS0-ISDN PCI Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -6745,6 +7038,9 @@ static const char pci_subsys_10b5_9054_12c7_4001[] = "Intel Dialogic DM/V960-4T1
 static const char pci_subsys_10b5_9054_12d9_0002[] = "PCI Prosody Card rev 1.5";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9054_14b4_d100[] = "Dektec DTA-100";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9054_16df_0011[] = "PIKA PrimeNet MM PCI";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -11547,6 +11843,7 @@ static const char pci_subsys_1166_0132_1166_0132[] = "HT2000 PCI-Express bridge"
 static const char pci_device_1166_0140[] = "HT2100 PCI-Express Bridge";
 static const char pci_device_1166_0141[] = "HT2100 PCI-Express Bridge";
 static const char pci_device_1166_0142[] = "HT2100 PCI-Express Bridge";
+static const char pci_device_1166_0144[] = "HT2100 PCI-Express Bridge";
 static const char pci_device_1166_0200[] = "OSB4 South Bridge";
 static const char pci_device_1166_0201[] = "CSB5 South Bridge";
 #ifdef INIT_SUBSYS_INFO
@@ -21296,13 +21593,13 @@ static const char pci_device_8086_0962[] = "80960RM [i960RM Bridge]";
 static const char pci_device_8086_0964[] = "80960RP [i960 RP Microprocessor/Bridge]";
 static const char pci_device_8086_1000[] = "82542 Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1000_0e11_b0df[] = "NC1632 Gigabit Ethernet Adapter (1000-SX)";
+static const char pci_subsys_8086_1000_0e11_b0df[] = "NC6132 Gigabit Ethernet Adapter (1000-SX)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1000_0e11_b0e0[] = "NC1633 Gigabit Ethernet Adapter (1000-LX)";
+static const char pci_subsys_8086_1000_0e11_b0e0[] = "NC6133 Gigabit Ethernet Adapter (1000-LX)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1000_0e11_b123[] = "NC1634 Gigabit Ethernet Adapter (1000-SX)";
+static const char pci_subsys_8086_1000_0e11_b123[] = "NC6134 Gigabit Ethernet Adapter (1000-LX)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1000_1014_0119[] = "Netfinity Gigabit Ethernet SX Adapter";
@@ -22280,6 +22577,9 @@ static const char pci_subsys_8086_1229_8086_0007[] = "82558 10/100 Adapter";
 static const char pci_subsys_8086_1229_8086_0008[] = "82558 10/100 with Wake on LAN";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1229_8086_0009[] = "PRO/100+ PCI (TP)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1229_8086_000a[] = "EtherExpress PRO/100+ Management Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22505,6 +22805,9 @@ static const char pci_subsys_8086_1229_8086_3011[] = "EtherExpress PRO/100 S Net
 static const char pci_subsys_8086_1229_8086_3012[] = "EtherExpress PRO/100 Network Connection";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1229_8086_301a[] = "S845WD1-E mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1229_8086_3411[] = "SDS2 Mainboard";
 #endif
 static const char pci_device_8086_122d[] = "430FX - 82437FX TSC [Triton I]";
@@ -22673,6 +22976,9 @@ static const char pci_subsys_8086_2425_11d4_0048[] = "SoundMAX Integrated Digita
 static const char pci_device_8086_2426[] = "82801AB AC'97 Modem";
 static const char pci_device_8086_2428[] = "82801AB PCI Bridge";
 static const char pci_device_8086_2440[] = "82801BA ISA Bridge (LPC)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2440_8086_5744[] = "S845WD1-E";
+#endif
 static const char pci_device_8086_2442[] = "82801BA/BAM USB (Hub #1)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2442_1014_01c6[] = "Netvista A40/A40p";
@@ -22701,6 +23007,9 @@ static const char pci_subsys_8086_2442_8086_4532[] = "D815EEA2 mainboard";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2442_8086_4557[] = "D815EGEW Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2442_8086_5744[] = "S845WD1-E mainboard";
+#endif
 static const char pci_device_8086_2443[] = "82801BA/BAM SMBus";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2443_1014_01c6[] = "Netvista A40/A40p";
@@ -22729,6 +23038,9 @@ static const char pci_subsys_8086_2443_8086_4532[] = "D815EEA2 mainboard";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2443_8086_4557[] = "D815EGEW Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2443_8086_5744[] = "S845WD1-E mainboard";
+#endif
 static const char pci_device_8086_2444[] = "82801BA/BAM USB (Hub #2)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2444_1025_1016[] = "Travelmate 612 TX";
@@ -22751,6 +23063,9 @@ static const char pci_subsys_8086_2444_147b_0507[] = "TH7II-RAID";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2444_8086_4532[] = "D815EEA2 mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2444_8086_5744[] = "S845WD1-E mainboard";
+#endif
 static const char pci_device_8086_2445[] = "82801BA/BAM AC'97 Audio";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2445_0e11_000b[] = "Compaq Deskpro EN Audio";
@@ -22913,6 +23228,9 @@ static const char pci_subsys_8086_244b_8086_4532[] = "D815EEA2 mainboard";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_244b_8086_4557[] = "D815EGEW Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_244b_8086_5744[] = "S845WD1-E mainboard";
+#endif
 static const char pci_device_8086_244c[] = "82801BAM ISA Bridge (LPC)";
 static const char pci_device_8086_244e[] = "82801 PCI Bridge";
 #ifdef INIT_SUBSYS_INFO
@@ -23144,6 +23462,9 @@ static const char pci_subsys_8086_24c3_103c_08b0[] = "tc1100 tablet";
 static const char pci_subsys_8086_24c3_1071_8160[] = "MIM2000";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c3_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c3_1458_24c2[] = "GA-8PE667 Ultra";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -24465,15 +24786,24 @@ static const char pci_subsys_8086_2792_1043_1881[] = "GMA 900 915GM Integrated G
 #endif
 static const char pci_device_8086_27a0[] = "Mobile 945GM/PM/GMS/940GML and 945GT Express Memory Controller Hub";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a0_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27a0_17aa_2017[] = "Thinkpad R60e model 0657";
 #endif
 static const char pci_device_8086_27a1[] = "Mobile 945GM/PM/GMS/940GML and 945GT Express PCI Express Root Port";
 static const char pci_device_8086_27a2[] = "Mobile 945GM/GMS/940GML Express Integrated Graphics Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a2_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27a2_17aa_201a[] = "Thinkpad R60e model 0657";
 #endif
 static const char pci_device_8086_27a6[] = "Mobile 945GM/GMS/940GML Express Integrated Graphics Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a6_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27a6_17aa_201a[] = "Thinkpad R60e model 0657";
 #endif
 static const char pci_device_8086_27b0[] = "82801GH (ICH7DH) LPC Interface Bridge";
@@ -24486,6 +24816,9 @@ static const char pci_subsys_8086_27b8_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27b9[] = "82801GBM (ICH7-M) LPC Interface Bridge";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27b9_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27b9_10f7_8338[] = "Panasonic CF-Y5 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -24509,6 +24842,9 @@ static const char pci_subsys_8086_27c5_17aa_200d[] = "Thinkpad R60e model 0657";
 static const char pci_device_8086_27c6[] = "82801GHM (ICH7-M DH) Serial ATA Storage Controller RAID";
 static const char pci_device_8086_27c8[] = "82801G (ICH7 Family) USB UHCI #1";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c8_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27c8_107b_5048[] = "E4500";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -24519,6 +24855,9 @@ static const char pci_subsys_8086_27c8_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27c9[] = "82801G (ICH7 Family) USB UHCI #2";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c9_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27c9_107b_5048[] = "E4500";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -24529,6 +24868,9 @@ static const char pci_subsys_8086_27c9_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27ca[] = "82801G (ICH7 Family) USB UHCI #3";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27ca_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27ca_107b_5048[] = "E4500";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -24539,6 +24881,9 @@ static const char pci_subsys_8086_27ca_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27cb[] = "82801G (ICH7 Family) USB UHCI #4";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27cb_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27cb_107b_5048[] = "E4500";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -24549,6 +24894,9 @@ static const char pci_subsys_8086_27cb_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27cc[] = "82801G (ICH7 Family) USB2 EHCI Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27cc_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27cc_17aa_200b[] = "ThinkPad T60/R60 series";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -24560,6 +24908,9 @@ static const char pci_device_8086_27d4[] = "82801G (ICH7 Family) PCI Express Por
 static const char pci_device_8086_27d6[] = "82801G (ICH7 Family) PCI Express Port 4";
 static const char pci_device_8086_27d8[] = "82801G (ICH7 Family) High Definition Audio Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27d8_107b_5048[] = "E4500";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -24572,6 +24923,9 @@ static const char pci_subsys_8086_27d8_1179_ff31[] = "Toshiba America Informatio
 static const char pci_subsys_8086_27d8_152d_0753[] = "Softmodem";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_1734_10ad[] = "Conexant softmodem SmartCP";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27d8_17aa_2010[] = "ThinkPad T60/R60 series";
 #endif
 static const char pci_device_8086_27da[] = "82801G (ICH7 Family) SMBus Controller";
@@ -24592,6 +24946,9 @@ static const char pci_device_8086_27dd[] = "82801G (ICH7 Family) AC'97 Modem Con
 static const char pci_device_8086_27de[] = "82801G (ICH7 Family) AC'97 Audio Controller";
 static const char pci_device_8086_27df[] = "82801G (ICH7 Family) IDE Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27df_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27df_107b_5048[] = "E4500";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -24656,6 +25013,34 @@ static const char pci_device_8086_2849[] = "82801H (ICH8 Family) PCI Express Por
 static const char pci_device_8086_284b[] = "82801H (ICH8 Family) HD Audio Controller";
 static const char pci_device_8086_284f[] = "82801H (ICH8 Family) Thermal Reporting Device";
 static const char pci_device_8086_2850[] = "Mobile IDE Controller";
+static const char pci_device_8086_2910[] = "LPC Interface Controller";
+static const char pci_device_8086_2920[] = "4 port SATA IDE Controller";
+static const char pci_device_8086_2921[] = "2 port SATA IDE Controller";
+static const char pci_device_8086_2922[] = "6 port SATA AHCI Controller";
+static const char pci_device_8086_2923[] = "4 port SATA AHCI Controller";
+static const char pci_device_8086_2925[] = "SATA RAID Controller";
+static const char pci_device_8086_2926[] = "2 port SATA IDE Controller";
+static const char pci_device_8086_2928[] = "Mobile 2 port SATA IDE Controller";
+static const char pci_device_8086_292d[] = "Mobile 2 port SATA IDE Controller";
+static const char pci_device_8086_292e[] = "Mobile 1 port SATA IDE Controller";
+static const char pci_device_8086_2930[] = "SMBus Controller";
+static const char pci_device_8086_2932[] = "Thermal Subsystem";
+static const char pci_device_8086_2934[] = "USB UHCI Controller #1";
+static const char pci_device_8086_2935[] = "USB UHCI Controller #2";
+static const char pci_device_8086_2936[] = "USB UHCI Controller #3";
+static const char pci_device_8086_2937[] = "USB UHCI Controller #4";
+static const char pci_device_8086_2938[] = "USB UHCI Controller #5";
+static const char pci_device_8086_2939[] = "USB UHCI Controller #6";
+static const char pci_device_8086_293a[] = "USB2 EHCI Controller #1";
+static const char pci_device_8086_293c[] = "USB2 EHCI Controller #2";
+static const char pci_device_8086_293e[] = "HD Audio Controller";
+static const char pci_device_8086_2940[] = "PCI Express Port 1";
+static const char pci_device_8086_2942[] = "PCI Express Port 2";
+static const char pci_device_8086_2944[] = "PCI Express Port 3";
+static const char pci_device_8086_2946[] = "PCI Express Port 4";
+static const char pci_device_8086_2948[] = "PCI Express Port 5";
+static const char pci_device_8086_294a[] = "PCI Express Port 6";
+static const char pci_device_8086_294c[] = "Gigabit Ethernet Controller";
 static const char pci_device_8086_2970[] = "82946GZ/PL/GL Memory Controller Hub";
 static const char pci_device_8086_2971[] = "82946GZ/PL/GL PCI Express Root Port";
 static const char pci_device_8086_2972[] = "82946GZ/GL Integrated Graphics Controller";
@@ -24683,6 +25068,37 @@ static const char pci_device_8086_29a4[] = "82P965/G965 HECI Controller";
 static const char pci_device_8086_29a5[] = "82P965/G965 HECI Controller";
 static const char pci_device_8086_29a6[] = "82P965/G965 PT IDER Controller";
 static const char pci_device_8086_29a7[] = "82P965/G965 KT Controller";
+static const char pci_device_8086_29b0[] = "DRAM Controller";
+static const char pci_device_8086_29b1[] = "PCI Express Root Port";
+static const char pci_device_8086_29b2[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29b3[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29b4[] = "HECI Controller";
+static const char pci_device_8086_29b5[] = "HECI Controller";
+static const char pci_device_8086_29b6[] = "PT IDER Controller";
+static const char pci_device_8086_29b7[] = "Serial KT Controller";
+static const char pci_device_8086_29c0[] = "DRAM Controller";
+static const char pci_device_8086_29c1[] = "PCI Express Root Port";
+static const char pci_device_8086_29c2[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29c3[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29c4[] = "HECI Controller";
+static const char pci_device_8086_29c5[] = "HECI Controller";
+static const char pci_device_8086_29c6[] = "PT IDER Controller";
+static const char pci_device_8086_29c7[] = "Serial KT Controller";
+static const char pci_device_8086_29cf[] = "Virtual HECI Controller";
+static const char pci_device_8086_29e0[] = "DRAM Controller";
+static const char pci_device_8086_29e1[] = "Host-Primary PCI Express Bridge";
+static const char pci_device_8086_29e4[] = "HECI Controller";
+static const char pci_device_8086_29e5[] = "HECI Controller";
+static const char pci_device_8086_29e6[] = "PT IDER Controller";
+static const char pci_device_8086_29e7[] = "Serial KT Controller";
+static const char pci_device_8086_29e9[] = "Host-Secondary PCI Express Bridge";
+static const char pci_device_8086_29f0[] = "Server DRAM Controller";
+static const char pci_device_8086_29f1[] = "Server Host-Primary PCI Express Bridge";
+static const char pci_device_8086_29f4[] = "Server HECI Controller";
+static const char pci_device_8086_29f5[] = "Server HECI Controller";
+static const char pci_device_8086_29f6[] = "Server PT IDER Controller";
+static const char pci_device_8086_29f7[] = "Server Serial KT Controller";
+static const char pci_device_8086_29f9[] = "Server Host-Secondary PCI Express Bridge";
 static const char pci_device_8086_2a00[] = "Mobile Memory Controller Hub";
 static const char pci_device_8086_2a01[] = "Mobile PCI Express Root Port";
 static const char pci_device_8086_2a02[] = "Mobile Integrated Graphics Controller";
@@ -24894,7 +25310,46 @@ static const char pci_device_8086_35b5[] = "3100 Chipset Enhanced DMA Controller
 static const char pci_device_8086_35b6[] = "3100 Chipset PCI Express Port A";
 static const char pci_device_8086_35b7[] = "3100 Chipset PCI Express Port A1";
 static const char pci_device_8086_35c8[] = "3100 Extended Configuration Test Overflow Registers";
+static const char pci_device_8086_3600[] = "Server Memory Controller Hub";
+static const char pci_device_8086_3604[] = "Server PCI Express Port 1";
+static const char pci_device_8086_3605[] = "Server PCI Express Port 2";
+static const char pci_device_8086_3606[] = "Server PCI Express Port 3";
+static const char pci_device_8086_3607[] = "Server PCI Express Port 4";
+static const char pci_device_8086_3608[] = "Server PCI Express Port 5";
+static const char pci_device_8086_3609[] = "Server PCI Express Port 6";
+static const char pci_device_8086_360a[] = "Server PCI Express Port 7";
+static const char pci_device_8086_360b[] = "Server IOAT DMA Controller";
+static const char pci_device_8086_360c[] = "Server FSB Registers";
+static const char pci_device_8086_360d[] = "Server Snoop Filter Registers";
+static const char pci_device_8086_360e[] = "Server Reserved Registers";
+static const char pci_device_8086_360f[] = "Server FBD Branch 0 Registers";
+static const char pci_device_8086_3610[] = "Server FBD Branch 1 Registers";
+static const char pci_device_8086_4000[] = "Memory Controller Hub";
+static const char pci_device_8086_4008[] = "Memory Controller Hub";
+static const char pci_device_8086_4010[] = "Memory Controller Hub";
+static const char pci_device_8086_4021[] = "PCI Express Port 1";
+static const char pci_device_8086_4022[] = "PCI Express Port 2";
+static const char pci_device_8086_4023[] = "PCI Express Port 3";
+static const char pci_device_8086_4024[] = "PCI Express Port 4";
+static const char pci_device_8086_4025[] = "PCI Express Port 5";
+static const char pci_device_8086_4026[] = "PCI Express Port 6";
+static const char pci_device_8086_4027[] = "PCI Express Port 7";
+static const char pci_device_8086_4028[] = "PCI Express Port 8";
+static const char pci_device_8086_4029[] = "PCI Express Port 9";
+static const char pci_device_8086_402d[] = "IBIST Registers";
+static const char pci_device_8086_402e[] = "IBIST Registers";
+static const char pci_device_8086_402f[] = "DMA/DCA Engine";
+static const char pci_device_8086_4030[] = "FSB Registers";
+static const char pci_device_8086_4032[] = "I/OxAPIC";
+static const char pci_device_8086_4035[] = "FBD Registers";
+static const char pci_device_8086_4036[] = "FBD Registers";
 static const char pci_device_8086_4220[] = "PRO/Wireless 2200BG Network Connection";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_4220_2731_8086[] = "WLAN-Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_4220_8086_2731[] = "Samsung P35 integrated WLAN";
+#endif
 static const char pci_device_8086_4222[] = "PRO/Wireless 3945ABG Network Connection";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_4222_8086_1005[] = "PRO/Wireless 3945BG Network Connection";
@@ -24924,6 +25379,23 @@ static const char pci_device_8086_5201[] = "EtherExpress PRO/100 Intelligent Ser
 static const char pci_subsys_8086_5201_8086_0001[] = "EtherExpress PRO/100 Server Ethernet Adapter";
 #endif
 static const char pci_device_8086_530d[] = "80310 IOP [IO Processor]";
+static const char pci_device_8086_65c0[] = "Memory Controller Hub";
+static const char pci_device_8086_65e2[] = "PCI Express x4 Port 2";
+static const char pci_device_8086_65e3[] = "PCI Express x4 Port 3";
+static const char pci_device_8086_65e4[] = "PCI Express x4 Port 4";
+static const char pci_device_8086_65e5[] = "PCI Express x4 Port 5";
+static const char pci_device_8086_65e6[] = "PCI Express x4 Port 6";
+static const char pci_device_8086_65e7[] = "PCI Express x4 Port 7";
+static const char pci_device_8086_65f0[] = "FSB Registers";
+static const char pci_device_8086_65f1[] = "Reserved Registers";
+static const char pci_device_8086_65f3[] = "Reserved Registers";
+static const char pci_device_8086_65f5[] = "DDR Channel 0 Registers";
+static const char pci_device_8086_65f6[] = "DDR Channel 1 Registers";
+static const char pci_device_8086_65f7[] = "PCI Express x8 Port 2-3";
+static const char pci_device_8086_65f8[] = "PCI Express x8 Port 4-5";
+static const char pci_device_8086_65f9[] = "PCI Express x8 Port 6-7";
+static const char pci_device_8086_65fa[] = "PCI Express x16 Port 4-7";
+static const char pci_device_8086_65ff[] = "DMA Engine";
 static const char pci_device_8086_7000[] = "82371SB PIIX3 ISA [Natoma/Triton II]";
 static const char pci_device_8086_7010[] = "82371SB PIIX3 IDE [Natoma/Triton II]";
 static const char pci_device_8086_7020[] = "82371SB PIIX3 USB [Natoma/Triton II]";
@@ -25098,6 +25570,7 @@ static const char pci_device_8086_9621[] = "Integrated RAID";
 static const char pci_device_8086_9622[] = "Integrated RAID";
 static const char pci_device_8086_9641[] = "Integrated RAID";
 static const char pci_device_8086_96a1[] = "Integrated RAID";
+static const char pci_device_8086_a620[] = "6400/6402 Advanced Memory Buffer (AMB)";
 static const char pci_device_8086_b152[] = "21152 PCI-to-PCI Bridge";
 static const char pci_device_8086_b154[] = "21154 PCI-to-PCI Bridge";
 static const char pci_device_8086_b555[] = "21555 Non transparent PCI-to-PCI Bridge";
@@ -26290,6 +26763,52 @@ static const pciSubsystemInfo pci_ss_info_1000_0040_1000_0066 =
 #undef pci_ss_info_1000_0066
 #define pci_ss_info_1000_0066 pci_ss_info_1000_0040_1000_0066
 #endif
+static const pciSubsystemInfo pci_ss_info_1000_0055_1033_8336 =
+	{0x1033, 0x8336, pci_subsys_1000_0055_1033_8336, 0};
+#undef pci_ss_info_1033_8336
+#define pci_ss_info_1033_8336 pci_ss_info_1000_0055_1033_8336
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1006 =
+	{0x1000, 0x1006, pci_subsys_1000_0060_1000_1006, 0};
+#undef pci_ss_info_1000_1006
+#define pci_ss_info_1000_1006 pci_ss_info_1000_0060_1000_1006
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_100a =
+	{0x1000, 0x100a, pci_subsys_1000_0060_1000_100a, 0};
+#undef pci_ss_info_1000_100a
+#define pci_ss_info_1000_100a pci_ss_info_1000_0060_1000_100a
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_100e =
+	{0x1000, 0x100e, pci_subsys_1000_0060_1000_100e, 0};
+#undef pci_ss_info_1000_100e
+#define pci_ss_info_1000_100e pci_ss_info_1000_0060_1000_100e
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_100f =
+	{0x1000, 0x100f, pci_subsys_1000_0060_1000_100f, 0};
+#undef pci_ss_info_1000_100f
+#define pci_ss_info_1000_100f pci_ss_info_1000_0060_1000_100f
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1010 =
+	{0x1000, 0x1010, pci_subsys_1000_0060_1000_1010, 0};
+#undef pci_ss_info_1000_1010
+#define pci_ss_info_1000_1010 pci_ss_info_1000_0060_1000_1010
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1011 =
+	{0x1000, 0x1011, pci_subsys_1000_0060_1000_1011, 0};
+#undef pci_ss_info_1000_1011
+#define pci_ss_info_1000_1011 pci_ss_info_1000_0060_1000_1011
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1012 =
+	{0x1000, 0x1012, pci_subsys_1000_0060_1000_1012, 0};
+#undef pci_ss_info_1000_1012
+#define pci_ss_info_1000_1012 pci_ss_info_1000_0060_1000_1012
+static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0363 =
+	{0x1014, 0x0363, pci_subsys_1000_0060_1014_0363, 0};
+#undef pci_ss_info_1014_0363
+#define pci_ss_info_1014_0363 pci_ss_info_1000_0060_1014_0363
+static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0364 =
+	{0x1014, 0x0364, pci_subsys_1000_0060_1014_0364, 0};
+#undef pci_ss_info_1014_0364
+#define pci_ss_info_1014_0364 pci_ss_info_1000_0060_1014_0364
+static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0365 =
+	{0x1014, 0x0365, pci_subsys_1000_0060_1014_0365, 0};
+#undef pci_ss_info_1014_0365
+#define pci_ss_info_1014_0365 pci_ss_info_1000_0060_1014_0365
+#endif
 static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f0a =
 	{0x1028, 0x1f0a, pci_subsys_1000_0060_1028_1f0a, 0};
 #undef pci_ss_info_1028_1f0a
@@ -26313,6 +26832,32 @@ static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f0d =
 #undef pci_ss_info_1028_1f0d
 #define pci_ss_info_1028_1f0d pci_ss_info_1000_0060_1028_1f0d
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f11 =
+	{0x1028, 0x1f11, pci_subsys_1000_0060_1028_1f11, 0};
+#undef pci_ss_info_1028_1f11
+#define pci_ss_info_1028_1f11 pci_ss_info_1000_0060_1028_1f11
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1000_0060_1043_824d =
+	{0x1043, 0x824d, pci_subsys_1000_0060_1043_824d, 0};
+#undef pci_ss_info_1043_824d
+#define pci_ss_info_1043_824d pci_ss_info_1000_0060_1043_824d
+static const pciSubsystemInfo pci_ss_info_1000_0060_1170_002f =
+	{0x1170, 0x002f, pci_subsys_1000_0060_1170_002f, 0};
+#undef pci_ss_info_1170_002f
+#define pci_ss_info_1170_002f pci_ss_info_1000_0060_1170_002f
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_8086_34cc =
+	{0x8086, 0x34cc, pci_subsys_1000_0060_8086_34cc, 0};
+#undef pci_ss_info_8086_34cc
+#define pci_ss_info_8086_34cc pci_ss_info_1000_0060_8086_34cc
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_8086_34cd =
+	{0x8086, 0x34cd, pci_subsys_1000_0060_8086_34cd, 0};
+#undef pci_ss_info_8086_34cd
+#define pci_ss_info_8086_34cd pci_ss_info_1000_0060_8086_34cd
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1000_0062_1000_0062 =
 	{0x1000, 0x0062, pci_subsys_1000_0062_1000_0062, 0};
 #undef pci_ss_info_1000_0062
@@ -26391,6 +26936,24 @@ static const pciSubsystemInfo pci_ss_info_1000_0408_1028_0002 =
 #undef pci_ss_info_1028_0002
 #define pci_ss_info_1028_0002 pci_ss_info_1000_0408_1028_0002
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0408_1028_0012 =
+	{0x1028, 0x0012, pci_subsys_1000_0408_1028_0012, 0};
+#undef pci_ss_info_1028_0012
+#define pci_ss_info_1028_0012 pci_ss_info_1000_0408_1028_0012
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0408_1028_0015 =
+	{0x1028, 0x0015, pci_subsys_1000_0408_1028_0015, 0};
+#undef pci_ss_info_1028_0015
+#define pci_ss_info_1028_0015 pci_ss_info_1000_0408_1028_0015
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0408_1028_1f03 =
+	{0x1028, 0x1f03, pci_subsys_1000_0408_1028_1f03, 0};
+#undef pci_ss_info_1028_1f03
+#define pci_ss_info_1028_1f03 pci_ss_info_1000_0408_1028_1f03
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1000_0408_1734_1065 =
 	{0x1734, 0x1065, pci_subsys_1000_0408_1734_1065, 0};
 #undef pci_ss_info_1734_1065
@@ -26443,6 +27006,10 @@ static const pciSubsystemInfo pci_ss_info_1000_0411_1000_1004 =
 	{0x1000, 0x1004, pci_subsys_1000_0411_1000_1004, 0};
 #undef pci_ss_info_1000_1004
 #define pci_ss_info_1000_1004 pci_ss_info_1000_0411_1000_1004
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_1008 =
+	{0x1000, 0x1008, pci_subsys_1000_0411_1000_1008, 0};
+#undef pci_ss_info_1000_1008
+#define pci_ss_info_1000_1008 pci_ss_info_1000_0411_1000_1008
 static const pciSubsystemInfo pci_ss_info_1000_0411_1000_100c =
 	{0x1000, 0x100c, pci_subsys_1000_0411_1000_100c, 0};
 #undef pci_ss_info_1000_100c
@@ -26812,6 +27379,22 @@ static const pciSubsystemInfo pci_ss_info_1002_4378_103c_308b =
 	{0x103c, 0x308b, pci_subsys_1002_4378_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_1002_4378_103c_308b
+static const pciSubsystemInfo pci_ss_info_1002_437a_1002_4379 =
+	{0x1002, 0x4379, pci_subsys_1002_437a_1002_4379, 0};
+#undef pci_ss_info_1002_4379
+#define pci_ss_info_1002_4379 pci_ss_info_1002_437a_1002_4379
+static const pciSubsystemInfo pci_ss_info_1002_437a_1002_437a =
+	{0x1002, 0x437a, pci_subsys_1002_437a_1002_437a, 0};
+#undef pci_ss_info_1002_437a
+#define pci_ss_info_1002_437a pci_ss_info_1002_437a_1002_437a
+static const pciSubsystemInfo pci_ss_info_1002_437a_14f1_8800 =
+	{0x14f1, 0x8800, pci_subsys_1002_437a_14f1_8800, 0};
+#undef pci_ss_info_14f1_8800
+#define pci_ss_info_14f1_8800 pci_ss_info_1002_437a_14f1_8800
+static const pciSubsystemInfo pci_ss_info_1002_437b_1734_10b8 =
+	{0x1734, 0x10b8, pci_subsys_1002_437b_1734_10b8, 0};
+#undef pci_ss_info_1734_10b8
+#define pci_ss_info_1734_10b8 pci_ss_info_1002_437b_1734_10b8
 static const pciSubsystemInfo pci_ss_info_1002_4742_1002_0040 =
 	{0x1002, 0x0040, pci_subsys_1002_4742_1002_0040, 0};
 #undef pci_ss_info_1002_0040
@@ -26992,6 +27575,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4752_8086_3427 =
 	{0x8086, 0x3427, pci_subsys_1002_4752_8086_3427, 0};
 #undef pci_ss_info_8086_3427
 #define pci_ss_info_8086_3427 pci_ss_info_1002_4752_8086_3427
+static const pciSubsystemInfo pci_ss_info_1002_4752_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_1002_4752_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_1002_4752_8086_5744
 static const pciSubsystemInfo pci_ss_info_1002_4753_1002_4753 =
 	{0x1002, 0x4753, pci_subsys_1002_4753_1002_4753, 0};
 #undef pci_ss_info_1002_4753
@@ -27232,6 +27819,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4e50_103c_0890 =
 	{0x103c, 0x0890, pci_subsys_1002_4e50_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_1002_4e50_103c_0890
+static const pciSubsystemInfo pci_ss_info_1002_4e50_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_1002_4e50_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1002_4e50_144d_c00c
 static const pciSubsystemInfo pci_ss_info_1002_4e50_1462_0311 =
 	{0x1462, 0x0311, pci_subsys_1002_4e50_1462_0311, 0};
 #undef pci_ss_info_1462_0311
@@ -27240,6 +27831,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4e50_1734_1055 =
 	{0x1734, 0x1055, pci_subsys_1002_4e50_1734_1055, 0};
 #undef pci_ss_info_1734_1055
 #define pci_ss_info_1734_1055 pci_ss_info_1002_4e50_1734_1055
+static const pciSubsystemInfo pci_ss_info_1002_4e52_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_1002_4e52_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1002_4e52_144d_c00c
 static const pciSubsystemInfo pci_ss_info_1002_4e65_1002_0003 =
 	{0x1002, 0x0003, pci_subsys_1002_4e65_1002_0003, 0};
 #undef pci_ss_info_1002_0003
@@ -27684,6 +28279,10 @@ static const pciSubsystemInfo pci_ss_info_1002_5961_18bc_0053 =
 	{0x18bc, 0x0053, pci_subsys_1002_5961_18bc_0053, 0};
 #undef pci_ss_info_18bc_0053
 #define pci_ss_info_18bc_0053 pci_ss_info_1002_5961_18bc_0053
+static const pciSubsystemInfo pci_ss_info_1002_5964_1002_5964 =
+	{0x1002, 0x5964, pci_subsys_1002_5964_1002_5964, 0};
+#undef pci_ss_info_1002_5964
+#define pci_ss_info_1002_5964 pci_ss_info_1002_5964_1002_5964
 static const pciSubsystemInfo pci_ss_info_1002_5964_1043_c006 =
 	{0x1043, 0xc006, pci_subsys_1002_5964_1043_c006, 0};
 #undef pci_ss_info_1043_c006
@@ -27756,6 +28355,10 @@ static const pciSubsystemInfo pci_ss_info_1002_5c63_1002_5c63 =
 	{0x1002, 0x5c63, pci_subsys_1002_5c63_1002_5c63, 0};
 #undef pci_ss_info_1002_5c63
 #define pci_ss_info_1002_5c63 pci_ss_info_1002_5c63_1002_5c63
+static const pciSubsystemInfo pci_ss_info_1002_5c63_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_1002_5c63_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1002_5c63_144d_c00c
 static const pciSubsystemInfo pci_ss_info_1002_5d44_1458_4019 =
 	{0x1458, 0x4019, pci_subsys_1002_5d44_1458_4019, 0};
 #undef pci_ss_info_1458_4019
@@ -27836,6 +28439,14 @@ static const pciSubsystemInfo pci_ss_info_1002_71c4_17aa_2007 =
 	{0x17aa, 0x2007, pci_subsys_1002_71c4_17aa_2007, 0};
 #undef pci_ss_info_17aa_2007
 #define pci_ss_info_17aa_2007 pci_ss_info_1002_71c4_17aa_2007
+static const pciSubsystemInfo pci_ss_info_1002_724b_1002_0b12 =
+	{0x1002, 0x0b12, pci_subsys_1002_724b_1002_0b12, 0};
+#undef pci_ss_info_1002_0b12
+#define pci_ss_info_1002_0b12 pci_ss_info_1002_724b_1002_0b12
+static const pciSubsystemInfo pci_ss_info_1002_724b_1002_0b13 =
+	{0x1002, 0x0b13, pci_subsys_1002_724b_1002_0b13, 0};
+#undef pci_ss_info_1002_0b13
+#define pci_ss_info_1002_0b13 pci_ss_info_1002_724b_1002_0b13
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1004_0304_1004_0304 =
 	{0x1004, 0x0304, pci_subsys_1004_0304_1004_0304, 0};
@@ -28678,10 +29289,34 @@ static const pciSubsystemInfo pci_ss_info_1028_0002_1028_0002 =
 	{0x1028, 0x0002, pci_subsys_1028_0002_1028_0002, 0};
 #undef pci_ss_info_1028_0002
 #define pci_ss_info_1028_0002 pci_ss_info_1028_0002_1028_0002
+static const pciSubsystemInfo pci_ss_info_1028_0002_1028_00d1 =
+	{0x1028, 0x00d1, pci_subsys_1028_0002_1028_00d1, 0};
+#undef pci_ss_info_1028_00d1
+#define pci_ss_info_1028_00d1 pci_ss_info_1028_0002_1028_00d1
+static const pciSubsystemInfo pci_ss_info_1028_0002_1028_00d9 =
+	{0x1028, 0x00d9, pci_subsys_1028_0002_1028_00d9, 0};
+#undef pci_ss_info_1028_00d9
+#define pci_ss_info_1028_00d9 pci_ss_info_1028_0002_1028_00d9
 static const pciSubsystemInfo pci_ss_info_1028_0003_1028_0003 =
 	{0x1028, 0x0003, pci_subsys_1028_0003_1028_0003, 0};
 #undef pci_ss_info_1028_0003
 #define pci_ss_info_1028_0003 pci_ss_info_1028_0003_1028_0003
+static const pciSubsystemInfo pci_ss_info_1028_0004_1028_0004 =
+	{0x1028, 0x0004, pci_subsys_1028_0004_1028_0004, 0};
+#undef pci_ss_info_1028_0004
+#define pci_ss_info_1028_0004 pci_ss_info_1028_0004_1028_0004
+static const pciSubsystemInfo pci_ss_info_1028_000a_1028_0106 =
+	{0x1028, 0x0106, pci_subsys_1028_000a_1028_0106, 0};
+#undef pci_ss_info_1028_0106
+#define pci_ss_info_1028_0106 pci_ss_info_1028_000a_1028_0106
+static const pciSubsystemInfo pci_ss_info_1028_000a_1028_011b =
+	{0x1028, 0x011b, pci_subsys_1028_000a_1028_011b, 0};
+#undef pci_ss_info_1028_011b
+#define pci_ss_info_1028_011b pci_ss_info_1028_000a_1028_011b
+static const pciSubsystemInfo pci_ss_info_1028_000a_1028_0121 =
+	{0x1028, 0x0121, pci_subsys_1028_000a_1028_0121, 0};
+#undef pci_ss_info_1028_0121
+#define pci_ss_info_1028_0121 pci_ss_info_1028_000a_1028_0121
 static const pciSubsystemInfo pci_ss_info_1028_0013_1028_016c =
 	{0x1028, 0x016c, pci_subsys_1028_0013_1028_016c, 0};
 #undef pci_ss_info_1028_016c
@@ -28702,6 +29337,14 @@ static const pciSubsystemInfo pci_ss_info_1028_0013_1028_0170 =
 	{0x1028, 0x0170, pci_subsys_1028_0013_1028_0170, 0};
 #undef pci_ss_info_1028_0170
 #define pci_ss_info_1028_0170 pci_ss_info_1028_0013_1028_0170
+static const pciSubsystemInfo pci_ss_info_1028_0015_1028_1f01 =
+	{0x1028, 0x1f01, pci_subsys_1028_0015_1028_1f01, 0};
+#undef pci_ss_info_1028_1f01
+#define pci_ss_info_1028_1f01 pci_ss_info_1028_0015_1028_1f01
+static const pciSubsystemInfo pci_ss_info_1028_0015_1028_1f02 =
+	{0x1028, 0x1f02, pci_subsys_1028_0015_1028_1f02, 0};
+#undef pci_ss_info_1028_1f02
+#define pci_ss_info_1028_1f02 pci_ss_info_1028_0015_1028_1f02
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_102a_001f_9005_000f =
 	{0x9005, 0x000f, pci_subsys_102a_001f_9005_000f, 0};
@@ -29392,6 +30035,10 @@ static const pciSubsystemInfo pci_ss_info_1039_0900_1043_8035 =
 	{0x1043, 0x8035, pci_subsys_1039_0900_1043_8035, 0};
 #undef pci_ss_info_1043_8035
 #define pci_ss_info_1043_8035 pci_ss_info_1039_0900_1043_8035
+static const pciSubsystemInfo pci_ss_info_1039_0900_1462_0900 =
+	{0x1462, 0x0900, pci_subsys_1039_0900_1462_0900, 0};
+#undef pci_ss_info_1462_0900
+#define pci_ss_info_1462_0900 pci_ss_info_1039_0900_1462_0900
 static const pciSubsystemInfo pci_ss_info_1039_5513_1019_0970 =
 	{0x1019, 0x0970, pci_subsys_1039_5513_1019_0970, 0};
 #undef pci_ss_info_1019_0970
@@ -29404,6 +30051,10 @@ static const pciSubsystemInfo pci_ss_info_1039_5513_1043_8035 =
 	{0x1043, 0x8035, pci_subsys_1039_5513_1043_8035, 0};
 #undef pci_ss_info_1043_8035
 #define pci_ss_info_1043_8035 pci_ss_info_1039_5513_1043_8035
+static const pciSubsystemInfo pci_ss_info_1039_5513_1462_7010 =
+	{0x1462, 0x7010, pci_subsys_1039_5513_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_5513_1462_7010
 static const pciSubsystemInfo pci_ss_info_1039_6300_1019_0970 =
 	{0x1019, 0x0970, pci_subsys_1039_6300_1019_0970, 0};
 #undef pci_ss_info_1019_0970
@@ -29456,10 +30107,26 @@ static const pciSubsystemInfo pci_ss_info_1039_7001_1462_5470 =
 	{0x1462, 0x5470, pci_subsys_1039_7001_1462_5470, 0};
 #undef pci_ss_info_1462_5470
 #define pci_ss_info_1462_5470 pci_ss_info_1039_7001_1462_5470
+static const pciSubsystemInfo pci_ss_info_1039_7001_1462_7010 =
+	{0x1462, 0x7010, pci_subsys_1039_7001_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_7001_1462_7010
+static const pciSubsystemInfo pci_ss_info_1039_7002_1462_7010 =
+	{0x1462, 0x7010, pci_subsys_1039_7002_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_7002_1462_7010
 static const pciSubsystemInfo pci_ss_info_1039_7002_1509_7002 =
 	{0x1509, 0x7002, pci_subsys_1039_7002_1509_7002, 0};
 #undef pci_ss_info_1509_7002
 #define pci_ss_info_1509_7002 pci_ss_info_1039_7002_1509_7002
+static const pciSubsystemInfo pci_ss_info_1039_7007_1462_701d =
+	{0x1462, 0x701d, pci_subsys_1039_7007_1462_701d, 0};
+#undef pci_ss_info_1462_701d
+#define pci_ss_info_1462_701d pci_ss_info_1039_7007_1462_701d
+static const pciSubsystemInfo pci_ss_info_1039_7012_1462_7010 =
+	{0x1462, 0x7010, pci_subsys_1039_7012_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_7012_1462_7010
 static const pciSubsystemInfo pci_ss_info_1039_7012_15bd_1001 =
 	{0x15bd, 0x1001, pci_subsys_1039_7012_15bd_1001, 0};
 #undef pci_ss_info_15bd_1001
@@ -29950,6 +30617,10 @@ static const pciSubsystemInfo pci_ss_info_104c_8023_1043_808b =
 	{0x1043, 0x808b, pci_subsys_104c_8023_1043_808b, 0};
 #undef pci_ss_info_1043_808b
 #define pci_ss_info_1043_808b pci_ss_info_104c_8023_1043_808b
+static const pciSubsystemInfo pci_ss_info_104c_8023_1043_815b =
+	{0x1043, 0x815b, pci_subsys_104c_8023_1043_815b, 0};
+#undef pci_ss_info_1043_815b
+#define pci_ss_info_1043_815b pci_ss_info_104c_8023_1043_815b
 static const pciSubsystemInfo pci_ss_info_104c_8025_1458_1000 =
 	{0x1458, 0x1000, pci_subsys_104c_8025_1458_1000, 0};
 #undef pci_ss_info_1458_1000
@@ -30046,10 +30717,18 @@ static const pciSubsystemInfo pci_ss_info_104c_8039_103c_309f =
 	{0x103c, 0x309f, pci_subsys_104c_8039_103c_309f, 0};
 #undef pci_ss_info_103c_309f
 #define pci_ss_info_103c_309f pci_ss_info_104c_8039_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_8039_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_104c_8039_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_104c_8039_103c_30a1
 static const pciSubsystemInfo pci_ss_info_104c_803a_103c_309f =
 	{0x103c, 0x309f, pci_subsys_104c_803a_103c_309f, 0};
 #undef pci_ss_info_103c_309f
 #define pci_ss_info_103c_309f pci_ss_info_104c_803a_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_803a_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_104c_803a_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_104c_803a_103c_30a1
 static const pciSubsystemInfo pci_ss_info_104c_803b_103c_309f =
 	{0x103c, 0x309f, pci_subsys_104c_803b_103c_309f, 0};
 #undef pci_ss_info_103c_309f
@@ -30062,6 +30741,10 @@ static const pciSubsystemInfo pci_ss_info_104c_803d_103c_309f =
 	{0x103c, 0x309f, pci_subsys_104c_803d_103c_309f, 0};
 #undef pci_ss_info_103c_309f
 #define pci_ss_info_103c_309f pci_ss_info_104c_803d_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_803d_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_104c_803d_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_104c_803d_103c_30a1
 static const pciSubsystemInfo pci_ss_info_104c_8204_1028_0139 =
 	{0x1028, 0x0139, pci_subsys_104c_8204_1028_0139, 0};
 #undef pci_ss_info_1028_0139
@@ -30138,6 +30821,10 @@ static const pciSubsystemInfo pci_ss_info_104c_ac42_1028_00e6 =
 	{0x1028, 0x00e6, pci_subsys_104c_ac42_1028_00e6, 0};
 #undef pci_ss_info_1028_00e6
 #define pci_ss_info_1028_00e6 pci_ss_info_104c_ac42_1028_00e6
+static const pciSubsystemInfo pci_ss_info_104c_ac44_1028_0149 =
+	{0x1028, 0x0149, pci_subsys_104c_ac44_1028_0149, 0};
+#undef pci_ss_info_1028_0149
+#define pci_ss_info_1028_0149 pci_ss_info_104c_ac44_1028_0149
 static const pciSubsystemInfo pci_ss_info_104c_ac44_1028_0163 =
 	{0x1028, 0x0163, pci_subsys_104c_ac44_1028_0163, 0};
 #undef pci_ss_info_1028_0163
@@ -30242,6 +30929,10 @@ static const pciSubsystemInfo pci_ss_info_104c_ac60_175c_8800 =
 	{0x175c, 0x8800, pci_subsys_104c_ac60_175c_8800, 0};
 #undef pci_ss_info_175c_8800
 #define pci_ss_info_175c_8800 pci_ss_info_104c_ac60_175c_8800
+static const pciSubsystemInfo pci_ss_info_104c_ac8f_1028_018d =
+	{0x1028, 0x018d, pci_subsys_104c_ac8f_1028_018d, 0};
+#undef pci_ss_info_1028_018d
+#define pci_ss_info_1028_018d pci_ss_info_104c_ac8f_1028_018d
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1050_0840_1050_0001 =
 	{0x1050, 0x0001, pci_subsys_1050_0840_1050_0001, 0};
@@ -30489,6 +31180,10 @@ static const pciSubsystemInfo pci_ss_info_1057_5600_1668_0302 =
 #undef pci_ss_info_1668_0302
 #define pci_ss_info_1668_0302 pci_ss_info_1057_5600_1668_0302
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_105a_0d30_1043_8042 =
+	{0x1043, 0x8042, pci_subsys_105a_0d30_1043_8042, 0};
+#undef pci_ss_info_1043_8042
+#define pci_ss_info_1043_8042 pci_ss_info_105a_0d30_1043_8042
 static const pciSubsystemInfo pci_ss_info_105a_0d30_105a_4d33 =
 	{0x105a, 0x4d33, pci_subsys_105a_0d30_105a_4d33, 0};
 #undef pci_ss_info_105a_4d33
@@ -30523,6 +31218,12 @@ static const pciSubsystemInfo pci_ss_info_105a_4d30_105a_4d39 =
 	{0x105a, 0x4d39, pci_subsys_105a_4d30_105a_4d39, 0};
 #undef pci_ss_info_105a_4d39
 #define pci_ss_info_105a_4d39 pci_ss_info_105a_4d30_105a_4d39
+#endif
+static const pciSubsystemInfo pci_ss_info_105a_4d30_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_105a_4d30_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_105a_4d30_8086_5744
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_105a_4d33_105a_4d33 =
 	{0x105a, 0x4d33, pci_subsys_105a_4d33_105a_4d33, 0};
 #undef pci_ss_info_105a_4d33
@@ -30571,6 +31272,18 @@ static const pciSubsystemInfo pci_ss_info_105a_6269_105a_6269 =
 	{0x105a, 0x6269, pci_subsys_105a_6269_105a_6269, 0};
 #undef pci_ss_info_105a_6269
 #define pci_ss_info_105a_6269 pci_ss_info_105a_6269_105a_6269
+static const pciSubsystemInfo pci_ss_info_105a_8650_105a_4600 =
+	{0x105a, 0x4600, pci_subsys_105a_8650_105a_4600, 0};
+#undef pci_ss_info_105a_4600
+#define pci_ss_info_105a_4600 pci_ss_info_105a_8650_105a_4600
+static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8601 =
+	{0x105a, 0x8601, pci_subsys_105a_8650_105a_8601, 0};
+#undef pci_ss_info_105a_8601
+#define pci_ss_info_105a_8601 pci_ss_info_105a_8650_105a_8601
+static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8602 =
+	{0x105a, 0x8602, pci_subsys_105a_8650_105a_8602, 0};
+#undef pci_ss_info_105a_8602
+#define pci_ss_info_105a_8602 pci_ss_info_105a_8650_105a_8602
 #endif
 static const pciSubsystemInfo pci_ss_info_105d_2339_105d_0000 =
 	{0x105d, 0x0000, pci_subsys_105d_2339_105d_0000, 0};
@@ -31244,6 +31957,10 @@ static const pciSubsystemInfo pci_ss_info_109e_0878_1461_0002 =
 	{0x1461, 0x0002, pci_subsys_109e_0878_1461_0002, 0};
 #undef pci_ss_info_1461_0002
 #define pci_ss_info_1461_0002 pci_ss_info_109e_0878_1461_0002
+static const pciSubsystemInfo pci_ss_info_109e_0878_1461_0003 =
+	{0x1461, 0x0003, pci_subsys_109e_0878_1461_0003, 0};
+#undef pci_ss_info_1461_0003
+#define pci_ss_info_1461_0003 pci_ss_info_109e_0878_1461_0003
 static const pciSubsystemInfo pci_ss_info_109e_0878_1461_0004 =
 	{0x1461, 0x0004, pci_subsys_109e_0878_1461_0004, 0};
 #undef pci_ss_info_1461_0004
@@ -31445,6 +32162,10 @@ static const pciSubsystemInfo pci_ss_info_10b5_9030_10b5_3068 =
 	{0x10b5, 0x3068, pci_subsys_10b5_9030_10b5_3068, 0};
 #undef pci_ss_info_10b5_3068
 #define pci_ss_info_10b5_3068 pci_ss_info_10b5_9030_10b5_3068
+static const pciSubsystemInfo pci_ss_info_10b5_9030_12fe_0111 =
+	{0x12fe, 0x0111, pci_subsys_10b5_9030_12fe_0111, 0};
+#undef pci_ss_info_12fe_0111
+#define pci_ss_info_12fe_0111 pci_ss_info_10b5_9030_12fe_0111
 static const pciSubsystemInfo pci_ss_info_10b5_9030_1397_3136 =
 	{0x1397, 0x3136, pci_subsys_10b5_9030_1397_3136, 0};
 #undef pci_ss_info_1397_3136
@@ -31649,6 +32370,10 @@ static const pciSubsystemInfo pci_ss_info_10b5_9054_12d9_0002 =
 	{0x12d9, 0x0002, pci_subsys_10b5_9054_12d9_0002, 0};
 #undef pci_ss_info_12d9_0002
 #define pci_ss_info_12d9_0002 pci_ss_info_10b5_9054_12d9_0002
+static const pciSubsystemInfo pci_ss_info_10b5_9054_14b4_d100 =
+	{0x14b4, 0xd100, pci_subsys_10b5_9054_14b4_d100, 0};
+#undef pci_ss_info_14b4_d100
+#define pci_ss_info_14b4_d100 pci_ss_info_10b5_9054_14b4_d100
 static const pciSubsystemInfo pci_ss_info_10b5_9054_16df_0011 =
 	{0x16df, 0x0011, pci_subsys_10b5_9054_16df_0011, 0};
 #undef pci_ss_info_16df_0011
@@ -41672,6 +42397,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1229_8086_0008 =
 	{0x8086, 0x0008, pci_subsys_8086_1229_8086_0008, 0};
 #undef pci_ss_info_8086_0008
 #define pci_ss_info_8086_0008 pci_ss_info_8086_1229_8086_0008
+static const pciSubsystemInfo pci_ss_info_8086_1229_8086_0009 =
+	{0x8086, 0x0009, pci_subsys_8086_1229_8086_0009, 0};
+#undef pci_ss_info_8086_0009
+#define pci_ss_info_8086_0009 pci_ss_info_8086_1229_8086_0009
 static const pciSubsystemInfo pci_ss_info_8086_1229_8086_000a =
 	{0x8086, 0x000a, pci_subsys_8086_1229_8086_000a, 0};
 #undef pci_ss_info_8086_000a
@@ -41972,6 +42701,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1229_8086_3012 =
 	{0x8086, 0x3012, pci_subsys_8086_1229_8086_3012, 0};
 #undef pci_ss_info_8086_3012
 #define pci_ss_info_8086_3012 pci_ss_info_8086_1229_8086_3012
+static const pciSubsystemInfo pci_ss_info_8086_1229_8086_301a =
+	{0x8086, 0x301a, pci_subsys_8086_1229_8086_301a, 0};
+#undef pci_ss_info_8086_301a
+#define pci_ss_info_8086_301a pci_ss_info_8086_1229_8086_301a
 static const pciSubsystemInfo pci_ss_info_8086_1229_8086_3411 =
 	{0x8086, 0x3411, pci_subsys_8086_1229_8086_3411, 0};
 #undef pci_ss_info_8086_3411
@@ -42136,6 +42869,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2425_11d4_0048 =
 	{0x11d4, 0x0048, pci_subsys_8086_2425_11d4_0048, 0};
 #undef pci_ss_info_11d4_0048
 #define pci_ss_info_11d4_0048 pci_ss_info_8086_2425_11d4_0048
+static const pciSubsystemInfo pci_ss_info_8086_2440_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_8086_2440_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2440_8086_5744
 static const pciSubsystemInfo pci_ss_info_8086_2442_1014_01c6 =
 	{0x1014, 0x01c6, pci_subsys_8086_2442_1014_01c6, 0};
 #undef pci_ss_info_1014_01c6
@@ -42172,6 +42909,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2442_8086_4557 =
 	{0x8086, 0x4557, pci_subsys_8086_2442_8086_4557, 0};
 #undef pci_ss_info_8086_4557
 #define pci_ss_info_8086_4557 pci_ss_info_8086_2442_8086_4557
+static const pciSubsystemInfo pci_ss_info_8086_2442_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_8086_2442_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2442_8086_5744
 static const pciSubsystemInfo pci_ss_info_8086_2443_1014_01c6 =
 	{0x1014, 0x01c6, pci_subsys_8086_2443_1014_01c6, 0};
 #undef pci_ss_info_1014_01c6
@@ -42208,6 +42949,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2443_8086_4557 =
 	{0x8086, 0x4557, pci_subsys_8086_2443_8086_4557, 0};
 #undef pci_ss_info_8086_4557
 #define pci_ss_info_8086_4557 pci_ss_info_8086_2443_8086_4557
+static const pciSubsystemInfo pci_ss_info_8086_2443_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_8086_2443_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2443_8086_5744
 static const pciSubsystemInfo pci_ss_info_8086_2444_1025_1016 =
 	{0x1025, 0x1016, pci_subsys_8086_2444_1025_1016, 0};
 #undef pci_ss_info_1025_1016
@@ -42236,6 +42981,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2444_8086_4532 =
 	{0x8086, 0x4532, pci_subsys_8086_2444_8086_4532, 0};
 #undef pci_ss_info_8086_4532
 #define pci_ss_info_8086_4532 pci_ss_info_8086_2444_8086_4532
+static const pciSubsystemInfo pci_ss_info_8086_2444_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_8086_2444_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2444_8086_5744
 static const pciSubsystemInfo pci_ss_info_8086_2445_0e11_000b =
 	{0x0e11, 0x000b, pci_subsys_8086_2445_0e11_000b, 0};
 #undef pci_ss_info_0e11_000b
@@ -42444,6 +43193,10 @@ static const pciSubsystemInfo pci_ss_info_8086_244b_8086_4557 =
 	{0x8086, 0x4557, pci_subsys_8086_244b_8086_4557, 0};
 #undef pci_ss_info_8086_4557
 #define pci_ss_info_8086_4557 pci_ss_info_8086_244b_8086_4557
+static const pciSubsystemInfo pci_ss_info_8086_244b_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_8086_244b_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_244b_8086_5744
 static const pciSubsystemInfo pci_ss_info_8086_244e_1014_0267 =
 	{0x1014, 0x0267, pci_subsys_8086_244e_1014_0267, 0};
 #undef pci_ss_info_1014_0267
@@ -42720,6 +43473,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24c3_1071_8160 =
 	{0x1071, 0x8160, pci_subsys_8086_24c3_1071_8160, 0};
 #undef pci_ss_info_1071_8160
 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c3_1071_8160
+static const pciSubsystemInfo pci_ss_info_8086_24c3_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_24c3_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24c3_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_24c3_1458_24c2 =
 	{0x1458, 0x24c2, pci_subsys_8086_24c3_1458_24c2, 0};
 #undef pci_ss_info_1458_24c2
@@ -44228,14 +44985,26 @@ static const pciSubsystemInfo pci_ss_info_8086_2792_1043_1881 =
 	{0x1043, 0x1881, pci_subsys_8086_2792_1043_1881, 0};
 #undef pci_ss_info_1043_1881
 #define pci_ss_info_1043_1881 pci_ss_info_8086_2792_1043_1881
+static const pciSubsystemInfo pci_ss_info_8086_27a0_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27a0_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27a0_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27a0_17aa_2017 =
 	{0x17aa, 0x2017, pci_subsys_8086_27a0_17aa_2017, 0};
 #undef pci_ss_info_17aa_2017
 #define pci_ss_info_17aa_2017 pci_ss_info_8086_27a0_17aa_2017
+static const pciSubsystemInfo pci_ss_info_8086_27a2_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27a2_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27a2_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27a2_17aa_201a =
 	{0x17aa, 0x201a, pci_subsys_8086_27a2_17aa_201a, 0};
 #undef pci_ss_info_17aa_201a
 #define pci_ss_info_17aa_201a pci_ss_info_8086_27a2_17aa_201a
+static const pciSubsystemInfo pci_ss_info_8086_27a6_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27a6_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27a6_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27a6_17aa_201a =
 	{0x17aa, 0x201a, pci_subsys_8086_27a6_17aa_201a, 0};
 #undef pci_ss_info_17aa_201a
@@ -44248,6 +45017,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27b8_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27b8_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27b8_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27b9_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27b9_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27b9_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27b9_10f7_8338 =
 	{0x10f7, 0x8338, pci_subsys_8086_27b9_10f7_8338, 0};
 #undef pci_ss_info_10f7_8338
@@ -44268,6 +45041,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27c5_17aa_200d =
 	{0x17aa, 0x200d, pci_subsys_8086_27c5_17aa_200d, 0};
 #undef pci_ss_info_17aa_200d
 #define pci_ss_info_17aa_200d pci_ss_info_8086_27c5_17aa_200d
+static const pciSubsystemInfo pci_ss_info_8086_27c8_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27c8_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27c8_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27c8_107b_5048 =
 	{0x107b, 0x5048, pci_subsys_8086_27c8_107b_5048, 0};
 #undef pci_ss_info_107b_5048
@@ -44280,6 +45057,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27c8_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27c8_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27c8_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27c9_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27c9_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27c9_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27c9_107b_5048 =
 	{0x107b, 0x5048, pci_subsys_8086_27c9_107b_5048, 0};
 #undef pci_ss_info_107b_5048
@@ -44292,6 +45073,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27c9_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27c9_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27c9_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27ca_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27ca_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27ca_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27ca_107b_5048 =
 	{0x107b, 0x5048, pci_subsys_8086_27ca_107b_5048, 0};
 #undef pci_ss_info_107b_5048
@@ -44304,6 +45089,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27ca_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27ca_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27ca_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27cb_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27cb_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27cb_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27cb_107b_5048 =
 	{0x107b, 0x5048, pci_subsys_8086_27cb_107b_5048, 0};
 #undef pci_ss_info_107b_5048
@@ -44316,6 +45105,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27cb_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27cb_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27cb_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27cc_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27cc_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27cc_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27cc_17aa_200b =
 	{0x17aa, 0x200b, pci_subsys_8086_27cc_17aa_200b, 0};
 #undef pci_ss_info_17aa_200b
@@ -44324,6 +45117,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27cc_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27cc_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27cc_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27d8_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27d8_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27d8_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27d8_107b_5048 =
 	{0x107b, 0x5048, pci_subsys_8086_27d8_107b_5048, 0};
 #undef pci_ss_info_107b_5048
@@ -44340,6 +45137,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27d8_152d_0753 =
 	{0x152d, 0x0753, pci_subsys_8086_27d8_152d_0753, 0};
 #undef pci_ss_info_152d_0753
 #define pci_ss_info_152d_0753 pci_ss_info_8086_27d8_152d_0753
+static const pciSubsystemInfo pci_ss_info_8086_27d8_1734_10ad =
+	{0x1734, 0x10ad, pci_subsys_8086_27d8_1734_10ad, 0};
+#undef pci_ss_info_1734_10ad
+#define pci_ss_info_1734_10ad pci_ss_info_8086_27d8_1734_10ad
 static const pciSubsystemInfo pci_ss_info_8086_27d8_17aa_2010 =
 	{0x17aa, 0x2010, pci_subsys_8086_27d8_17aa_2010, 0};
 #undef pci_ss_info_17aa_2010
@@ -44360,6 +45161,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27dc_8086_308d =
 	{0x8086, 0x308d, pci_subsys_8086_27dc_8086_308d, 0};
 #undef pci_ss_info_8086_308d
 #define pci_ss_info_8086_308d pci_ss_info_8086_27dc_8086_308d
+static const pciSubsystemInfo pci_ss_info_8086_27df_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27df_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27df_103c_30a1
 static const pciSubsystemInfo pci_ss_info_8086_27df_107b_5048 =
 	{0x107b, 0x5048, pci_subsys_8086_27df_107b_5048, 0};
 #undef pci_ss_info_107b_5048
@@ -44616,6 +45421,14 @@ static const pciSubsystemInfo pci_ss_info_8086_359e_1028_0169 =
 	{0x1028, 0x0169, pci_subsys_8086_359e_1028_0169, 0};
 #undef pci_ss_info_1028_0169
 #define pci_ss_info_1028_0169 pci_ss_info_8086_359e_1028_0169
+static const pciSubsystemInfo pci_ss_info_8086_4220_2731_8086 =
+	{0x2731, 0x8086, pci_subsys_8086_4220_2731_8086, 0};
+#undef pci_ss_info_2731_8086
+#define pci_ss_info_2731_8086 pci_ss_info_8086_4220_2731_8086
+static const pciSubsystemInfo pci_ss_info_8086_4220_8086_2731 =
+	{0x8086, 0x2731, pci_subsys_8086_4220_8086_2731, 0};
+#undef pci_ss_info_8086_2731
+#define pci_ss_info_8086_2731 pci_ss_info_8086_4220_8086_2731
 static const pciSubsystemInfo pci_ss_info_8086_4222_8086_1005 =
 	{0x8086, 0x1005, pci_subsys_8086_4222_8086_1005, 0};
 #undef pci_ss_info_8086_1005
@@ -45426,6 +46239,22 @@ static const pciSubsystemInfo pci_ss_info_e159_0001_8086_0003 =
 #define pci_ss_info_8086_0003 pci_ss_info_e159_0001_8086_0003
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
+#define pci_ss_list_001c_0001 NULL
+#define pci_ss_list_0070_0003 NULL
+#define pci_ss_list_0070_0009 NULL
+#define pci_ss_list_0070_0801 NULL
+#define pci_ss_list_0070_0807 NULL
+#define pci_ss_list_0070_4000 NULL
+#define pci_ss_list_0070_4001 NULL
+#define pci_ss_list_0070_4009 NULL
+#define pci_ss_list_0070_4800 NULL
+#define pci_ss_list_0070_4801 NULL
+#define pci_ss_list_0070_4803 NULL
+#define pci_ss_list_0070_8003 NULL
+#define pci_ss_list_0070_8801 NULL
+#define pci_ss_list_0070_c801 NULL
+#define pci_ss_list_0070_e807 NULL
+#define pci_ss_list_0070_e817 NULL
 #define pci_ss_list_0095_0680 NULL
 #define pci_ss_list_018a_0106 NULL
 #define pci_ss_list_021b_8139 NULL
@@ -45439,6 +46268,7 @@ static const pciSubsystemInfo pci_ss_info_e159_0001_8086_0003 =
 #define pci_ss_list_050d_001a NULL
 #define pci_ss_list_050d_0109 NULL
 #define pci_ss_list_050d_7050 NULL
+#define pci_ss_list_050d_705c NULL
 #define pci_ss_list_05a9_8519 NULL
 #define pci_ss_list_05e3_0701 NULL
 #define pci_ss_list_066f_3410 NULL
@@ -45449,15 +46279,29 @@ static const pciSubsystemInfo pci_ss_info_e159_0001_8086_0003 =
 #define pci_ss_list_0675_1704 NULL
 #define pci_ss_list_067b_2303 NULL
 #define pci_ss_list_067b_3507 NULL
+#define pci_ss_list_07ca_b808 NULL
+#define pci_ss_list_08ff_afe4 NULL
+#define pci_ss_list_093a_010e NULL
+#define pci_ss_list_093a_010f NULL
+#define pci_ss_list_093a_2468 NULL
+#define pci_ss_list_093a_2603 NULL
+#define pci_ss_list_093a_2608 NULL
 #define pci_ss_list_09c1_0704 NULL
+#define pci_ss_list_0ace_1211 NULL
 #define pci_ss_list_0b0b_0105 NULL
 #define pci_ss_list_0b0b_0205 NULL
+#define pci_ss_list_0b0b_0206 NULL
 #define pci_ss_list_0b0b_0305 NULL
 #define pci_ss_list_0b0b_0405 NULL
+#define pci_ss_list_0b0b_0406 NULL
 #define pci_ss_list_0b0b_0505 NULL
 #define pci_ss_list_0b0b_0506 NULL
 #define pci_ss_list_0b0b_0605 NULL
 #define pci_ss_list_0b0b_0705 NULL
+#define pci_ss_list_0b0b_0706 NULL
+#define pci_ss_list_0b0b_0905 NULL
+#define pci_ss_list_0b0b_0906 NULL
+#define pci_ss_list_0b0b_0a06 NULL
 #define pci_ss_list_0b49_064f NULL
 #define pci_ss_list_0ccd_0038 NULL
 #define pci_ss_list_0e11_0001 NULL
@@ -45682,16 +46526,35 @@ static const pciSubsystemInfo *pci_ss_list_1000_0040[] = {
 #define pci_ss_list_1000_0041 NULL
 #define pci_ss_list_1000_0050 NULL
 #define pci_ss_list_1000_0054 NULL
+static const pciSubsystemInfo *pci_ss_list_1000_0055[] = {
+	&pci_ss_info_1000_0055_1033_8336,
+	NULL
+};
 #define pci_ss_list_1000_0056 NULL
 #define pci_ss_list_1000_0058 NULL
 #define pci_ss_list_1000_005a NULL
 #define pci_ss_list_1000_005c NULL
 #define pci_ss_list_1000_005e NULL
 static const pciSubsystemInfo *pci_ss_list_1000_0060[] = {
+	&pci_ss_info_1000_0060_1000_1006,
+	&pci_ss_info_1000_0060_1000_100a,
+	&pci_ss_info_1000_0060_1000_100e,
+	&pci_ss_info_1000_0060_1000_100f,
+	&pci_ss_info_1000_0060_1000_1010,
+	&pci_ss_info_1000_0060_1000_1011,
+	&pci_ss_info_1000_0060_1000_1012,
+	&pci_ss_info_1000_0060_1014_0363,
+	&pci_ss_info_1000_0060_1014_0364,
+	&pci_ss_info_1000_0060_1014_0365,
 	&pci_ss_info_1000_0060_1028_1f0a,
 	&pci_ss_info_1000_0060_1028_1f0b,
 	&pci_ss_info_1000_0060_1028_1f0c,
 	&pci_ss_info_1000_0060_1028_1f0d,
+	&pci_ss_info_1000_0060_1028_1f11,
+	&pci_ss_info_1000_0060_1043_824d,
+	&pci_ss_info_1000_0060_1170_002f,
+	&pci_ss_info_1000_0060_8086_34cc,
+	&pci_ss_info_1000_0060_8086_34cd,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1000_0062[] = {
@@ -45719,6 +46582,9 @@ static const pciSubsystemInfo *pci_ss_list_1000_0408[] = {
 	&pci_ss_info_1000_0408_1025_004d,
 	&pci_ss_info_1000_0408_1028_0001,
 	&pci_ss_info_1000_0408_1028_0002,
+	&pci_ss_info_1000_0408_1028_0012,
+	&pci_ss_info_1000_0408_1028_0015,
+	&pci_ss_info_1000_0408_1028_1f03,
 	&pci_ss_info_1000_0408_1734_1065,
 	&pci_ss_info_1000_0408_8086_0002,
 	NULL
@@ -45736,6 +46602,7 @@ static const pciSubsystemInfo *pci_ss_list_1000_0411[] = {
 	&pci_ss_info_1000_0411_1000_1002,
 	&pci_ss_info_1000_0411_1000_1003,
 	&pci_ss_info_1000_0411_1000_1004,
+	&pci_ss_info_1000_0411_1000_1008,
 	&pci_ss_info_1000_0411_1000_100c,
 	&pci_ss_info_1000_0411_1000_100d,
 	&pci_ss_info_1000_0411_1000_2004,
@@ -45965,8 +46832,16 @@ static const pciSubsystemInfo *pci_ss_list_1002_4378[] = {
 	NULL
 };
 #define pci_ss_list_1002_4379 NULL
-#define pci_ss_list_1002_437a NULL
-#define pci_ss_list_1002_437b NULL
+static const pciSubsystemInfo *pci_ss_list_1002_437a[] = {
+	&pci_ss_info_1002_437a_1002_4379,
+	&pci_ss_info_1002_437a_1002_437a,
+	&pci_ss_info_1002_437a_14f1_8800,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1002_437b[] = {
+	&pci_ss_info_1002_437b_1734_10b8,
+	NULL
+};
 #define pci_ss_list_1002_4380 NULL
 #define pci_ss_list_1002_4381 NULL
 #define pci_ss_list_1002_4382 NULL
@@ -46055,6 +46930,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_4752[] = {
 	&pci_ss_info_1002_4752_1734_007a,
 	&pci_ss_info_1002_4752_8086_3411,
 	&pci_ss_info_1002_4752_8086_3427,
+	&pci_ss_info_1002_4752_8086_5744,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4753[] = {
@@ -46213,12 +47089,16 @@ static const pciSubsystemInfo *pci_ss_list_1002_4e50[] = {
 	&pci_ss_info_1002_4e50_1025_005a,
 	&pci_ss_info_1002_4e50_103c_088c,
 	&pci_ss_info_1002_4e50_103c_0890,
+	&pci_ss_info_1002_4e50_144d_c00c,
 	&pci_ss_info_1002_4e50_1462_0311,
 	&pci_ss_info_1002_4e50_1734_1055,
 	NULL
 };
 #define pci_ss_list_1002_4e51 NULL
-#define pci_ss_list_1002_4e52 NULL
+static const pciSubsystemInfo *pci_ss_list_1002_4e52[] = {
+	&pci_ss_info_1002_4e52_144d_c00c,
+	NULL
+};
 #define pci_ss_list_1002_4e53 NULL
 #define pci_ss_list_1002_4e54 NULL
 #define pci_ss_list_1002_4e56 NULL
@@ -46482,6 +47362,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_5950[] = {
 	NULL
 };
 #define pci_ss_list_1002_5951 NULL
+#define pci_ss_list_1002_5952 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5954[] = {
 	&pci_ss_info_1002_5954_1002_5954,
 	NULL
@@ -46506,6 +47387,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_5961[] = {
 };
 #define pci_ss_list_1002_5962 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5964[] = {
+	&pci_ss_info_1002_5964_1002_5964,
 	&pci_ss_info_1002_5964_1043_c006,
 	&pci_ss_info_1002_5964_1458_4018,
 	&pci_ss_info_1002_5964_1458_4032,
@@ -46524,6 +47406,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_5964[] = {
 #define pci_ss_list_1002_5a33 NULL
 #define pci_ss_list_1002_5a34 NULL
 #define pci_ss_list_1002_5a36 NULL
+#define pci_ss_list_1002_5a37 NULL
 #define pci_ss_list_1002_5a38 NULL
 #define pci_ss_list_1002_5a39 NULL
 #define pci_ss_list_1002_5a3f NULL
@@ -46554,6 +47437,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_5b70[] = {
 #define pci_ss_list_1002_5c61 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5c63[] = {
 	&pci_ss_info_1002_5c63_1002_5c63,
+	&pci_ss_info_1002_5c63_144d_c00c,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_5d44[] = {
@@ -46626,11 +47510,13 @@ static const pciSubsystemInfo *pci_ss_list_1002_7142[] = {
 	&pci_ss_info_1002_7142_1002_0322,
 	NULL
 };
+#define pci_ss_list_1002_7143 NULL
 #define pci_ss_list_1002_7145 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_7146[] = {
 	&pci_ss_info_1002_7146_1002_0322,
 	NULL
 };
+#define pci_ss_list_1002_7147 NULL
 #define pci_ss_list_1002_7149 NULL
 #define pci_ss_list_1002_714a NULL
 #define pci_ss_list_1002_714b NULL
@@ -46638,7 +47524,9 @@ static const pciSubsystemInfo *pci_ss_list_1002_7146[] = {
 #define pci_ss_list_1002_714d NULL
 #define pci_ss_list_1002_714e NULL
 #define pci_ss_list_1002_7152 NULL
+#define pci_ss_list_1002_7153 NULL
 #define pci_ss_list_1002_715e NULL
+#define pci_ss_list_1002_715f NULL
 static const pciSubsystemInfo *pci_ss_list_1002_7162[] = {
 	&pci_ss_info_1002_7162_1002_0323,
 	NULL
@@ -46648,10 +47536,23 @@ static const pciSubsystemInfo *pci_ss_list_1002_7166[] = {
 	NULL
 };
 #define pci_ss_list_1002_7172 NULL
+#define pci_ss_list_1002_7173 NULL
 #define pci_ss_list_1002_7180 NULL
 #define pci_ss_list_1002_7181 NULL
+#define pci_ss_list_1002_7183 NULL
+#define pci_ss_list_1002_7187 NULL
+#define pci_ss_list_1002_7188 NULL
+#define pci_ss_list_1002_718a NULL
+#define pci_ss_list_1002_718c NULL
+#define pci_ss_list_1002_718d NULL
+#define pci_ss_list_1002_7193 NULL
+#define pci_ss_list_1002_719b NULL
+#define pci_ss_list_1002_719f NULL
 #define pci_ss_list_1002_71a0 NULL
 #define pci_ss_list_1002_71a1 NULL
+#define pci_ss_list_1002_71a3 NULL
+#define pci_ss_list_1002_71a7 NULL
+#define pci_ss_list_1002_71bb NULL
 #define pci_ss_list_1002_71c0 NULL
 #define pci_ss_list_1002_71c2 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_71c4[] = {
@@ -46660,12 +47561,16 @@ static const pciSubsystemInfo *pci_ss_list_1002_71c4[] = {
 };
 #define pci_ss_list_1002_71c5 NULL
 #define pci_ss_list_1002_71c6 NULL
+#define pci_ss_list_1002_71c7 NULL
 #define pci_ss_list_1002_71ce NULL
 #define pci_ss_list_1002_71d5 NULL
 #define pci_ss_list_1002_71d6 NULL
 #define pci_ss_list_1002_71de NULL
 #define pci_ss_list_1002_71e0 NULL
 #define pci_ss_list_1002_71e2 NULL
+#define pci_ss_list_1002_71e7 NULL
+#define pci_ss_list_1002_7210 NULL
+#define pci_ss_list_1002_7211 NULL
 #define pci_ss_list_1002_7240 NULL
 #define pci_ss_list_1002_7241 NULL
 #define pci_ss_list_1002_7242 NULL
@@ -46677,16 +47582,32 @@ static const pciSubsystemInfo *pci_ss_list_1002_71c4[] = {
 #define pci_ss_list_1002_7248 NULL
 #define pci_ss_list_1002_7249 NULL
 #define pci_ss_list_1002_724a NULL
-#define pci_ss_list_1002_724b NULL
+static const pciSubsystemInfo *pci_ss_list_1002_724b[] = {
+	&pci_ss_info_1002_724b_1002_0b12,
+	&pci_ss_info_1002_724b_1002_0b13,
+	NULL
+};
 #define pci_ss_list_1002_724c NULL
 #define pci_ss_list_1002_724d NULL
 #define pci_ss_list_1002_724e NULL
 #define pci_ss_list_1002_7269 NULL
+#define pci_ss_list_1002_726b NULL
 #define pci_ss_list_1002_726e NULL
+#define pci_ss_list_1002_7280 NULL
+#define pci_ss_list_1002_7288 NULL
+#define pci_ss_list_1002_7291 NULL
+#define pci_ss_list_1002_7293 NULL
+#define pci_ss_list_1002_72a0 NULL
+#define pci_ss_list_1002_72a8 NULL
+#define pci_ss_list_1002_72b1 NULL
+#define pci_ss_list_1002_72b3 NULL
 #define pci_ss_list_1002_7833 NULL
 #define pci_ss_list_1002_7834 NULL
 #define pci_ss_list_1002_7835 NULL
 #define pci_ss_list_1002_7838 NULL
+#define pci_ss_list_1002_791e NULL
+#define pci_ss_list_1002_791f NULL
+#define pci_ss_list_1002_793f NULL
 #define pci_ss_list_1002_7c37 NULL
 #define pci_ss_list_1002_cab0 NULL
 #define pci_ss_list_1002_cab2 NULL
@@ -47178,6 +48099,7 @@ static const pciSubsystemInfo *pci_ss_list_1022_2001[] = {
 #define pci_ss_list_1022_2003 NULL
 #define pci_ss_list_1022_2020 NULL
 #define pci_ss_list_1022_2040 NULL
+#define pci_ss_list_1022_2080 NULL
 #define pci_ss_list_1022_2081 NULL
 #define pci_ss_list_1022_2082 NULL
 #define pci_ss_list_1022_208f NULL
@@ -47404,17 +48326,28 @@ static const pciSubsystemInfo *pci_ss_list_1028_0001[] = {
 };
 static const pciSubsystemInfo *pci_ss_list_1028_0002[] = {
 	&pci_ss_info_1028_0002_1028_0002,
+	&pci_ss_info_1028_0002_1028_00d1,
+	&pci_ss_info_1028_0002_1028_00d9,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1028_0003[] = {
 	&pci_ss_info_1028_0003_1028_0003,
 	NULL
 };
+static const pciSubsystemInfo *pci_ss_list_1028_0004[] = {
+	&pci_ss_info_1028_0004_1028_0004,
+	NULL
+};
 #define pci_ss_list_1028_0006 NULL
 #define pci_ss_list_1028_0007 NULL
 #define pci_ss_list_1028_0008 NULL
 #define pci_ss_list_1028_0009 NULL
-#define pci_ss_list_1028_000a NULL
+static const pciSubsystemInfo *pci_ss_list_1028_000a[] = {
+	&pci_ss_info_1028_000a_1028_0106,
+	&pci_ss_info_1028_000a_1028_011b,
+	&pci_ss_info_1028_000a_1028_0121,
+	NULL
+};
 #define pci_ss_list_1028_000c NULL
 #define pci_ss_list_1028_000d NULL
 #define pci_ss_list_1028_000e NULL
@@ -47431,7 +48364,12 @@ static const pciSubsystemInfo *pci_ss_list_1028_0013[] = {
 	NULL
 };
 #define pci_ss_list_1028_0014 NULL
-#define pci_ss_list_1028_0015 NULL
+static const pciSubsystemInfo *pci_ss_list_1028_0015[] = {
+	&pci_ss_info_1028_0015_1028_1f01,
+	&pci_ss_info_1028_0015_1028_1f02,
+	NULL
+};
+#define pci_ss_list_1028_1f03 NULL
 #define pci_ss_list_102a_0000 NULL
 #define pci_ss_list_102a_0010 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -47665,6 +48603,7 @@ static const pciSubsystemInfo *pci_ss_list_102f_0020[] = {
 };
 #define pci_ss_list_102f_0030 NULL
 #define pci_ss_list_102f_0031 NULL
+#define pci_ss_list_102f_0032 NULL
 #define pci_ss_list_102f_0105 NULL
 #define pci_ss_list_102f_0106 NULL
 #define pci_ss_list_102f_0107 NULL
@@ -47813,6 +48752,7 @@ static const pciSubsystemInfo *pci_ss_list_1039_0900[] = {
 	&pci_ss_info_1039_0900_1019_0a14,
 	&pci_ss_info_1039_0900_1039_0900,
 	&pci_ss_info_1039_0900_1043_8035,
+	&pci_ss_info_1039_0900_1462_0900,
 	NULL
 };
 #define pci_ss_list_1039_0961 NULL
@@ -47837,6 +48777,7 @@ static const pciSubsystemInfo *pci_ss_list_1039_5513[] = {
 	&pci_ss_info_1039_5513_1019_0970,
 	&pci_ss_info_1039_5513_1039_5513,
 	&pci_ss_info_1039_5513_1043_8035,
+	&pci_ss_info_1039_5513_1462_7010,
 	NULL
 };
 #define pci_ss_list_1039_5517 NULL
@@ -47879,14 +48820,20 @@ static const pciSubsystemInfo *pci_ss_list_1039_7001[] = {
 	&pci_ss_info_1039_7001_1019_0a14,
 	&pci_ss_info_1039_7001_1039_7000,
 	&pci_ss_info_1039_7001_1462_5470,
+	&pci_ss_info_1039_7001_1462_7010,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1039_7002[] = {
+	&pci_ss_info_1039_7002_1462_7010,
 	&pci_ss_info_1039_7002_1509_7002,
 	NULL
 };
-#define pci_ss_list_1039_7007 NULL
+static const pciSubsystemInfo *pci_ss_list_1039_7007[] = {
+	&pci_ss_info_1039_7007_1462_701d,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_1039_7012[] = {
+	&pci_ss_info_1039_7012_1462_7010,
 	&pci_ss_info_1039_7012_15bd_1001,
 	NULL
 };
@@ -47984,10 +48931,13 @@ static const pciSubsystemInfo *pci_ss_list_103c_1048[] = {
 #define pci_ss_list_103c_12ee NULL
 #define pci_ss_list_103c_12f8 NULL
 #define pci_ss_list_103c_12fa NULL
+#define pci_ss_list_103c_1302 NULL
+#define pci_ss_list_103c_1303 NULL
 #define pci_ss_list_103c_2910 NULL
 #define pci_ss_list_103c_2925 NULL
 #define pci_ss_list_103c_3080 NULL
 #define pci_ss_list_103c_3085 NULL
+#define pci_ss_list_103c_30b5 NULL
 static const pciSubsystemInfo *pci_ss_list_103c_3220[] = {
 	&pci_ss_info_103c_3220_103c_3225,
 	NULL
@@ -48023,8 +48973,10 @@ static const pciSubsystemInfo *pci_ss_list_1043_0675[] = {
 #define pci_ss_list_1043_80c5 NULL
 #define pci_ss_list_1043_80df NULL
 #define pci_ss_list_1043_815a NULL
+#define pci_ss_list_1043_8168 NULL
 #define pci_ss_list_1043_8187 NULL
 #define pci_ss_list_1043_8188 NULL
+#define pci_ss_list_1043_81f4 NULL
 #endif
 #define pci_ss_list_1044_1012 NULL
 #define pci_ss_list_1044_a400 NULL
@@ -48190,6 +49142,7 @@ static const pciSubsystemInfo *pci_ss_list_104c_8021[] = {
 static const pciSubsystemInfo *pci_ss_list_104c_8023[] = {
 	&pci_ss_info_104c_8023_103c_088c,
 	&pci_ss_info_104c_8023_1043_808b,
+	&pci_ss_info_104c_8023_1043_815b,
 	NULL
 };
 #define pci_ss_list_104c_8024 NULL
@@ -48251,10 +49204,12 @@ static const pciSubsystemInfo *pci_ss_list_104c_8035[] = {
 #define pci_ss_list_104c_8038 NULL
 static const pciSubsystemInfo *pci_ss_list_104c_8039[] = {
 	&pci_ss_info_104c_8039_103c_309f,
+	&pci_ss_info_104c_8039_103c_30a1,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_803a[] = {
 	&pci_ss_info_104c_803a_103c_309f,
+	&pci_ss_info_104c_803a_103c_30a1,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_803b[] = {
@@ -48267,6 +49222,7 @@ static const pciSubsystemInfo *pci_ss_list_104c_803c[] = {
 };
 static const pciSubsystemInfo *pci_ss_list_104c_803d[] = {
 	&pci_ss_info_104c_803d_103c_309f,
+	&pci_ss_info_104c_803d_103c_30a1,
 	NULL
 };
 #define pci_ss_list_104c_8201 NULL
@@ -48342,6 +49298,7 @@ static const pciSubsystemInfo *pci_ss_list_104c_ac42[] = {
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_ac44[] = {
+	&pci_ss_info_104c_ac44_1028_0149,
 	&pci_ss_info_104c_ac44_1028_0163,
 	&pci_ss_info_104c_ac44_1028_0196,
 	&pci_ss_info_104c_ac44_1071_8160,
@@ -48397,7 +49354,10 @@ static const pciSubsystemInfo *pci_ss_list_104c_ac60[] = {
 };
 #define pci_ss_list_104c_ac8d NULL
 #define pci_ss_list_104c_ac8e NULL
-#define pci_ss_list_104c_ac8f NULL
+static const pciSubsystemInfo *pci_ss_list_104c_ac8f[] = {
+	&pci_ss_info_104c_ac8f_1028_018d,
+	NULL
+};
 #define pci_ss_list_104c_fe00 NULL
 #define pci_ss_list_104c_fe03 NULL
 #define pci_ss_list_104d_8004 NULL
@@ -48479,6 +49439,7 @@ static const pciSubsystemInfo *pci_ss_list_1057_1801[] = {
 };
 #define pci_ss_list_1057_18c0 NULL
 #define pci_ss_list_1057_18c1 NULL
+#define pci_ss_list_1057_3052 NULL
 #define pci_ss_list_1057_3055 NULL
 static const pciSubsystemInfo *pci_ss_list_1057_3410[] = {
 	&pci_ss_info_1057_3410_ecc0_0050,
@@ -48529,6 +49490,7 @@ static const pciSubsystemInfo *pci_ss_list_1057_5600[] = {
 #define pci_ss_list_1057_6405 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_105a_0d30[] = {
+	&pci_ss_info_105a_0d30_1043_8042,
 	&pci_ss_info_105a_0d30_105a_4d33,
 	NULL
 };
@@ -48567,6 +49529,7 @@ static const pciSubsystemInfo *pci_ss_list_105a_3376[] = {
 static const pciSubsystemInfo *pci_ss_list_105a_4d30[] = {
 	&pci_ss_info_105a_4d30_105a_4d33,
 	&pci_ss_info_105a_4d30_105a_4d39,
+	&pci_ss_info_105a_4d30_8086_5744,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_105a_4d33[] = {
@@ -48611,7 +49574,14 @@ static const pciSubsystemInfo *pci_ss_list_105a_6269[] = {
 #define pci_ss_list_105a_7275 NULL
 #define pci_ss_list_105a_8002 NULL
 #define pci_ss_list_105a_8350 NULL
+static const pciSubsystemInfo *pci_ss_list_105a_8650[] = {
+	&pci_ss_info_105a_8650_105a_4600,
+	&pci_ss_info_105a_8650_105a_8601,
+	&pci_ss_info_105a_8650_105a_8602,
+	NULL
+};
 #define pci_ss_list_105a_c350 NULL
+#define pci_ss_list_105a_e350 NULL
 #endif
 #define pci_ss_list_105d_2309 NULL
 static const pciSubsystemInfo *pci_ss_list_105d_2339[] = {
@@ -48837,6 +49807,7 @@ static const pciSubsystemInfo *pci_ss_list_1073_0012[] = {
 	NULL
 };
 #define pci_ss_list_1073_0020 NULL
+#define pci_ss_list_1073_1000 NULL
 static const pciSubsystemInfo *pci_ss_list_1073_2000[] = {
 	&pci_ss_info_1073_2000_1073_2000,
 	NULL
@@ -49185,6 +50156,7 @@ static const pciSubsystemInfo *pci_ss_list_109e_0878[] = {
 	&pci_ss_info_109e_0878_13e9_0070,
 	&pci_ss_info_109e_0878_144f_3000,
 	&pci_ss_info_109e_0878_1461_0002,
+	&pci_ss_info_109e_0878_1461_0003,
 	&pci_ss_info_109e_0878_1461_0004,
 	&pci_ss_info_109e_0878_1461_0761,
 	&pci_ss_info_109e_0878_1461_0771,
@@ -49269,6 +50241,8 @@ static const pciSubsystemInfo *pci_ss_list_10a9_0009[] = {
 #define pci_ss_list_10a9_4002 NULL
 #define pci_ss_list_10a9_8001 NULL
 #define pci_ss_list_10a9_8002 NULL
+#define pci_ss_list_10a9_8010 NULL
+#define pci_ss_list_10a9_8018 NULL
 #endif
 #define pci_ss_list_10aa_0000 NULL
 #define pci_ss_list_10ad_0001 NULL
@@ -49320,6 +50294,7 @@ static const pciSubsystemInfo *pci_ss_list_10b5_9030[] = {
 	&pci_ss_info_10b5_9030_10b5_2978,
 	&pci_ss_info_10b5_9030_10b5_3025,
 	&pci_ss_info_10b5_9030_10b5_3068,
+	&pci_ss_info_10b5_9030_12fe_0111,
 	&pci_ss_info_10b5_9030_1397_3136,
 	&pci_ss_info_10b5_9030_1397_3137,
 	&pci_ss_info_10b5_9030_1518_0200,
@@ -49378,6 +50353,7 @@ static const pciSubsystemInfo *pci_ss_list_10b5_9054[] = {
 	&pci_ss_info_10b5_9054_10b5_2844,
 	&pci_ss_info_10b5_9054_12c7_4001,
 	&pci_ss_info_10b5_9054_12d9_0002,
+	&pci_ss_info_10b5_9054_14b4_d100,
 	&pci_ss_info_10b5_9054_16df_0011,
 	&pci_ss_info_10b5_9054_16df_0012,
 	&pci_ss_info_10b5_9054_16df_0013,
@@ -52258,6 +53234,7 @@ static const pciSubsystemInfo *pci_ss_list_1166_0132[] = {
 #define pci_ss_list_1166_0140 NULL
 #define pci_ss_list_1166_0141 NULL
 #define pci_ss_list_1166_0142 NULL
+#define pci_ss_list_1166_0144 NULL
 #define pci_ss_list_1166_0200 NULL
 static const pciSubsystemInfo *pci_ss_list_1166_0201[] = {
 	&pci_ss_info_1166_0201_4c53_1080,
@@ -56345,6 +57322,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1229[] = {
 	&pci_ss_info_8086_1229_8086_0006,
 	&pci_ss_info_8086_1229_8086_0007,
 	&pci_ss_info_8086_1229_8086_0008,
+	&pci_ss_info_8086_1229_8086_0009,
 	&pci_ss_info_8086_1229_8086_000a,
 	&pci_ss_info_8086_1229_8086_000b,
 	&pci_ss_info_8086_1229_8086_000c,
@@ -56420,6 +57398,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1229[] = {
 	&pci_ss_info_8086_1229_8086_3010,
 	&pci_ss_info_8086_1229_8086_3011,
 	&pci_ss_info_8086_1229_8086_3012,
+	&pci_ss_info_8086_1229_8086_301a,
 	&pci_ss_info_8086_1229_8086_3411,
 	NULL
 };
@@ -56524,7 +57503,10 @@ static const pciSubsystemInfo *pci_ss_list_8086_2425[] = {
 };
 #define pci_ss_list_8086_2426 NULL
 #define pci_ss_list_8086_2428 NULL
-#define pci_ss_list_8086_2440 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_2440[] = {
+	&pci_ss_info_8086_2440_8086_5744,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_8086_2442[] = {
 	&pci_ss_info_8086_2442_1014_01c6,
 	&pci_ss_info_8086_2442_1025_1016,
@@ -56535,6 +57517,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_2442[] = {
 	&pci_ss_info_8086_2442_147b_0507,
 	&pci_ss_info_8086_2442_8086_4532,
 	&pci_ss_info_8086_2442_8086_4557,
+	&pci_ss_info_8086_2442_8086_5744,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2443[] = {
@@ -56547,6 +57530,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_2443[] = {
 	&pci_ss_info_8086_2443_147b_0507,
 	&pci_ss_info_8086_2443_8086_4532,
 	&pci_ss_info_8086_2443_8086_4557,
+	&pci_ss_info_8086_2443_8086_5744,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2444[] = {
@@ -56557,6 +57541,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_2444[] = {
 	&pci_ss_info_8086_2444_104d_80df,
 	&pci_ss_info_8086_2444_147b_0507,
 	&pci_ss_info_8086_2444_8086_4532,
+	&pci_ss_info_8086_2444_8086_5744,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2445[] = {
@@ -56627,6 +57612,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_244b[] = {
 	&pci_ss_info_8086_244b_147b_0507,
 	&pci_ss_info_8086_244b_8086_4532,
 	&pci_ss_info_8086_244b_8086_4557,
+	&pci_ss_info_8086_244b_8086_5744,
 	NULL
 };
 #define pci_ss_list_8086_244c NULL
@@ -56743,6 +57729,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_24c3[] = {
 	&pci_ss_info_8086_24c3_103c_0890,
 	&pci_ss_info_8086_24c3_103c_08b0,
 	&pci_ss_info_8086_24c3_1071_8160,
+	&pci_ss_info_8086_24c3_144d_c00c,
 	&pci_ss_info_8086_24c3_1458_24c2,
 	&pci_ss_info_8086_24c3_1462_5800,
 	&pci_ss_info_8086_24c3_1734_1004,
@@ -57438,15 +58425,18 @@ static const pciSubsystemInfo *pci_ss_list_8086_2792[] = {
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27a0[] = {
+	&pci_ss_info_8086_27a0_103c_30a1,
 	&pci_ss_info_8086_27a0_17aa_2017,
 	NULL
 };
 #define pci_ss_list_8086_27a1 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_27a2[] = {
+	&pci_ss_info_8086_27a2_103c_30a1,
 	&pci_ss_info_8086_27a2_17aa_201a,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27a6[] = {
+	&pci_ss_info_8086_27a6_103c_30a1,
 	&pci_ss_info_8086_27a6_17aa_201a,
 	NULL
 };
@@ -57457,6 +58447,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_27b8[] = {
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27b9[] = {
+	&pci_ss_info_8086_27b9_103c_30a1,
 	&pci_ss_info_8086_27b9_10f7_8338,
 	&pci_ss_info_8086_27b9_17aa_2009,
 	NULL
@@ -57476,30 +58467,35 @@ static const pciSubsystemInfo *pci_ss_list_8086_27c5[] = {
 };
 #define pci_ss_list_8086_27c6 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_27c8[] = {
+	&pci_ss_info_8086_27c8_103c_30a1,
 	&pci_ss_info_8086_27c8_107b_5048,
 	&pci_ss_info_8086_27c8_17aa_200a,
 	&pci_ss_info_8086_27c8_8086_544e,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27c9[] = {
+	&pci_ss_info_8086_27c9_103c_30a1,
 	&pci_ss_info_8086_27c9_107b_5048,
 	&pci_ss_info_8086_27c9_17aa_200a,
 	&pci_ss_info_8086_27c9_8086_544e,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27ca[] = {
+	&pci_ss_info_8086_27ca_103c_30a1,
 	&pci_ss_info_8086_27ca_107b_5048,
 	&pci_ss_info_8086_27ca_17aa_200a,
 	&pci_ss_info_8086_27ca_8086_544e,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27cb[] = {
+	&pci_ss_info_8086_27cb_103c_30a1,
 	&pci_ss_info_8086_27cb_107b_5048,
 	&pci_ss_info_8086_27cb_17aa_200a,
 	&pci_ss_info_8086_27cb_8086_544e,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27cc[] = {
+	&pci_ss_info_8086_27cc_103c_30a1,
 	&pci_ss_info_8086_27cc_17aa_200b,
 	&pci_ss_info_8086_27cc_8086_544e,
 	NULL
@@ -57509,10 +58505,12 @@ static const pciSubsystemInfo *pci_ss_list_8086_27cc[] = {
 #define pci_ss_list_8086_27d4 NULL
 #define pci_ss_list_8086_27d6 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_27d8[] = {
+	&pci_ss_info_8086_27d8_103c_30a1,
 	&pci_ss_info_8086_27d8_107b_5048,
 	&pci_ss_info_8086_27d8_10f7_8338,
 	&pci_ss_info_8086_27d8_1179_ff31,
 	&pci_ss_info_8086_27d8_152d_0753,
+	&pci_ss_info_8086_27d8_1734_10ad,
 	&pci_ss_info_8086_27d8_17aa_2010,
 	NULL
 };
@@ -57529,6 +58527,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_27dc[] = {
 #define pci_ss_list_8086_27dd NULL
 #define pci_ss_list_8086_27de NULL
 static const pciSubsystemInfo *pci_ss_list_8086_27df[] = {
+	&pci_ss_info_8086_27df_103c_30a1,
 	&pci_ss_info_8086_27df_107b_5048,
 	&pci_ss_info_8086_27df_10f7_8338,
 	&pci_ss_info_8086_27df_17aa_200c,
@@ -57588,6 +58587,34 @@ static const pciSubsystemInfo *pci_ss_list_8086_283e[] = {
 #define pci_ss_list_8086_284b NULL
 #define pci_ss_list_8086_284f NULL
 #define pci_ss_list_8086_2850 NULL
+#define pci_ss_list_8086_2910 NULL
+#define pci_ss_list_8086_2920 NULL
+#define pci_ss_list_8086_2921 NULL
+#define pci_ss_list_8086_2922 NULL
+#define pci_ss_list_8086_2923 NULL
+#define pci_ss_list_8086_2925 NULL
+#define pci_ss_list_8086_2926 NULL
+#define pci_ss_list_8086_2928 NULL
+#define pci_ss_list_8086_292d NULL
+#define pci_ss_list_8086_292e NULL
+#define pci_ss_list_8086_2930 NULL
+#define pci_ss_list_8086_2932 NULL
+#define pci_ss_list_8086_2934 NULL
+#define pci_ss_list_8086_2935 NULL
+#define pci_ss_list_8086_2936 NULL
+#define pci_ss_list_8086_2937 NULL
+#define pci_ss_list_8086_2938 NULL
+#define pci_ss_list_8086_2939 NULL
+#define pci_ss_list_8086_293a NULL
+#define pci_ss_list_8086_293c NULL
+#define pci_ss_list_8086_293e NULL
+#define pci_ss_list_8086_2940 NULL
+#define pci_ss_list_8086_2942 NULL
+#define pci_ss_list_8086_2944 NULL
+#define pci_ss_list_8086_2946 NULL
+#define pci_ss_list_8086_2948 NULL
+#define pci_ss_list_8086_294a NULL
+#define pci_ss_list_8086_294c NULL
 #define pci_ss_list_8086_2970 NULL
 #define pci_ss_list_8086_2971 NULL
 #define pci_ss_list_8086_2972 NULL
@@ -57615,6 +58642,37 @@ static const pciSubsystemInfo *pci_ss_list_8086_283e[] = {
 #define pci_ss_list_8086_29a5 NULL
 #define pci_ss_list_8086_29a6 NULL
 #define pci_ss_list_8086_29a7 NULL
+#define pci_ss_list_8086_29b0 NULL
+#define pci_ss_list_8086_29b1 NULL
+#define pci_ss_list_8086_29b2 NULL
+#define pci_ss_list_8086_29b3 NULL
+#define pci_ss_list_8086_29b4 NULL
+#define pci_ss_list_8086_29b5 NULL
+#define pci_ss_list_8086_29b6 NULL
+#define pci_ss_list_8086_29b7 NULL
+#define pci_ss_list_8086_29c0 NULL
+#define pci_ss_list_8086_29c1 NULL
+#define pci_ss_list_8086_29c2 NULL
+#define pci_ss_list_8086_29c3 NULL
+#define pci_ss_list_8086_29c4 NULL
+#define pci_ss_list_8086_29c5 NULL
+#define pci_ss_list_8086_29c6 NULL
+#define pci_ss_list_8086_29c7 NULL
+#define pci_ss_list_8086_29cf NULL
+#define pci_ss_list_8086_29e0 NULL
+#define pci_ss_list_8086_29e1 NULL
+#define pci_ss_list_8086_29e4 NULL
+#define pci_ss_list_8086_29e5 NULL
+#define pci_ss_list_8086_29e6 NULL
+#define pci_ss_list_8086_29e7 NULL
+#define pci_ss_list_8086_29e9 NULL
+#define pci_ss_list_8086_29f0 NULL
+#define pci_ss_list_8086_29f1 NULL
+#define pci_ss_list_8086_29f4 NULL
+#define pci_ss_list_8086_29f5 NULL
+#define pci_ss_list_8086_29f6 NULL
+#define pci_ss_list_8086_29f7 NULL
+#define pci_ss_list_8086_29f9 NULL
 #define pci_ss_list_8086_2a00 NULL
 #define pci_ss_list_8086_2a01 NULL
 #define pci_ss_list_8086_2a02 NULL
@@ -57748,7 +58806,44 @@ static const pciSubsystemInfo *pci_ss_list_8086_359e[] = {
 #define pci_ss_list_8086_35b6 NULL
 #define pci_ss_list_8086_35b7 NULL
 #define pci_ss_list_8086_35c8 NULL
-#define pci_ss_list_8086_4220 NULL
+#define pci_ss_list_8086_3600 NULL
+#define pci_ss_list_8086_3604 NULL
+#define pci_ss_list_8086_3605 NULL
+#define pci_ss_list_8086_3606 NULL
+#define pci_ss_list_8086_3607 NULL
+#define pci_ss_list_8086_3608 NULL
+#define pci_ss_list_8086_3609 NULL
+#define pci_ss_list_8086_360a NULL
+#define pci_ss_list_8086_360b NULL
+#define pci_ss_list_8086_360c NULL
+#define pci_ss_list_8086_360d NULL
+#define pci_ss_list_8086_360e NULL
+#define pci_ss_list_8086_360f NULL
+#define pci_ss_list_8086_3610 NULL
+#define pci_ss_list_8086_4000 NULL
+#define pci_ss_list_8086_4008 NULL
+#define pci_ss_list_8086_4010 NULL
+#define pci_ss_list_8086_4021 NULL
+#define pci_ss_list_8086_4022 NULL
+#define pci_ss_list_8086_4023 NULL
+#define pci_ss_list_8086_4024 NULL
+#define pci_ss_list_8086_4025 NULL
+#define pci_ss_list_8086_4026 NULL
+#define pci_ss_list_8086_4027 NULL
+#define pci_ss_list_8086_4028 NULL
+#define pci_ss_list_8086_4029 NULL
+#define pci_ss_list_8086_402d NULL
+#define pci_ss_list_8086_402e NULL
+#define pci_ss_list_8086_402f NULL
+#define pci_ss_list_8086_4030 NULL
+#define pci_ss_list_8086_4032 NULL
+#define pci_ss_list_8086_4035 NULL
+#define pci_ss_list_8086_4036 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_4220[] = {
+	&pci_ss_info_8086_4220_2731_8086,
+	&pci_ss_info_8086_4220_8086_2731,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_8086_4222[] = {
 	&pci_ss_info_8086_4222_8086_1005,
 	&pci_ss_info_8086_4222_8086_1034,
@@ -57772,6 +58867,23 @@ static const pciSubsystemInfo *pci_ss_list_8086_5201[] = {
 	NULL
 };
 #define pci_ss_list_8086_530d NULL
+#define pci_ss_list_8086_65c0 NULL
+#define pci_ss_list_8086_65e2 NULL
+#define pci_ss_list_8086_65e3 NULL
+#define pci_ss_list_8086_65e4 NULL
+#define pci_ss_list_8086_65e5 NULL
+#define pci_ss_list_8086_65e6 NULL
+#define pci_ss_list_8086_65e7 NULL
+#define pci_ss_list_8086_65f0 NULL
+#define pci_ss_list_8086_65f1 NULL
+#define pci_ss_list_8086_65f3 NULL
+#define pci_ss_list_8086_65f5 NULL
+#define pci_ss_list_8086_65f6 NULL
+#define pci_ss_list_8086_65f7 NULL
+#define pci_ss_list_8086_65f8 NULL
+#define pci_ss_list_8086_65f9 NULL
+#define pci_ss_list_8086_65fa NULL
+#define pci_ss_list_8086_65ff NULL
 #define pci_ss_list_8086_7000 NULL
 #define pci_ss_list_8086_7010 NULL
 #define pci_ss_list_8086_7020 NULL
@@ -57900,6 +59012,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_8500[] = {
 #define pci_ss_list_8086_9622 NULL
 #define pci_ss_list_8086_9641 NULL
 #define pci_ss_list_8086_96a1 NULL
+#define pci_ss_list_8086_a620 NULL
 #define pci_ss_list_8086_b152 NULL
 #define pci_ss_list_8086_b154 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_b555[] = {
@@ -58379,6 +59492,7 @@ static const pciSubsystemInfo *pci_ss_list_0000[] = {
 };
 #endif
 #define pci_ss_list_001a NULL
+#define pci_ss_list_001c NULL
 #define pci_ss_list_0033 NULL
 static const pciSubsystemInfo *pci_ss_list_003d[] = {
 	&pci_ss_info_003d_0008,
@@ -58456,6 +59570,7 @@ static const pciSubsystemInfo *pci_ss_list_0357[] = {
 	NULL
 };
 #endif
+#define pci_ss_list_0403 NULL
 #define pci_ss_list_0432 NULL
 #define pci_ss_list_045e NULL
 #define pci_ss_list_0482 NULL
@@ -58473,8 +59588,12 @@ static const pciSubsystemInfo *pci_ss_list_0675[] = {
 };
 #endif
 #define pci_ss_list_067b NULL
+#define pci_ss_list_069d NULL
 #define pci_ss_list_0721 NULL
+#define pci_ss_list_07ca NULL
 #define pci_ss_list_07e2 NULL
+#define pci_ss_list_0842 NULL
+#define pci_ss_list_08ff NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_0925[] = {
 	&pci_ss_info_0925_1234,
@@ -58484,6 +59603,7 @@ static const pciSubsystemInfo *pci_ss_list_0925[] = {
 #define pci_ss_list_093a NULL
 #define pci_ss_list_09c1 NULL
 #define pci_ss_list_0a89 NULL
+#define pci_ss_list_0ace NULL
 #define pci_ss_list_0b0b NULL
 #define pci_ss_list_0b49 NULL
 #define pci_ss_list_0ccd NULL
@@ -58635,9 +59755,16 @@ static const pciSubsystemInfo *pci_ss_list_1000[] = {
 	&pci_ss_info_1000_1003,
 	&pci_ss_info_1000_1004,
 	&pci_ss_info_1000_1005,
+	&pci_ss_info_1000_1006,
+	&pci_ss_info_1000_1008,
+	&pci_ss_info_1000_100a,
 	&pci_ss_info_1000_100c,
 	&pci_ss_info_1000_100d,
+	&pci_ss_info_1000_100e,
+	&pci_ss_info_1000_100f,
 	&pci_ss_info_1000_1010,
+	&pci_ss_info_1000_1011,
+	&pci_ss_info_1000_1012,
 	&pci_ss_info_1000_1020,
 	&pci_ss_info_1000_2004,
 	&pci_ss_info_1000_2005,
@@ -58705,6 +59832,8 @@ static const pciSubsystemInfo *pci_ss_list_1002[] = {
 	&pci_ss_info_1002_2001,
 	&pci_ss_info_1002_2f72,
 	&pci_ss_info_1002_4336,
+	&pci_ss_info_1002_4379,
+	&pci_ss_info_1002_437a,
 	&pci_ss_info_1002_4722,
 	&pci_ss_info_1002_4723,
 	&pci_ss_info_1002_4742,
@@ -58728,6 +59857,7 @@ static const pciSubsystemInfo *pci_ss_list_1002[] = {
 	&pci_ss_info_1002_5654,
 	&pci_ss_info_1002_5954,
 	&pci_ss_info_1002_5955,
+	&pci_ss_info_1002_5964,
 	&pci_ss_info_1002_5965,
 	&pci_ss_info_1002_5c63,
 	&pci_ss_info_1002_8001,
@@ -58897,6 +60027,9 @@ static const pciSubsystemInfo *pci_ss_list_1014[] = {
 	&pci_ss_info_1014_02f2,
 	&pci_ss_info_1014_030d,
 	&pci_ss_info_1014_034d,
+	&pci_ss_info_1014_0363,
+	&pci_ss_info_1014_0364,
+	&pci_ss_info_1014_0365,
 	&pci_ss_info_1014_0502,
 	&pci_ss_info_1014_0503,
 	&pci_ss_info_1014_0506,
@@ -59047,6 +60180,9 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = {
 	&pci_ss_info_1028_0001,
 	&pci_ss_info_1028_0002,
 	&pci_ss_info_1028_0003,
+	&pci_ss_info_1028_0004,
+	&pci_ss_info_1028_0012,
+	&pci_ss_info_1028_0015,
 	&pci_ss_info_1028_002e,
 	&pci_ss_info_1028_0074,
 	&pci_ss_info_1028_0075,
@@ -59089,6 +60225,7 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = {
 	&pci_ss_info_1028_0109,
 	&pci_ss_info_1028_010a,
 	&pci_ss_info_1028_010e,
+	&pci_ss_info_1028_011b,
 	&pci_ss_info_1028_011c,
 	&pci_ss_info_1028_011d,
 	&pci_ss_info_1028_0121,
@@ -59098,6 +60235,7 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = {
 	&pci_ss_info_1028_0134,
 	&pci_ss_info_1028_0139,
 	&pci_ss_info_1028_013f,
+	&pci_ss_info_1028_0149,
 	&pci_ss_info_1028_014a,
 	&pci_ss_info_1028_014e,
 	&pci_ss_info_1028_0151,
@@ -59115,6 +60253,7 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = {
 	&pci_ss_info_1028_0183,
 	&pci_ss_info_1028_0187,
 	&pci_ss_info_1028_0188,
+	&pci_ss_info_1028_018d,
 	&pci_ss_info_1028_0196,
 	&pci_ss_info_1028_019a,
 	&pci_ss_info_1028_019d,
@@ -59135,10 +60274,14 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = {
 	&pci_ss_info_1028_1010,
 	&pci_ss_info_1028_1079,
 	&pci_ss_info_1028_1111,
+	&pci_ss_info_1028_1f01,
+	&pci_ss_info_1028_1f02,
+	&pci_ss_info_1028_1f03,
 	&pci_ss_info_1028_1f0a,
 	&pci_ss_info_1028_1f0b,
 	&pci_ss_info_1028_1f0c,
 	&pci_ss_info_1028_1f0d,
+	&pci_ss_info_1028_1f11,
 	&pci_ss_info_1028_4082,
 	&pci_ss_info_1028_4134,
 	&pci_ss_info_1028_8082,
@@ -59309,6 +60452,7 @@ static const pciSubsystemInfo *pci_ss_list_1033[] = {
 	&pci_ss_info_1033_8110,
 	&pci_ss_info_1033_8112,
 	&pci_ss_info_1033_8287,
+	&pci_ss_info_1033_8336,
 	NULL
 };
 #define pci_ss_list_1034 NULL
@@ -59412,6 +60556,7 @@ static const pciSubsystemInfo *pci_ss_list_103c[] = {
 	&pci_ss_info_103c_308a,
 	&pci_ss_info_103c_308b,
 	&pci_ss_info_103c_309f,
+	&pci_ss_info_103c_30a1,
 	&pci_ss_info_103c_3100,
 	&pci_ss_info_103c_3101,
 	&pci_ss_info_103c_3102,
@@ -59549,8 +60694,10 @@ static const pciSubsystemInfo *pci_ss_list_1043[] = {
 	&pci_ss_info_1043_814a,
 	&pci_ss_info_1043_814e,
 	&pci_ss_info_1043_815a,
+	&pci_ss_info_1043_815b,
 	&pci_ss_info_1043_817b,
 	&pci_ss_info_1043_81a6,
+	&pci_ss_info_1043_824d,
 	&pci_ss_info_1043_c002,
 	&pci_ss_info_1043_c003,
 	&pci_ss_info_1043_c004,
@@ -59745,12 +60892,15 @@ static const pciSubsystemInfo *pci_ss_list_105a[] = {
 	&pci_ss_info_105a_0275,
 	&pci_ss_info_105a_1275,
 	&pci_ss_info_105a_2168,
+	&pci_ss_info_105a_4600,
 	&pci_ss_info_105a_4d30,
 	&pci_ss_info_105a_4d33,
 	&pci_ss_info_105a_4d39,
 	&pci_ss_info_105a_4d68,
 	&pci_ss_info_105a_5168,
 	&pci_ss_info_105a_6269,
+	&pci_ss_info_105a_8601,
+	&pci_ss_info_105a_8602,
 	NULL
 };
 #endif
@@ -60850,6 +62000,7 @@ static const pciSubsystemInfo *pci_ss_list_1166[] = {
 #define pci_ss_list_116f NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1170[] = {
+	&pci_ss_info_1170_002f,
 	&pci_ss_info_1170_3209,
 	NULL
 };
@@ -61721,7 +62872,12 @@ static const pciSubsystemInfo *pci_ss_list_12f8[] = {
 #define pci_ss_list_12fb NULL
 #define pci_ss_list_12fc NULL
 #define pci_ss_list_12fd NULL
-#define pci_ss_list_12fe NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_12fe[] = {
+	&pci_ss_info_12fe_0111,
+	NULL
+};
+#endif
 #define pci_ss_list_12ff NULL
 #define pci_ss_list_1300 NULL
 #define pci_ss_list_1302 NULL
@@ -62536,6 +63692,7 @@ static const pciSubsystemInfo *pci_ss_list_1462[] = {
 	&pci_ss_info_1462_052c,
 	&pci_ss_info_1462_058c,
 	&pci_ss_info_1462_0622,
+	&pci_ss_info_1462_0900,
 	&pci_ss_info_1462_1009,
 	&pci_ss_info_1462_207d,
 	&pci_ss_info_1462_3091,
@@ -62567,6 +63724,8 @@ static const pciSubsystemInfo *pci_ss_list_1462[] = {
 	&pci_ss_info_1462_6930,
 	&pci_ss_info_1462_6990,
 	&pci_ss_info_1462_6991,
+	&pci_ss_info_1462_7010,
+	&pci_ss_info_1462_701d,
 	&pci_ss_info_1462_7020,
 	&pci_ss_info_1462_7028,
 	&pci_ss_info_1462_702c,
@@ -62805,7 +63964,12 @@ static const pciSubsystemInfo *pci_ss_list_14af[] = {
 #define pci_ss_list_14b1 NULL
 #define pci_ss_list_14b2 NULL
 #define pci_ss_list_14b3 NULL
-#define pci_ss_list_14b4 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_14b4[] = {
+	&pci_ss_info_14b4_d100,
+	NULL
+};
+#endif
 #define pci_ss_list_14b5 NULL
 #define pci_ss_list_14b6 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -62961,6 +64125,7 @@ static const pciSubsystemInfo *pci_ss_list_14f1[] = {
 	&pci_ss_info_14f1_2004,
 	&pci_ss_info_14f1_2045,
 	&pci_ss_info_14f1_5421,
+	&pci_ss_info_14f1_8800,
 	NULL
 };
 #endif
@@ -63660,6 +64825,8 @@ static const pciSubsystemInfo *pci_ss_list_1734[] = {
 	&pci_ss_info_1734_106c,
 	&pci_ss_info_1734_1081,
 	&pci_ss_info_1734_10a3,
+	&pci_ss_info_1734_10ad,
+	&pci_ss_info_1734_10b8,
 	NULL
 };
 #endif
@@ -64322,6 +65489,7 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = {
 	&pci_ss_info_8086_0006,
 	&pci_ss_info_8086_0007,
 	&pci_ss_info_8086_0008,
+	&pci_ss_info_8086_0009,
 	&pci_ss_info_8086_000a,
 	&pci_ss_info_8086_000b,
 	&pci_ss_info_8086_000c,
@@ -64483,6 +65651,7 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = {
 	&pci_ss_info_8086_2527,
 	&pci_ss_info_8086_2581,
 	&pci_ss_info_8086_265c,
+	&pci_ss_info_8086_2731,
 	&pci_ss_info_8086_3000,
 	&pci_ss_info_8086_3001,
 	&pci_ss_info_8086_3002,
@@ -64498,6 +65667,7 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = {
 	&pci_ss_info_8086_3016,
 	&pci_ss_info_8086_3017,
 	&pci_ss_info_8086_3018,
+	&pci_ss_info_8086_301a,
 	&pci_ss_info_8086_301f,
 	&pci_ss_info_8086_3020,
 	&pci_ss_info_8086_302c,
@@ -64511,6 +65681,8 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = {
 	&pci_ss_info_8086_3431,
 	&pci_ss_info_8086_3439,
 	&pci_ss_info_8086_3499,
+	&pci_ss_info_8086_34cc,
+	&pci_ss_info_8086_34cd,
 	&pci_ss_info_8086_3500,
 	&pci_ss_info_8086_3501,
 	&pci_ss_info_8086_3504,
@@ -64535,6 +65707,7 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = {
 	&pci_ss_info_8086_5352,
 	&pci_ss_info_8086_544e,
 	&pci_ss_info_8086_5643,
+	&pci_ss_info_8086_5744,
 	&pci_ss_info_8086_5753,
 	&pci_ss_info_8086_8000,
 	&pci_ss_info_8086_8181,
@@ -64833,6 +66006,154 @@ static const pciSubsystemInfo *pci_ss_list_ecc0[] = {
 #endif /* INIT_VENDOR_SUBSYS_INFO */
 #endif /* INIT_SUBSYS_INFO */
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_001c_0001 = {
+	0x0001, pci_device_001c_0001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_001c_0001,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_0070_0003 = {
+	0x0003, pci_device_0070_0003,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_0003,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_0009 = {
+	0x0009, pci_device_0070_0009,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_0009,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_0801 = {
+	0x0801, pci_device_0070_0801,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_0801,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_0807 = {
+	0x0807, pci_device_0070_0807,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_0807,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4000 = {
+	0x4000, pci_device_0070_4000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4000,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4001 = {
+	0x4001, pci_device_0070_4001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4001,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4009 = {
+	0x4009, pci_device_0070_4009,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4009,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4800 = {
+	0x4800, pci_device_0070_4800,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4800,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4801 = {
+	0x4801, pci_device_0070_4801,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4801,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4803 = {
+	0x4803, pci_device_0070_4803,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4803,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_8003 = {
+	0x8003, pci_device_0070_8003,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_8003,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_8801 = {
+	0x8801, pci_device_0070_8801,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_8801,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_c801 = {
+	0xc801, pci_device_0070_c801,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_c801,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_e807 = {
+	0xe807, pci_device_0070_e807,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_e807,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_e817 = {
+	0xe817, pci_device_0070_e817,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_e817,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_0095_0680 = {
 	0x0680, pci_device_0095_0680,
 #ifdef INIT_SUBSYS_INFO
@@ -64968,6 +66289,15 @@ static const pciDeviceInfo pci_dev_info_050d_7050 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_050d_705c = {
+	0x705c, pci_device_050d_705c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_050d_705c,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_05a9_8519 = {
@@ -65070,6 +66400,75 @@ static const pciDeviceInfo pci_dev_info_067b_3507 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_07ca_b808 = {
+	0xb808, pci_device_07ca_b808,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_07ca_b808,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_08ff_afe4 = {
+	0xafe4, pci_device_08ff_afe4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_08ff_afe4,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_093a_010e = {
+	0x010e, pci_device_093a_010e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_093a_010e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_093a_010f = {
+	0x010f, pci_device_093a_010f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_093a_010f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_093a_2468 = {
+	0x2468, pci_device_093a_2468,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_093a_2468,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_093a_2603 = {
+	0x2603, pci_device_093a_2603,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_093a_2603,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_093a_2608 = {
+	0x2608, pci_device_093a_2608,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_093a_2608,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_09c1_0704 = {
 	0x0704, pci_device_09c1_0704,
 #ifdef INIT_SUBSYS_INFO
@@ -65081,6 +66480,17 @@ static const pciDeviceInfo pci_dev_info_09c1_0704 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_0ace_1211 = {
+	0x1211, pci_device_0ace_1211,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0ace_1211,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_0b0b_0105 = {
 	0x0105, pci_device_0b0b_0105,
 #ifdef INIT_SUBSYS_INFO
@@ -65099,6 +66509,15 @@ static const pciDeviceInfo pci_dev_info_0b0b_0205 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_0b0b_0206 = {
+	0x0206, pci_device_0b0b_0206,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0206,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_0b0b_0305 = {
 	0x0305, pci_device_0b0b_0305,
 #ifdef INIT_SUBSYS_INFO
@@ -65117,6 +66536,15 @@ static const pciDeviceInfo pci_dev_info_0b0b_0405 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_0b0b_0406 = {
+	0x0406, pci_device_0b0b_0406,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0406,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_0b0b_0505 = {
 	0x0505, pci_device_0b0b_0505,
 #ifdef INIT_SUBSYS_INFO
@@ -65153,6 +66581,42 @@ static const pciDeviceInfo pci_dev_info_0b0b_0705 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_0b0b_0706 = {
+	0x0706, pci_device_0b0b_0706,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0706,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0905 = {
+	0x0905, pci_device_0b0b_0905,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0905,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0906 = {
+	0x0906, pci_device_0b0b_0906,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0906,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0a06 = {
+	0x0a06, pci_device_0b0b_0a06,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0a06,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_0b49_064f = {
@@ -66239,6 +67703,15 @@ static const pciDeviceInfo pci_dev_info_1000_0054 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1000_0055 = {
+	0x0055, pci_device_1000_0055,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1000_0055,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1000_0056 = {
 	0x0056, pci_device_1000_0056,
 #ifdef INIT_SUBSYS_INFO
@@ -69131,6 +70604,15 @@ static const pciDeviceInfo pci_dev_info_1002_5951 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_5952 = {
+	0x5952, pci_device_1002_5952,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_5952,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5954 = {
 	0x5954, pci_device_1002_5954,
 #ifdef INIT_SUBSYS_INFO
@@ -69239,6 +70721,15 @@ static const pciDeviceInfo pci_dev_info_1002_5a36 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_5a37 = {
+	0x5a37, pci_device_1002_5a37,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_5a37,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5a38 = {
 	0x5a38, pci_device_1002_5a38,
 #ifdef INIT_SUBSYS_INFO
@@ -69761,6 +71252,15 @@ static const pciDeviceInfo pci_dev_info_1002_7142 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_7143 = {
+	0x7143, pci_device_1002_7143,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7143,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_7145 = {
 	0x7145, pci_device_1002_7145,
 #ifdef INIT_SUBSYS_INFO
@@ -69779,6 +71279,15 @@ static const pciDeviceInfo pci_dev_info_1002_7146 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_7147 = {
+	0x7147, pci_device_1002_7147,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7147,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_7149 = {
 	0x7149, pci_device_1002_7149,
 #ifdef INIT_SUBSYS_INFO
@@ -69842,6 +71351,15 @@ static const pciDeviceInfo pci_dev_info_1002_7152 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_7153 = {
+	0x7153, pci_device_1002_7153,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7153,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_715e = {
 	0x715e, pci_device_1002_715e,
 #ifdef INIT_SUBSYS_INFO
@@ -69851,6 +71369,15 @@ static const pciDeviceInfo pci_dev_info_1002_715e = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_715f = {
+	0x715f, pci_device_1002_715f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_715f,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_7162 = {
 	0x7162, pci_device_1002_7162,
 #ifdef INIT_SUBSYS_INFO
@@ -69878,6 +71405,15 @@ static const pciDeviceInfo pci_dev_info_1002_7172 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_7173 = {
+	0x7173, pci_device_1002_7173,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7173,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_7180 = {
 	0x7180, pci_device_1002_7180,
 #ifdef INIT_SUBSYS_INFO
@@ -69896,6 +71432,87 @@ static const pciDeviceInfo pci_dev_info_1002_7181 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_7183 = {
+	0x7183, pci_device_1002_7183,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7183,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_7187 = {
+	0x7187, pci_device_1002_7187,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7187,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_7188 = {
+	0x7188, pci_device_1002_7188,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7188,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_718a = {
+	0x718a, pci_device_1002_718a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_718a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_718c = {
+	0x718c, pci_device_1002_718c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_718c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_718d = {
+	0x718d, pci_device_1002_718d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_718d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_7193 = {
+	0x7193, pci_device_1002_7193,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7193,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_719b = {
+	0x719b, pci_device_1002_719b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_719b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_719f = {
+	0x719f, pci_device_1002_719f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_719f,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_71a0 = {
 	0x71a0, pci_device_1002_71a0,
 #ifdef INIT_SUBSYS_INFO
@@ -69914,6 +71531,33 @@ static const pciDeviceInfo pci_dev_info_1002_71a1 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_71a3 = {
+	0x71a3, pci_device_1002_71a3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_71a3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_71a7 = {
+	0x71a7, pci_device_1002_71a7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_71a7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_71bb = {
+	0x71bb, pci_device_1002_71bb,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_71bb,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_71c0 = {
 	0x71c0, pci_device_1002_71c0,
 #ifdef INIT_SUBSYS_INFO
@@ -69959,6 +71603,15 @@ static const pciDeviceInfo pci_dev_info_1002_71c6 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_71c7 = {
+	0x71c7, pci_device_1002_71c7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_71c7,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_71ce = {
 	0x71ce, pci_device_1002_71ce,
 #ifdef INIT_SUBSYS_INFO
@@ -70013,6 +71666,33 @@ static const pciDeviceInfo pci_dev_info_1002_71e2 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_71e7 = {
+	0x71e7, pci_device_1002_71e7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_71e7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_7210 = {
+	0x7210, pci_device_1002_7210,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7210,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_7211 = {
+	0x7211, pci_device_1002_7211,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7211,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_7240 = {
 	0x7240, pci_device_1002_7240,
 #ifdef INIT_SUBSYS_INFO
@@ -70157,6 +71837,15 @@ static const pciDeviceInfo pci_dev_info_1002_7269 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_726b = {
+	0x726b, pci_device_1002_726b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_726b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_726e = {
 	0x726e, pci_device_1002_726e,
 #ifdef INIT_SUBSYS_INFO
@@ -70166,6 +71855,78 @@ static const pciDeviceInfo pci_dev_info_1002_726e = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_7280 = {
+	0x7280, pci_device_1002_7280,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7280,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_7288 = {
+	0x7288, pci_device_1002_7288,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7288,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_7291 = {
+	0x7291, pci_device_1002_7291,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7291,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_7293 = {
+	0x7293, pci_device_1002_7293,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_7293,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_72a0 = {
+	0x72a0, pci_device_1002_72a0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_72a0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_72a8 = {
+	0x72a8, pci_device_1002_72a8,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_72a8,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_72b1 = {
+	0x72b1, pci_device_1002_72b1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_72b1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_72b3 = {
+	0x72b3, pci_device_1002_72b3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_72b3,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_7833 = {
 	0x7833, pci_device_1002_7833,
 #ifdef INIT_SUBSYS_INFO
@@ -70202,6 +71963,33 @@ static const pciDeviceInfo pci_dev_info_1002_7838 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_791e = {
+	0x791e, pci_device_1002_791e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_791e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_791f = {
+	0x791f, pci_device_1002_791f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_791f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_793f = {
+	0x793f, pci_device_1002_793f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_793f,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_7c37 = {
 	0x7c37, pci_device_1002_7c37,
 #ifdef INIT_SUBSYS_INFO
@@ -72376,6 +74164,15 @@ static const pciDeviceInfo pci_dev_info_1022_2040 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1022_2080 = {
+	0x2080, pci_device_1022_2080,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1022_2080,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1022_2081 = {
 	0x2081, pci_device_1022_2081,
 #ifdef INIT_SUBSYS_INFO
@@ -73780,6 +75577,15 @@ static const pciDeviceInfo pci_dev_info_1028_0003 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1028_0004 = {
+	0x0004, pci_device_1028_0004,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1028_0004,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1028_0006 = {
 	0x0006, pci_device_1028_0006,
 #ifdef INIT_SUBSYS_INFO
@@ -73915,6 +75721,15 @@ static const pciDeviceInfo pci_dev_info_1028_0015 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1028_1f03 = {
+	0x1f03, pci_device_1028_1f03,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1028_1f03,
+#else
+	NULL,
+#endif
+	0
+};
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_102a_0000 = {
 	0x0000, pci_device_102a_0000,
@@ -74361,6 +76176,15 @@ static const pciDeviceInfo pci_dev_info_102f_0031 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_102f_0032 = {
+	0x0032, pci_device_102f_0032,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_102f_0032,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_102f_0105 = {
 	0x0105, pci_device_102f_0105,
 #ifdef INIT_SUBSYS_INFO
@@ -76065,6 +77889,24 @@ static const pciDeviceInfo pci_dev_info_103c_12fa = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_103c_1302 = {
+	0x1302, pci_device_103c_1302,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_1302,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_1303 = {
+	0x1303, pci_device_103c_1303,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_1303,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_103c_2910 = {
 	0x2910, pci_device_103c_2910,
 #ifdef INIT_SUBSYS_INFO
@@ -76101,6 +77943,15 @@ static const pciDeviceInfo pci_dev_info_103c_3085 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_103c_30b5 = {
+	0x30b5, pci_device_103c_30b5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_30b5,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_103c_3220 = {
 	0x3220, pci_device_103c_3220,
 #ifdef INIT_SUBSYS_INFO
@@ -76338,6 +78189,15 @@ static const pciDeviceInfo pci_dev_info_1043_815a = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1043_8168 = {
+	0x8168, pci_device_1043_8168,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1043_8168,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1043_8187 = {
 	0x8187, pci_device_1043_8187,
 #ifdef INIT_SUBSYS_INFO
@@ -76356,6 +78216,15 @@ static const pciDeviceInfo pci_dev_info_1043_8188 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1043_81f4 = {
+	0x81f4, pci_device_1043_81f4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1043_81f4,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1044_1012 = {
@@ -77953,6 +79822,15 @@ static const pciDeviceInfo pci_dev_info_1057_18c1 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1057_3052 = {
+	0x3052, pci_device_1057_3052,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1057_3052,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1057_3055 = {
 	0x3055, pci_device_1057_3055,
 #ifdef INIT_SUBSYS_INFO
@@ -78422,6 +80300,15 @@ static const pciDeviceInfo pci_dev_info_105a_8350 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_105a_8650 = {
+	0x8650, pci_device_105a_8650,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_105a_8650,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_105a_c350 = {
 	0xc350, pci_device_105a_c350,
 #ifdef INIT_SUBSYS_INFO
@@ -78431,6 +80318,15 @@ static const pciDeviceInfo pci_dev_info_105a_c350 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_105a_e350 = {
+	0xe350, pci_device_105a_e350,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_105a_e350,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 static const pciDeviceInfo pci_dev_info_105d_2309 = {
 	0x2309, pci_device_105d_2309,
@@ -79610,6 +81506,15 @@ static const pciDeviceInfo pci_dev_info_1073_0020 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1073_1000 = {
+	0x1000, pci_device_1073_1000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1073_1000,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1073_2000 = {
 	0x2000, pci_device_1073_2000,
 #ifdef INIT_SUBSYS_INFO
@@ -81714,6 +83619,24 @@ static const pciDeviceInfo pci_dev_info_10a9_8002 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10a9_8010 = {
+	0x8010, pci_device_10a9_8010,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10a9_8010,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10a9_8018 = {
+	0x8018, pci_device_10a9_8018,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10a9_8018,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_10aa_0000 = {
@@ -95105,6 +97028,15 @@ static const pciDeviceInfo pci_dev_info_1166_0142 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1166_0144 = {
+	0x0144, pci_device_1166_0144,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0144,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1166_0200 = {
 	0x0200, pci_device_1166_0200,
 #ifdef INIT_SUBSYS_INFO
@@ -115950,6 +117882,258 @@ static const pciDeviceInfo pci_dev_info_8086_2850 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_2910 = {
+	0x2910, pci_device_8086_2910,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2910,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2920 = {
+	0x2920, pci_device_8086_2920,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2920,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2921 = {
+	0x2921, pci_device_8086_2921,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2921,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2922 = {
+	0x2922, pci_device_8086_2922,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2922,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2923 = {
+	0x2923, pci_device_8086_2923,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2923,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2925 = {
+	0x2925, pci_device_8086_2925,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2925,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2926 = {
+	0x2926, pci_device_8086_2926,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2926,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2928 = {
+	0x2928, pci_device_8086_2928,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2928,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_292d = {
+	0x292d, pci_device_8086_292d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_292d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_292e = {
+	0x292e, pci_device_8086_292e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_292e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2930 = {
+	0x2930, pci_device_8086_2930,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2930,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2932 = {
+	0x2932, pci_device_8086_2932,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2932,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2934 = {
+	0x2934, pci_device_8086_2934,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2934,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2935 = {
+	0x2935, pci_device_8086_2935,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2935,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2936 = {
+	0x2936, pci_device_8086_2936,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2936,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2937 = {
+	0x2937, pci_device_8086_2937,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2937,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2938 = {
+	0x2938, pci_device_8086_2938,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2938,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2939 = {
+	0x2939, pci_device_8086_2939,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2939,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_293a = {
+	0x293a, pci_device_8086_293a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_293a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_293c = {
+	0x293c, pci_device_8086_293c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_293c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_293e = {
+	0x293e, pci_device_8086_293e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_293e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2940 = {
+	0x2940, pci_device_8086_2940,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2940,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2942 = {
+	0x2942, pci_device_8086_2942,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2942,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2944 = {
+	0x2944, pci_device_8086_2944,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2944,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2946 = {
+	0x2946, pci_device_8086_2946,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2946,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2948 = {
+	0x2948, pci_device_8086_2948,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2948,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_294a = {
+	0x294a, pci_device_8086_294a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_294a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_294c = {
+	0x294c, pci_device_8086_294c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_294c,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_2970 = {
 	0x2970, pci_device_8086_2970,
 #ifdef INIT_SUBSYS_INFO
@@ -116193,6 +118377,285 @@ static const pciDeviceInfo pci_dev_info_8086_29a7 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_29b0 = {
+	0x29b0, pci_device_8086_29b0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b1 = {
+	0x29b1, pci_device_8086_29b1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b2 = {
+	0x29b2, pci_device_8086_29b2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b2,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b3 = {
+	0x29b3, pci_device_8086_29b3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b4 = {
+	0x29b4, pci_device_8086_29b4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b5 = {
+	0x29b5, pci_device_8086_29b5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b6 = {
+	0x29b6, pci_device_8086_29b6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b7 = {
+	0x29b7, pci_device_8086_29b7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c0 = {
+	0x29c0, pci_device_8086_29c0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c1 = {
+	0x29c1, pci_device_8086_29c1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c2 = {
+	0x29c2, pci_device_8086_29c2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c2,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c3 = {
+	0x29c3, pci_device_8086_29c3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c4 = {
+	0x29c4, pci_device_8086_29c4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c5 = {
+	0x29c5, pci_device_8086_29c5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c6 = {
+	0x29c6, pci_device_8086_29c6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c7 = {
+	0x29c7, pci_device_8086_29c7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29cf = {
+	0x29cf, pci_device_8086_29cf,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29cf,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e0 = {
+	0x29e0, pci_device_8086_29e0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e1 = {
+	0x29e1, pci_device_8086_29e1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e4 = {
+	0x29e4, pci_device_8086_29e4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e5 = {
+	0x29e5, pci_device_8086_29e5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e6 = {
+	0x29e6, pci_device_8086_29e6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e7 = {
+	0x29e7, pci_device_8086_29e7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e9 = {
+	0x29e9, pci_device_8086_29e9,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e9,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f0 = {
+	0x29f0, pci_device_8086_29f0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f1 = {
+	0x29f1, pci_device_8086_29f1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f4 = {
+	0x29f4, pci_device_8086_29f4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f5 = {
+	0x29f5, pci_device_8086_29f5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f6 = {
+	0x29f6, pci_device_8086_29f6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f7 = {
+	0x29f7, pci_device_8086_29f7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f9 = {
+	0x29f9, pci_device_8086_29f9,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f9,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_2a00 = {
 	0x2a00, pci_device_8086_2a00,
 #ifdef INIT_SUBSYS_INFO
@@ -116661,6 +119124,303 @@ static const pciDeviceInfo pci_dev_info_8086_35c8 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_3600 = {
+	0x3600, pci_device_8086_3600,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3600,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3604 = {
+	0x3604, pci_device_8086_3604,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3604,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3605 = {
+	0x3605, pci_device_8086_3605,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3605,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3606 = {
+	0x3606, pci_device_8086_3606,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3606,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3607 = {
+	0x3607, pci_device_8086_3607,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3607,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3608 = {
+	0x3608, pci_device_8086_3608,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3608,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3609 = {
+	0x3609, pci_device_8086_3609,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3609,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_360a = {
+	0x360a, pci_device_8086_360a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_360a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_360b = {
+	0x360b, pci_device_8086_360b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_360b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_360c = {
+	0x360c, pci_device_8086_360c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_360c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_360d = {
+	0x360d, pci_device_8086_360d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_360d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_360e = {
+	0x360e, pci_device_8086_360e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_360e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_360f = {
+	0x360f, pci_device_8086_360f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_360f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3610 = {
+	0x3610, pci_device_8086_3610,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3610,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4000 = {
+	0x4000, pci_device_8086_4000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4000,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4008 = {
+	0x4008, pci_device_8086_4008,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4008,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4010 = {
+	0x4010, pci_device_8086_4010,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4010,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4021 = {
+	0x4021, pci_device_8086_4021,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4021,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4022 = {
+	0x4022, pci_device_8086_4022,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4022,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4023 = {
+	0x4023, pci_device_8086_4023,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4023,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4024 = {
+	0x4024, pci_device_8086_4024,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4024,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4025 = {
+	0x4025, pci_device_8086_4025,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4025,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4026 = {
+	0x4026, pci_device_8086_4026,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4026,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4027 = {
+	0x4027, pci_device_8086_4027,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4027,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4028 = {
+	0x4028, pci_device_8086_4028,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4028,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4029 = {
+	0x4029, pci_device_8086_4029,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4029,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_402d = {
+	0x402d, pci_device_8086_402d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_402d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_402e = {
+	0x402e, pci_device_8086_402e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_402e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_402f = {
+	0x402f, pci_device_8086_402f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_402f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4030 = {
+	0x4030, pci_device_8086_4030,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4030,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4032 = {
+	0x4032, pci_device_8086_4032,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4032,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4035 = {
+	0x4035, pci_device_8086_4035,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4035,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_4036 = {
+	0x4036, pci_device_8086_4036,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_4036,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_4220 = {
 	0x4220, pci_device_8086_4220,
 #ifdef INIT_SUBSYS_INFO
@@ -116742,6 +119502,159 @@ static const pciDeviceInfo pci_dev_info_8086_530d = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_65c0 = {
+	0x65c0, pci_device_8086_65c0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65c0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e2 = {
+	0x65e2, pci_device_8086_65e2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65e2,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e3 = {
+	0x65e3, pci_device_8086_65e3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65e3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e4 = {
+	0x65e4, pci_device_8086_65e4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65e4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e5 = {
+	0x65e5, pci_device_8086_65e5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65e5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e6 = {
+	0x65e6, pci_device_8086_65e6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65e6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e7 = {
+	0x65e7, pci_device_8086_65e7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65e7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f0 = {
+	0x65f0, pci_device_8086_65f0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65f0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f1 = {
+	0x65f1, pci_device_8086_65f1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65f1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f3 = {
+	0x65f3, pci_device_8086_65f3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65f3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f5 = {
+	0x65f5, pci_device_8086_65f5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65f5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f6 = {
+	0x65f6, pci_device_8086_65f6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65f6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f7 = {
+	0x65f7, pci_device_8086_65f7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65f7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f8 = {
+	0x65f8, pci_device_8086_65f8,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65f8,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f9 = {
+	0x65f9, pci_device_8086_65f9,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65f9,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65fa = {
+	0x65fa, pci_device_8086_65fa,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65fa,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_65ff = {
+	0x65ff, pci_device_8086_65ff,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_65ff,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_7000 = {
 	0x7000, pci_device_8086_7000,
 #ifdef INIT_SUBSYS_INFO
@@ -117282,6 +120195,15 @@ static const pciDeviceInfo pci_dev_info_8086_96a1 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_a620 = {
+	0xa620, pci_device_8086_a620,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_a620,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_b152 = {
 	0xb152, pci_device_8086_b152,
 #ifdef INIT_SUBSYS_INFO
@@ -119389,10 +122311,35 @@ static const pciDeviceInfo pci_dev_info_fffe_0710 = {
 #endif
 #define pci_dev_list_0000 NULL
 #define pci_dev_list_001a NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_001c[] = {
+	&pci_dev_info_001c_0001,
+	NULL
+};
+#endif
 #define pci_dev_list_0033 NULL
 #define pci_dev_list_003d NULL
 #define pci_dev_list_0059 NULL
-#define pci_dev_list_0070 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_0070[] = {
+	&pci_dev_info_0070_0003,
+	&pci_dev_info_0070_0009,
+	&pci_dev_info_0070_0801,
+	&pci_dev_info_0070_0807,
+	&pci_dev_info_0070_4000,
+	&pci_dev_info_0070_4001,
+	&pci_dev_info_0070_4009,
+	&pci_dev_info_0070_4800,
+	&pci_dev_info_0070_4801,
+	&pci_dev_info_0070_4803,
+	&pci_dev_info_0070_8003,
+	&pci_dev_info_0070_8801,
+	&pci_dev_info_0070_c801,
+	&pci_dev_info_0070_e807,
+	&pci_dev_info_0070_e817,
+	NULL
+};
+#endif
 #define pci_dev_list_0071 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_0095[] = {
@@ -119436,6 +122383,7 @@ static const pciDeviceInfo *pci_dev_list_0357[] = {
 	NULL
 };
 #endif
+#define pci_dev_list_0403 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_0432[] = {
 	&pci_dev_info_0432_0001,
@@ -119461,6 +122409,7 @@ static const pciDeviceInfo *pci_dev_list_050d[] = {
 	&pci_dev_info_050d_001a,
 	&pci_dev_info_050d_0109,
 	&pci_dev_info_050d_7050,
+	&pci_dev_info_050d_705c,
 	NULL
 };
 #endif
@@ -119499,10 +122448,33 @@ static const pciDeviceInfo *pci_dev_list_067b[] = {
 	NULL
 };
 #endif
+#define pci_dev_list_069d NULL
 #define pci_dev_list_0721 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_07ca[] = {
+	&pci_dev_info_07ca_b808,
+	NULL
+};
+#endif
 #define pci_dev_list_07e2 NULL
+#define pci_dev_list_0842 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_08ff[] = {
+	&pci_dev_info_08ff_afe4,
+	NULL
+};
+#endif
 #define pci_dev_list_0925 NULL
-#define pci_dev_list_093a NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_093a[] = {
+	&pci_dev_info_093a_010e,
+	&pci_dev_info_093a_010f,
+	&pci_dev_info_093a_2468,
+	&pci_dev_info_093a_2603,
+	&pci_dev_info_093a_2608,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_09c1[] = {
 	&pci_dev_info_09c1_0704,
@@ -119511,15 +122483,27 @@ static const pciDeviceInfo *pci_dev_list_09c1[] = {
 #endif
 #define pci_dev_list_0a89 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_0ace[] = {
+	&pci_dev_info_0ace_1211,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_0b0b[] = {
 	&pci_dev_info_0b0b_0105,
 	&pci_dev_info_0b0b_0205,
+	&pci_dev_info_0b0b_0206,
 	&pci_dev_info_0b0b_0305,
 	&pci_dev_info_0b0b_0405,
+	&pci_dev_info_0b0b_0406,
 	&pci_dev_info_0b0b_0505,
 	&pci_dev_info_0b0b_0506,
 	&pci_dev_info_0b0b_0605,
 	&pci_dev_info_0b0b_0705,
+	&pci_dev_info_0b0b_0706,
+	&pci_dev_info_0b0b_0905,
+	&pci_dev_info_0b0b_0906,
+	&pci_dev_info_0b0b_0a06,
 	NULL
 };
 #endif
@@ -119661,6 +122645,7 @@ static const pciDeviceInfo *pci_dev_list_1000[] = {
 	&pci_dev_info_1000_0041,
 	&pci_dev_info_1000_0050,
 	&pci_dev_info_1000_0054,
+	&pci_dev_info_1000_0055,
 	&pci_dev_info_1000_0056,
 	&pci_dev_info_1000_0058,
 	&pci_dev_info_1000_005a,
@@ -119991,6 +122976,7 @@ static const pciDeviceInfo *pci_dev_list_1002[] = {
 	&pci_dev_info_1002_5944,
 	&pci_dev_info_1002_5950,
 	&pci_dev_info_1002_5951,
+	&pci_dev_info_1002_5952,
 	&pci_dev_info_1002_5954,
 	&pci_dev_info_1002_5955,
 	&pci_dev_info_1002_5960,
@@ -120003,6 +122989,7 @@ static const pciDeviceInfo *pci_dev_list_1002[] = {
 	&pci_dev_info_1002_5a33,
 	&pci_dev_info_1002_5a34,
 	&pci_dev_info_1002_5a36,
+	&pci_dev_info_1002_5a37,
 	&pci_dev_info_1002_5a38,
 	&pci_dev_info_1002_5a39,
 	&pci_dev_info_1002_5a3f,
@@ -120061,8 +123048,10 @@ static const pciDeviceInfo *pci_dev_list_1002[] = {
 	&pci_dev_info_1002_7129,
 	&pci_dev_info_1002_7140,
 	&pci_dev_info_1002_7142,
+	&pci_dev_info_1002_7143,
 	&pci_dev_info_1002_7145,
 	&pci_dev_info_1002_7146,
+	&pci_dev_info_1002_7147,
 	&pci_dev_info_1002_7149,
 	&pci_dev_info_1002_714a,
 	&pci_dev_info_1002_714b,
@@ -120070,25 +123059,44 @@ static const pciDeviceInfo *pci_dev_list_1002[] = {
 	&pci_dev_info_1002_714d,
 	&pci_dev_info_1002_714e,
 	&pci_dev_info_1002_7152,
+	&pci_dev_info_1002_7153,
 	&pci_dev_info_1002_715e,
+	&pci_dev_info_1002_715f,
 	&pci_dev_info_1002_7162,
 	&pci_dev_info_1002_7166,
 	&pci_dev_info_1002_7172,
+	&pci_dev_info_1002_7173,
 	&pci_dev_info_1002_7180,
 	&pci_dev_info_1002_7181,
+	&pci_dev_info_1002_7183,
+	&pci_dev_info_1002_7187,
+	&pci_dev_info_1002_7188,
+	&pci_dev_info_1002_718a,
+	&pci_dev_info_1002_718c,
+	&pci_dev_info_1002_718d,
+	&pci_dev_info_1002_7193,
+	&pci_dev_info_1002_719b,
+	&pci_dev_info_1002_719f,
 	&pci_dev_info_1002_71a0,
 	&pci_dev_info_1002_71a1,
+	&pci_dev_info_1002_71a3,
+	&pci_dev_info_1002_71a7,
+	&pci_dev_info_1002_71bb,
 	&pci_dev_info_1002_71c0,
 	&pci_dev_info_1002_71c2,
 	&pci_dev_info_1002_71c4,
 	&pci_dev_info_1002_71c5,
 	&pci_dev_info_1002_71c6,
+	&pci_dev_info_1002_71c7,
 	&pci_dev_info_1002_71ce,
 	&pci_dev_info_1002_71d5,
 	&pci_dev_info_1002_71d6,
 	&pci_dev_info_1002_71de,
 	&pci_dev_info_1002_71e0,
 	&pci_dev_info_1002_71e2,
+	&pci_dev_info_1002_71e7,
+	&pci_dev_info_1002_7210,
+	&pci_dev_info_1002_7211,
 	&pci_dev_info_1002_7240,
 	&pci_dev_info_1002_7241,
 	&pci_dev_info_1002_7242,
@@ -120105,11 +123113,23 @@ static const pciDeviceInfo *pci_dev_list_1002[] = {
 	&pci_dev_info_1002_724d,
 	&pci_dev_info_1002_724e,
 	&pci_dev_info_1002_7269,
+	&pci_dev_info_1002_726b,
 	&pci_dev_info_1002_726e,
+	&pci_dev_info_1002_7280,
+	&pci_dev_info_1002_7288,
+	&pci_dev_info_1002_7291,
+	&pci_dev_info_1002_7293,
+	&pci_dev_info_1002_72a0,
+	&pci_dev_info_1002_72a8,
+	&pci_dev_info_1002_72b1,
+	&pci_dev_info_1002_72b3,
 	&pci_dev_info_1002_7833,
 	&pci_dev_info_1002_7834,
 	&pci_dev_info_1002_7835,
 	&pci_dev_info_1002_7838,
+	&pci_dev_info_1002_791e,
+	&pci_dev_info_1002_791f,
+	&pci_dev_info_1002_793f,
 	&pci_dev_info_1002_7c37,
 	&pci_dev_info_1002_cab0,
 	&pci_dev_info_1002_cab2,
@@ -120421,6 +123441,7 @@ static const pciDeviceInfo *pci_dev_list_1022[] = {
 	&pci_dev_info_1022_2003,
 	&pci_dev_info_1022_2020,
 	&pci_dev_info_1022_2040,
+	&pci_dev_info_1022_2080,
 	&pci_dev_info_1022_2081,
 	&pci_dev_info_1022_2082,
 	&pci_dev_info_1022_208f,
@@ -120587,6 +123608,7 @@ static const pciDeviceInfo *pci_dev_list_1028[] = {
 	&pci_dev_info_1028_0001,
 	&pci_dev_info_1028_0002,
 	&pci_dev_info_1028_0003,
+	&pci_dev_info_1028_0004,
 	&pci_dev_info_1028_0006,
 	&pci_dev_info_1028_0007,
 	&pci_dev_info_1028_0008,
@@ -120602,6 +123624,7 @@ static const pciDeviceInfo *pci_dev_list_1028[] = {
 	&pci_dev_info_1028_0013,
 	&pci_dev_info_1028_0014,
 	&pci_dev_info_1028_0015,
+	&pci_dev_info_1028_1f03,
 	NULL
 };
 #define pci_dev_list_1029 NULL
@@ -120673,6 +123696,7 @@ static const pciDeviceInfo *pci_dev_list_102f[] = {
 	&pci_dev_info_102f_0020,
 	&pci_dev_info_102f_0030,
 	&pci_dev_info_102f_0031,
+	&pci_dev_info_102f_0032,
 	&pci_dev_info_102f_0105,
 	&pci_dev_info_102f_0106,
 	&pci_dev_info_102f_0107,
@@ -120888,10 +123912,13 @@ static const pciDeviceInfo *pci_dev_list_103c[] = {
 	&pci_dev_info_103c_12ee,
 	&pci_dev_info_103c_12f8,
 	&pci_dev_info_103c_12fa,
+	&pci_dev_info_103c_1302,
+	&pci_dev_info_103c_1303,
 	&pci_dev_info_103c_2910,
 	&pci_dev_info_103c_2925,
 	&pci_dev_info_103c_3080,
 	&pci_dev_info_103c_3085,
+	&pci_dev_info_103c_30b5,
 	&pci_dev_info_103c_3220,
 	&pci_dev_info_103c_3230,
 	&pci_dev_info_103c_4030,
@@ -120931,8 +123958,10 @@ static const pciDeviceInfo *pci_dev_list_1043[] = {
 	&pci_dev_info_1043_80c5,
 	&pci_dev_info_1043_80df,
 	&pci_dev_info_1043_815a,
+	&pci_dev_info_1043_8168,
 	&pci_dev_info_1043_8187,
 	&pci_dev_info_1043_8188,
+	&pci_dev_info_1043_81f4,
 	NULL
 };
 #endif
@@ -121164,6 +124193,7 @@ static const pciDeviceInfo *pci_dev_list_1057[] = {
 	&pci_dev_info_1057_1801,
 	&pci_dev_info_1057_18c0,
 	&pci_dev_info_1057_18c1,
+	&pci_dev_info_1057_3052,
 	&pci_dev_info_1057_3055,
 	&pci_dev_info_1057_3410,
 	&pci_dev_info_1057_4801,
@@ -121222,7 +124252,9 @@ static const pciDeviceInfo *pci_dev_list_105a[] = {
 	&pci_dev_info_105a_7275,
 	&pci_dev_info_105a_8002,
 	&pci_dev_info_105a_8350,
+	&pci_dev_info_105a_8650,
 	&pci_dev_info_105a_c350,
+	&pci_dev_info_105a_e350,
 	NULL
 };
 #endif
@@ -121415,6 +124447,7 @@ static const pciDeviceInfo *pci_dev_list_1073[] = {
 	&pci_dev_info_1073_0010,
 	&pci_dev_info_1073_0012,
 	&pci_dev_info_1073_0020,
+	&pci_dev_info_1073_1000,
 	&pci_dev_info_1073_2000,
 	NULL
 };
@@ -121774,6 +124807,8 @@ static const pciDeviceInfo *pci_dev_list_10a9[] = {
 	&pci_dev_info_10a9_4002,
 	&pci_dev_info_10a9_8001,
 	&pci_dev_info_10a9_8002,
+	&pci_dev_info_10a9_8010,
+	&pci_dev_info_10a9_8018,
 	NULL
 };
 #endif
@@ -123748,6 +126783,7 @@ static const pciDeviceInfo *pci_dev_list_1166[] = {
 	&pci_dev_info_1166_0140,
 	&pci_dev_info_1166_0141,
 	&pci_dev_info_1166_0142,
+	&pci_dev_info_1166_0144,
 	&pci_dev_info_1166_0200,
 	&pci_dev_info_1166_0201,
 	&pci_dev_info_1166_0203,
@@ -128664,6 +131700,34 @@ static const pciDeviceInfo *pci_dev_list_8086[] = {
 	&pci_dev_info_8086_284b,
 	&pci_dev_info_8086_284f,
 	&pci_dev_info_8086_2850,
+	&pci_dev_info_8086_2910,
+	&pci_dev_info_8086_2920,
+	&pci_dev_info_8086_2921,
+	&pci_dev_info_8086_2922,
+	&pci_dev_info_8086_2923,
+	&pci_dev_info_8086_2925,
+	&pci_dev_info_8086_2926,
+	&pci_dev_info_8086_2928,
+	&pci_dev_info_8086_292d,
+	&pci_dev_info_8086_292e,
+	&pci_dev_info_8086_2930,
+	&pci_dev_info_8086_2932,
+	&pci_dev_info_8086_2934,
+	&pci_dev_info_8086_2935,
+	&pci_dev_info_8086_2936,
+	&pci_dev_info_8086_2937,
+	&pci_dev_info_8086_2938,
+	&pci_dev_info_8086_2939,
+	&pci_dev_info_8086_293a,
+	&pci_dev_info_8086_293c,
+	&pci_dev_info_8086_293e,
+	&pci_dev_info_8086_2940,
+	&pci_dev_info_8086_2942,
+	&pci_dev_info_8086_2944,
+	&pci_dev_info_8086_2946,
+	&pci_dev_info_8086_2948,
+	&pci_dev_info_8086_294a,
+	&pci_dev_info_8086_294c,
 	&pci_dev_info_8086_2970,
 	&pci_dev_info_8086_2971,
 	&pci_dev_info_8086_2972,
@@ -128691,6 +131755,37 @@ static const pciDeviceInfo *pci_dev_list_8086[] = {
 	&pci_dev_info_8086_29a5,
 	&pci_dev_info_8086_29a6,
 	&pci_dev_info_8086_29a7,
+	&pci_dev_info_8086_29b0,
+	&pci_dev_info_8086_29b1,
+	&pci_dev_info_8086_29b2,
+	&pci_dev_info_8086_29b3,
+	&pci_dev_info_8086_29b4,
+	&pci_dev_info_8086_29b5,
+	&pci_dev_info_8086_29b6,
+	&pci_dev_info_8086_29b7,
+	&pci_dev_info_8086_29c0,
+	&pci_dev_info_8086_29c1,
+	&pci_dev_info_8086_29c2,
+	&pci_dev_info_8086_29c3,
+	&pci_dev_info_8086_29c4,
+	&pci_dev_info_8086_29c5,
+	&pci_dev_info_8086_29c6,
+	&pci_dev_info_8086_29c7,
+	&pci_dev_info_8086_29cf,
+	&pci_dev_info_8086_29e0,
+	&pci_dev_info_8086_29e1,
+	&pci_dev_info_8086_29e4,
+	&pci_dev_info_8086_29e5,
+	&pci_dev_info_8086_29e6,
+	&pci_dev_info_8086_29e7,
+	&pci_dev_info_8086_29e9,
+	&pci_dev_info_8086_29f0,
+	&pci_dev_info_8086_29f1,
+	&pci_dev_info_8086_29f4,
+	&pci_dev_info_8086_29f5,
+	&pci_dev_info_8086_29f6,
+	&pci_dev_info_8086_29f7,
+	&pci_dev_info_8086_29f9,
 	&pci_dev_info_8086_2a00,
 	&pci_dev_info_8086_2a01,
 	&pci_dev_info_8086_2a02,
@@ -128743,6 +131838,39 @@ static const pciDeviceInfo *pci_dev_list_8086[] = {
 	&pci_dev_info_8086_35b6,
 	&pci_dev_info_8086_35b7,
 	&pci_dev_info_8086_35c8,
+	&pci_dev_info_8086_3600,
+	&pci_dev_info_8086_3604,
+	&pci_dev_info_8086_3605,
+	&pci_dev_info_8086_3606,
+	&pci_dev_info_8086_3607,
+	&pci_dev_info_8086_3608,
+	&pci_dev_info_8086_3609,
+	&pci_dev_info_8086_360a,
+	&pci_dev_info_8086_360b,
+	&pci_dev_info_8086_360c,
+	&pci_dev_info_8086_360d,
+	&pci_dev_info_8086_360e,
+	&pci_dev_info_8086_360f,
+	&pci_dev_info_8086_3610,
+	&pci_dev_info_8086_4000,
+	&pci_dev_info_8086_4008,
+	&pci_dev_info_8086_4010,
+	&pci_dev_info_8086_4021,
+	&pci_dev_info_8086_4022,
+	&pci_dev_info_8086_4023,
+	&pci_dev_info_8086_4024,
+	&pci_dev_info_8086_4025,
+	&pci_dev_info_8086_4026,
+	&pci_dev_info_8086_4027,
+	&pci_dev_info_8086_4028,
+	&pci_dev_info_8086_4029,
+	&pci_dev_info_8086_402d,
+	&pci_dev_info_8086_402e,
+	&pci_dev_info_8086_402f,
+	&pci_dev_info_8086_4030,
+	&pci_dev_info_8086_4032,
+	&pci_dev_info_8086_4035,
+	&pci_dev_info_8086_4036,
 	&pci_dev_info_8086_4220,
 	&pci_dev_info_8086_4222,
 	&pci_dev_info_8086_4223,
@@ -128752,6 +131880,23 @@ static const pciDeviceInfo *pci_dev_list_8086[] = {
 	&pci_dev_info_8086_5200,
 	&pci_dev_info_8086_5201,
 	&pci_dev_info_8086_530d,
+	&pci_dev_info_8086_65c0,
+	&pci_dev_info_8086_65e2,
+	&pci_dev_info_8086_65e3,
+	&pci_dev_info_8086_65e4,
+	&pci_dev_info_8086_65e5,
+	&pci_dev_info_8086_65e6,
+	&pci_dev_info_8086_65e7,
+	&pci_dev_info_8086_65f0,
+	&pci_dev_info_8086_65f1,
+	&pci_dev_info_8086_65f3,
+	&pci_dev_info_8086_65f5,
+	&pci_dev_info_8086_65f6,
+	&pci_dev_info_8086_65f7,
+	&pci_dev_info_8086_65f8,
+	&pci_dev_info_8086_65f9,
+	&pci_dev_info_8086_65fa,
+	&pci_dev_info_8086_65ff,
 	&pci_dev_info_8086_7000,
 	&pci_dev_info_8086_7010,
 	&pci_dev_info_8086_7020,
@@ -128812,6 +131957,7 @@ static const pciDeviceInfo *pci_dev_list_8086[] = {
 	&pci_dev_info_8086_9622,
 	&pci_dev_info_8086_9641,
 	&pci_dev_info_8086_96a1,
+	&pci_dev_info_8086_a620,
 	&pci_dev_info_8086_b152,
 	&pci_dev_info_8086_b154,
 	&pci_dev_info_8086_b555,
@@ -129243,6 +132389,9 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0x001a, pci_vendor_001a, pci_dev_list_001a},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x001c, pci_vendor_001c, pci_dev_list_001c},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0033, pci_vendor_0033, pci_dev_list_0033},
 #endif
 	{0x003d, pci_vendor_003d, pci_dev_list_003d},
@@ -129292,6 +132441,9 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0x0357, pci_vendor_0357, pci_dev_list_0357},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0403, pci_vendor_0403, pci_dev_list_0403},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0432, pci_vendor_0432, pci_dev_list_0432},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -129322,12 +132474,24 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0x067b, pci_vendor_067b, pci_dev_list_067b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x069d, pci_vendor_069d, pci_dev_list_069d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0721, pci_vendor_0721, pci_dev_list_0721},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x07ca, pci_vendor_07ca, pci_dev_list_07ca},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x07e2, pci_vendor_07e2, pci_dev_list_07e2},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0842, pci_vendor_0842, pci_dev_list_0842},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x08ff, pci_vendor_08ff, pci_dev_list_08ff},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0925, pci_vendor_0925, pci_dev_list_0925},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -129340,6 +132504,9 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0x0a89, pci_vendor_0a89, pci_dev_list_0a89},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0ace, pci_vendor_0ace, pci_dev_list_0ace},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0b0b, pci_vendor_0b0b, pci_dev_list_0b0b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -134702,6 +137869,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0x001a, pci_vendor_001a, pci_ss_list_001a},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x001c, pci_vendor_001c, pci_ss_list_001c},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0033, pci_vendor_0033, pci_ss_list_0033},
 #endif
 	{0x003d, pci_vendor_003d, pci_ss_list_003d},
@@ -134751,6 +137921,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0x0357, pci_vendor_0357, pci_ss_list_0357},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0403, pci_vendor_0403, pci_ss_list_0403},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0432, pci_vendor_0432, pci_ss_list_0432},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -134781,12 +137954,24 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0x067b, pci_vendor_067b, pci_ss_list_067b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x069d, pci_vendor_069d, pci_ss_list_069d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0721, pci_vendor_0721, pci_ss_list_0721},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x07ca, pci_vendor_07ca, pci_ss_list_07ca},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x07e2, pci_vendor_07e2, pci_ss_list_07e2},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0842, pci_vendor_0842, pci_ss_list_0842},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x08ff, pci_vendor_08ff, pci_ss_list_08ff},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0925, pci_vendor_0925, pci_ss_list_0925},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -134799,6 +137984,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0x0a89, pci_vendor_0a89, pci_ss_list_0a89},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0ace, pci_vendor_0ace, pci_ss_list_0ace},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0b0b, pci_vendor_0b0b, pci_ss_list_0b0b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
diff --git a/hw/xfree86/x86emu/ops2.c b/hw/xfree86/x86emu/ops2.c
index 4bf95c182..7b0156aaa 100644
--- a/hw/xfree86/x86emu/ops2.c
+++ b/hw/xfree86/x86emu/ops2.c
@@ -2129,7 +2129,7 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
     uint srcoffset;
 
     START_OF_INSTR();
-    DECODE_PRINTF("BSF\n");
+    DECODE_PRINTF("BSF\t");
     FETCH_DECODE_MODRM(mod, rh, rl);
     switch(mod) {
     case 0:
@@ -2209,25 +2209,25 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
 	break;
     case 3:				/* register to register */
 	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
-	    u32 *srcreg, *dstreg;
+	    u32 srcval, *dstreg;
 
-	    srcreg = DECODE_RM_LONG_REGISTER(rl);
+	    srcval = *DECODE_RM_LONG_REGISTER(rl);
 	    DECODE_PRINTF(",");
 	    dstreg = DECODE_RM_LONG_REGISTER(rh);
 	    TRACE_AND_STEP();
-	    CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+	    CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
 	    for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
-		if ((*srcreg >> *dstreg) & 1) break;
+		if ((srcval >> *dstreg) & 1) break;
 	} else {
-	    u16 *srcreg, *dstreg;
+	    u16 srcval, *dstreg;
 
-	    srcreg = DECODE_RM_WORD_REGISTER(rl);
+	    srcval = *DECODE_RM_WORD_REGISTER(rl);
 	    DECODE_PRINTF(",");
 	    dstreg = DECODE_RM_WORD_REGISTER(rh);
 	    TRACE_AND_STEP();
-	    CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+	    CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
 	    for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
-		if ((*srcreg >> *dstreg) & 1) break;
+		if ((srcval >> *dstreg) & 1) break;
 	}
 	break;
     }
@@ -2245,7 +2245,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
     uint srcoffset;
 
     START_OF_INSTR();
-    DECODE_PRINTF("BSF\n");
+    DECODE_PRINTF("BSR\t");
     FETCH_DECODE_MODRM(mod, rh, rl);
     switch(mod) {
     case 0:
@@ -2325,25 +2325,25 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
 	break;
     case 3:				/* register to register */
 	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
-	    u32 *srcreg, *dstreg;
+	    u32 srcval, *dstreg;
 
-	    srcreg = DECODE_RM_LONG_REGISTER(rl);
+	    srcval = *DECODE_RM_LONG_REGISTER(rl);
 	    DECODE_PRINTF(",");
 	    dstreg = DECODE_RM_LONG_REGISTER(rh);
 	    TRACE_AND_STEP();
-	    CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+	    CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
 	    for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
-		if ((*srcreg >> *dstreg) & 1) break;
+		if ((srcval >> *dstreg) & 1) break;
 	} else {
-	    u16 *srcreg, *dstreg;
+	    u16 srcval, *dstreg;
 
-	    srcreg = DECODE_RM_WORD_REGISTER(rl);
+	    srcval = *DECODE_RM_WORD_REGISTER(rl);
 	    DECODE_PRINTF(",");
 	    dstreg = DECODE_RM_WORD_REGISTER(rh);
 	    TRACE_AND_STEP();
-	    CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+	    CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
 	    for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
-		if ((*srcreg >> *dstreg) & 1) break;
+		if ((srcval >> *dstreg) & 1) break;
 	}
 	break;
     }
diff --git a/hw/xfree86/xf1bpp/Makefile.am b/hw/xfree86/xf1bpp/Makefile.am
index e7c873ae8..6d510d1bd 100644
--- a/hw/xfree86/xf1bpp/Makefile.am
+++ b/hw/xfree86/xf1bpp/Makefile.am
@@ -27,128 +27,156 @@ libxf1bppgen_a_SOURCES = \
         mfbtileC.c \
         mfbtileG.c
 
-DISTCLEANFILES = $(libxf1bppgen_a_SOURCES)
-
 libxf1bppmfb_a_SOURCES = \
-        $(top_srcdir)/mfb/maskbits.c \
-        $(top_srcdir)/mfb/mfbbitblt.c \
-        $(top_srcdir)/mfb/mfbbres.c \
-        $(top_srcdir)/mfb/mfbbresd.c \
-        $(top_srcdir)/mfb/mfbbstore.c \
-        $(top_srcdir)/mfb/mfbclip.c \
-        $(top_srcdir)/mfb/mfbcmap.c \
-        $(top_srcdir)/mfb/mfbfillarc.c \
-        $(top_srcdir)/mfb/mfbfillrct.c \
-        $(top_srcdir)/mfb/mfbfillsp.c \
-        $(top_srcdir)/mfb/mfbfont.c \
-        $(top_srcdir)/mfb/mfbgc.c \
-        $(top_srcdir)/mfb/mfbgetsp.c \
-        $(top_srcdir)/mfb/mfbhrzvert.c \
-        $(top_srcdir)/mfb/mfbimage.c \
-        $(top_srcdir)/mfb/mfbline.c \
-        $(top_srcdir)/mfb/mfbmisc.c \
-        $(top_srcdir)/mfb/mfbpixmap.c \
-        $(top_srcdir)/mfb/mfbpntwin.c \
-        $(top_srcdir)/mfb/mfbpolypnt.c \
-        $(top_srcdir)/mfb/mfbpushpxl.c \
-        $(top_srcdir)/mfb/mfbscrclse.c \
-        $(top_srcdir)/mfb/mfbscrinit.c \
-        $(top_srcdir)/mfb/mfbsetsp.c \
-        $(top_srcdir)/mfb/mfbwindow.c \
-        $(top_srcdir)/mfb/mfbzerarc.c \
-        mfbmodule.c
+        maskbits.c \
+        mfbbitblt.c \
+        mfbbres.c \
+        mfbbresd.c \
+        mfbbstore.c \
+        mfbclip.c \
+        mfbcmap.c \
+        mfbfillarc.c \
+        mfbfillrct.c \
+        mfbfillsp.c \
+        mfbfont.c \
+        mfbgc.c \
+        mfbgetsp.c \
+        mfbhrzvert.c \
+        mfbimage.c \
+        mfbline.c \
+        mfbmisc.c \
+        mfbpixmap.c \
+        mfbpntwin.c \
+        mfbpolypnt.c \
+        mfbpushpxl.c \
+        mfbscrclse.c \
+        mfbscrinit.c \
+        mfbsetsp.c \
+        mfbwindow.c \
+        mfbzerarc.c
+
+BUILT_SOURCES = $(libxf1bppgen_a_SOURCES) $(libxf1bppgen_a_SOURCES)
 
-libxf1bpp_la_SOURCES = $(libxf1bppmfb_a_SOURCES) $(libxf1bppgen_a_SOURCES)
+libxf1bpp_la_SOURCES = $(libxf1bppmfb_a_SOURCES) $(libxf1bppgen_a_SOURCES) \
+        mfbmodule.c
 
-AM_CFLAGS = -DXF86MONO -include mfbmap.h $(DIX_CFLAGS) $(XORG_CFLAGS)
+AM_CFLAGS = -DXF86MONO $(DIX_CFLAGS) $(XORG_CFLAGS)
 INCLUDES = $(XORG_INCS) -I$(top_srcdir)/mfb
 
 mfbseg.c:
 	echo "#define POLYSEGMENT" > $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbline.c\"" >> $@
 mfbpgbwht.c:
 	echo "#define MFBPOLYGLYPHBLT xf1bppPolyGlyphBltWhite" > $@
 	echo "#define OPEQ |=" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbplygblt.c\"" >> $@
 mfbpgbblak.c:
 	echo "#define MFBPOLYGLYPHBLT xf1bppPolyGlyphBltBlack" > $@
 	echo "#define OPEQ &=~" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbplygblt.c\"" >> $@
 mfbpgbinv.c:
 	echo "#define MFBPOLYGLYPHBLT xf1bppPolyGlyphBltInvert" > $@
 	echo "#define OPEQ ^=" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbplygblt.c\"" >> $@
 mfbigbwht.c:
 	echo "#define MFBIMAGEGLYPHBLT xf1bppImageGlyphBltWhite" > $@
 	echo "#define OPEQ |=" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbimggblt.c\"" >> $@
 mfbigbblak.c:
 	echo "#define MFBIMAGEGLYPHBLT xf1bppImageGlyphBltBlack" > $@
 	echo "#define OPEQ &=~" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbimggblt.c\"" >> $@
 mfbpawhite.c:
 	echo "#define MFBSOLIDFILLAREA xf1bppSolidWhiteArea" > $@
 	echo "#define MFBSTIPPLEFILLAREA xf1bppStippleWhiteArea" >> $@
 	echo "#define OPEQ |=" >> $@
 	echo "#define EQWHOLEWORD =~0" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbpntarea.c\"" >> $@
 mfbpablack.c:
 	echo "#define MFBSOLIDFILLAREA xf1bppSolidBlackArea" > $@
 	echo "#define MFBSTIPPLEFILLAREA xf1bppStippleBlackArea" >> $@
 	echo "#define OPEQ &=~" >> $@
 	echo "#define EQWHOLEWORD =0" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbpntarea.c\"" >> $@
 mfbpainv.c:
 	echo "#define MFBSOLIDFILLAREA xf1bppSolidInvertArea" > $@
 	echo "#define MFBSTIPPLEFILLAREA xf1bppStippleInvertArea" >> $@
 	echo "#define OPEQ ^=" >> $@
 	echo "#define EQWHOLEWORD ^=~0" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbpntarea.c\"" >> $@
 mfbtewhite.c:
 	echo "#define OP" > $@
 	echo "#define CLIPTETEXT xf1bppImageGlyphBltWhite" >> $@
 	echo "#define MFBTEGLYPHBLT xf1bppTEGlyphBltWhite" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbtegblt.c\"" >> $@
 mfbteblack.c:
 	echo "#define OP ~" > $@
 	echo "#define CLIPTETEXT xf1bppImageGlyphBltBlack" >> $@
 	echo "#define MFBTEGLYPHBLT xf1bppTEGlyphBltBlack" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbtegblt.c\"" >> $@
 mfbplywhite.c:
 	echo "#define MFBFILLPOLY1RECT xf1bppFillPolyWhite" > $@
 	echo "#define OPEQ |=" >> $@
 	echo "#define EQWHOLEWORD =~0" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbply1rct.c\"" >> $@
 mfbplyblack.c:
 	echo "#define MFBFILLPOLY1RECT xf1bppFillPolyBlack" > $@
 	echo "#define OPEQ &=~" >> $@
 	echo "#define EQWHOLEWORD =0" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbply1rct.c\"" >> $@
 mfbplyinv.c:
 	echo "#define MFBFILLPOLY1RECT xf1bppFillPolyInvert" > $@
 	echo "#define OPEQ ^=" >> $@
 	echo "#define EQWHOLEWORD ^=~0" >> $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbply1rct.c\"" >> $@
 mfbbltC.c:
 	echo "#define MROP Mcopy" > $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbblt.c\"" >> $@
 mfbbltX.c:
 	echo "#define MROP Mxor" > $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbblt.c\"" >> $@
 mfbbltCI.c:
 	echo "#define MROP McopyInverted" > $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbblt.c\"" >> $@
 mfbbltO.c:
 	echo "#define MROP Mor" > $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbblt.c\"" >> $@
 mfbbltG.c:
 	echo "#define MROP M0" > $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbblt.c\"" >> $@
 mfbtileC.c:
 	echo "#define MROP Mcopy" > $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbtile.c\"" >> $@
 mfbtileG.c:
 	echo "#define MRop M0" > $@
+	echo "#include \"mfbmap.h\"" >> $@
 	echo "#include \"$(top_srcdir)/mfb/mfbtile.c\"" >> $@
 
+$(libxf1bppmfb_a_SOURCES):
+	for i in $(libxf1bppmfb_a_SOURCES) ; do \
+		echo "#include \"mfbmap.h\"" > $$i ; \
+		echo "#include \"$(top_srcdir)/mfb/$$i\"" >> $$i ; \
+	done
+
+
 EXTRA_DIST = mfbmap.sh mfbunmap.sh 
diff --git a/include/dix-config.h.in b/include/dix-config.h.in
index 7aabae2ec..1a9fdc516 100644
--- a/include/dix-config.h.in
+++ b/include/dix-config.h.in
@@ -93,6 +93,9 @@
 /* Define to 1 if you have the <asm/mtrr.h> header file. */
 #undef HAVE_ASM_MTRR_H
 
+/* Define to 1 if you have the <byteswap.h> header file. */
+#undef HAVE_BYTESWAP_H
+
 /* Define to 1 if you have the <dbm.h> header file. */
 #undef HAVE_DBM_H
 
@@ -311,6 +314,9 @@
 /* Use rgb.txt directly */
 #undef USE_RGB_TXT
 
+/* Define to use byteswap macros from <sys/endian.h> */
+#undef USE_SYS_ENDIAN_H
+
 /* unaligned word accesses behave as expected */
 #undef WORKING_UNALIGNED_INT
 
@@ -413,16 +419,8 @@
 /* Endian order */
 #undef X_BYTE_ORDER
 
-/* BSD-compliant source */
-#undef _BSD_SOURCE
-
-/* POSIX-compliant source */
-#undef _POSIX_SOURCE
-
-#ifndef _XOPEN_SOURCE
-/* X/Open-compliant source */
-#undef _XOPEN_SOURCE
-#endif
+/* Enable GNU and other extensions to the C environment for GLIBC */
+#undef _GNU_SOURCE
 
 /* Define to empty if `const' does not conform to ANSI C. */
 #undef const
@@ -469,4 +467,13 @@
 /* Path to XErrorDB file */
 #undef XERRORDB_PATH
 
+/* Define to 16-bit byteswap macro */
+#undef bswap_16
+
+/* Define to 32-bit byteswap macro */
+#undef bswap_32
+
+/* Define to 64-bit byteswap macro */
+#undef bswap_64
+
 #endif /* _DIX_CONFIG_H_ */
diff --git a/mi/mieq.c b/mi/mieq.c
index b336277d4..478b61ef0 100644
--- a/mi/mieq.c
+++ b/mi/mieq.c
@@ -59,6 +59,12 @@ in this Software without prior written authorization from The Open Group.
 # include   "extinit.h"
 # include   "exglobals.h"
 
+#ifdef DPMSExtension
+# include "dpmsproc.h"
+# define DPMS_SERVER
+# include <X11/extensions/dpms.h>
+#endif
+
 #define QUEUE_SIZE  256
 
 typedef struct _Event {
@@ -193,6 +199,13 @@ mieqProcessInputEvents()
     while (miEventQueue.head != miEventQueue.tail) {
         if (screenIsSaved == SCREEN_SAVER_ON)
             SaveScreens (SCREEN_SAVER_OFF, ScreenSaverReset);
+#ifdef DPMSExtension
+        else if (DPMSPowerLevel != DPMSModeOn)
+            SetScreenSaverTimer();
+
+        if (DPMSPowerLevel != DPMSModeOn)
+            DPMSSet(DPMSModeOn);
+#endif
 
         e = &miEventQueue.events[miEventQueue.head];
         /* Assumption - screen switching can only occur on motion events. */
diff --git a/miext/damage/damage.c b/miext/damage/damage.c
index 2e80011ac..cd66b5473 100755
--- a/miext/damage/damage.c
+++ b/miext/damage/damage.c
@@ -113,6 +113,52 @@ getDrawableDamageRef (DrawablePtr pDrawable)
     DamagePtr	*pPrev = (DamagePtr *) \
 	    &(pWindow->devPrivates[damageWinPrivateIndex].ptr)
 
+static void
+DamageReportDamage (DamagePtr pDamage, RegionPtr pDamageRegion)
+{
+    BoxRec tmpBox;
+    RegionRec tmpRegion;
+    Bool was_empty;
+
+    switch (pDamage->damageLevel) {
+    case DamageReportRawRegion:
+	(*pDamage->damageReport) (pDamage, pDamageRegion, pDamage->closure);
+	break;
+    case DamageReportDeltaRegion:
+	REGION_NULL (pScreen, &tmpRegion);
+	REGION_SUBTRACT (pScreen, &tmpRegion, pDamageRegion, &pDamage->damage);
+	if (REGION_NOTEMPTY (pScreen, &tmpRegion)) {
+	    REGION_UNION(pScreen, &pDamage->damage, &pDamage->damage,
+			 pDamageRegion);
+	    (*pDamage->damageReport) (pDamage, &tmpRegion, pDamage->closure);
+	}
+	REGION_UNINIT(pScreen, &tmpRegion);
+	break;
+    case DamageReportBoundingBox:
+	tmpBox = *REGION_EXTENTS (pScreen, &pDamage->damage);
+	REGION_UNION(pScreen, &pDamage->damage, &pDamage->damage,
+		     pDamageRegion);
+	if (!BOX_SAME (&tmpBox, REGION_EXTENTS (pScreen, &pDamage->damage))) {
+	    (*pDamage->damageReport) (pDamage, &pDamage->damage,
+				      pDamage->closure);
+	}
+	break;
+    case DamageReportNonEmpty:
+	was_empty = !REGION_NOTEMPTY(pScreen, &pDamage->damage);
+	REGION_UNION(pScreen, &pDamage->damage, &pDamage->damage,
+		     pDamageRegion);
+	if (was_empty && REGION_NOTEMPTY(pScreen, &pDamage->damage)) {
+	    (*pDamage->damageReport) (pDamage, &pDamage->damage,
+				      pDamage->closure);
+	}
+	break;
+    case DamageReportNone:
+	REGION_UNION(pScreen, &pDamage->damage, &pDamage->damage,
+		     pDamageRegion);
+	break;
+    }
+}
+
 #if DAMAGE_DEBUG_ENABLE
 static void
 _damageDamageRegion (DrawablePtr pDrawable, RegionPtr pRegion, Bool clip, int subWindowMode, const char *where)
@@ -130,9 +176,6 @@ damageDamageRegion (DrawablePtr pDrawable, RegionPtr pRegion, Bool clip,
     RegionRec	    clippedRec;
     RegionPtr	    pDamageRegion;
     RegionRec	    pixClip;
-    Bool	    was_empty;
-    RegionRec	    tmpRegion;
-    BoxRec	    tmpBox;
     int		    draw_x, draw_y;
 #ifdef COMPOSITE
     int		    screen_x = 0, screen_y = 0;
@@ -256,41 +299,18 @@ damageDamageRegion (DrawablePtr pDrawable, RegionPtr pRegion, Bool clip,
 	 */
 	if (draw_x || draw_y)
 	    REGION_TRANSLATE (pScreen, pDamageRegion, -draw_x, -draw_y);
-	
-	switch (pDamage->damageLevel) {
-	case DamageReportRawRegion:
-	    (*pDamage->damageReport) (pDamage, pDamageRegion, pDamage->closure);
-	    break;
-	case DamageReportDeltaRegion:
-	    REGION_NULL (pScreen, &tmpRegion);
-	    REGION_SUBTRACT (pScreen, &tmpRegion, pDamageRegion, &pDamage->damage);
-	    if (REGION_NOTEMPTY (pScreen, &tmpRegion))
-	    {
-		REGION_UNION(pScreen, &pDamage->damage,
-			     &pDamage->damage, pDamageRegion);
-		(*pDamage->damageReport) (pDamage, &tmpRegion, pDamage->closure);
-	    }
-	    REGION_UNINIT(pScreen, &tmpRegion);
-	    break;
-	case DamageReportBoundingBox:
-	    tmpBox = *REGION_EXTENTS (pScreen, &pDamage->damage);
-	    REGION_UNION(pScreen, &pDamage->damage,
-			 &pDamage->damage, pDamageRegion);
-	    if (!BOX_SAME (&tmpBox, REGION_EXTENTS (pScreen, &pDamage->damage)))
-		(*pDamage->damageReport) (pDamage, &pDamage->damage, pDamage->closure);
-	    break;
-	case DamageReportNonEmpty:
-	    was_empty = !REGION_NOTEMPTY(pScreen, &pDamage->damage);
-	    REGION_UNION(pScreen, &pDamage->damage, &pDamage->damage,
-			 pDamageRegion);
-	    if (was_empty && REGION_NOTEMPTY(pScreen, &pDamage->damage))
-		(*pDamage->damageReport) (pDamage, &pDamage->damage, pDamage->closure);
-	    break;
-	case DamageReportNone:
-	    REGION_UNION(pScreen, &pDamage->damage, &pDamage->damage,
-			 pDamageRegion);
-	    break;
+
+	/* If the damage rec has been flagged to report damage after the op has
+	 * completed, then union it into the delayed damage region, which will
+	 * be used for reporting after calling down, and skip the reporting 
+	 */
+	if (!pDamage->reportAfter) {
+	    DamageReportDamage (pDamage, pDamageRegion);
+	} else {
+	    REGION_UNION(pScreen, &pDamage->pendingDamage,
+			 &pDamage->pendingDamage, pDamageRegion);
 	}
+
 	/*
 	 * translate original region back
 	 */
@@ -305,6 +325,21 @@ damageDamageRegion (DrawablePtr pDrawable, RegionPtr pRegion, Bool clip,
     REGION_UNINIT (pScreen, &clippedRec);
 }
 
+static void
+damageReportPostOp (DrawablePtr pDrawable)
+{
+    drawableDamage(pDrawable);
+
+    for (; pDamage != NULL; pDamage = pDamage->pNext)
+    {
+	if (pDamage->reportAfter) {
+	    DamageReportDamage (pDamage, &pDamage->pendingDamage);
+	    REGION_EMPTY (pScreen, &pDamage->pendingDamage);
+	}
+    }
+    
+}
+
 #if DAMAGE_DEBUG_ENABLE
 #define damageDamageBox(d,b,m) _damageDamageBox(d,b,m,__FUNCTION__)
 static void
@@ -550,6 +585,7 @@ damageComposite (CARD8      op,
 		       yDst,
 		       width,
 		       height);
+    damageReportPostOp (pDst->pDrawable);
     wrap (pScrPriv, ps, Composite, damageComposite);
 }
 
@@ -616,6 +652,7 @@ damageGlyphs (CARD8		op,
     }
     unwrap (pScrPriv, ps, Glyphs);
     (*ps->Glyphs) (op, pSrc, pDst, maskFormat, xSrc, ySrc, nlist, list, glyphs);
+    damageReportPostOp (pDst->pDrawable);
     wrap (pScrPriv, ps, Glyphs, damageGlyphs);
 }
 #endif
@@ -668,6 +705,7 @@ damageFillSpans(DrawablePtr pDrawable,
     
     (*pGC->ops->FillSpans)(pDrawable, pGC, npt, ppt, pwidth, fSorted);
 
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -715,6 +753,7 @@ damageSetSpans(DrawablePtr  pDrawable,
 	   damageDamageBox (pDrawable, &box, pGC->subWindowMode);
     }
     (*pGC->ops->SetSpans)(pDrawable, pGC, pcharsrc, ppt, pwidth, npt, fSorted);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -746,6 +785,7 @@ damagePutImage(DrawablePtr  pDrawable,
     }
     (*pGC->ops->PutImage)(pDrawable, pGC, depth, x, y, w, h,
 		leftPad, format, pImage);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -789,6 +829,7 @@ damageCopyArea(DrawablePtr   pSrc,
 
     ret = (*pGC->ops->CopyArea)(pSrc, pDst,
             pGC, srcx, srcy, width, height, dstx, dsty);
+    damageReportPostOp (pDst);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDst);
     return ret;
 }
@@ -834,6 +875,7 @@ damageCopyPlane(DrawablePtr	pSrc,
 
     ret = (*pGC->ops->CopyPlane)(pSrc, pDst,
 	       pGC, srcx, srcy, width, height, dstx, dsty, bitPlane);
+    damageReportPostOp (pDst);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDst);
     return ret;
 }
@@ -875,6 +917,7 @@ damagePolyPoint(DrawablePtr pDrawable,
 	   damageDamageBox (pDrawable, &box, pGC->subWindowMode);
     }
     (*pGC->ops->PolyPoint)(pDrawable, pGC, mode, npt, ppt);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -948,6 +991,7 @@ damagePolylines(DrawablePtr pDrawable,
 	   damageDamageBox (pDrawable, &box, pGC->subWindowMode);
     }
     (*pGC->ops->Polylines)(pDrawable, pGC, mode, npt, ppt);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1026,6 +1070,7 @@ damagePolySegment(DrawablePtr	pDrawable,
 	   damageDamageBox (pDrawable, &box, pGC->subWindowMode);
     }
     (*pGC->ops->PolySegment)(pDrawable, pGC, nSeg, pSeg);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1087,6 +1132,7 @@ damagePolyRectangle(DrawablePtr  pDrawable,
 	}
     }
     (*pGC->ops->PolyRectangle)(pDrawable, pGC, nRects, pRects);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1139,6 +1185,7 @@ damagePolyArc(DrawablePtr   pDrawable,
 	   damageDamageBox (pDrawable, &box, pGC->subWindowMode);
     }
     (*pGC->ops->PolyArc)(pDrawable, pGC, nArcs, pArcs);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1197,6 +1244,7 @@ damageFillPolygon(DrawablePtr	pDrawable,
     }
     
     (*pGC->ops->FillPolygon)(pDrawable, pGC, shape, mode, npt, ppt);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1235,6 +1283,7 @@ damagePolyFillRect(DrawablePtr	pDrawable,
 	    damageDamageBox (pDrawable, &box, pGC->subWindowMode);
     }
     (*pGC->ops->PolyFillRect)(pDrawable, pGC, nRects, pRects);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1276,6 +1325,7 @@ damagePolyFillArc(DrawablePtr	pDrawable,
 	   damageDamageBox (pDrawable, &box, pGC->subWindowMode);
     }
     (*pGC->ops->PolyFillArc)(pDrawable, pGC, nArcs, pArcs);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1386,6 +1436,7 @@ damagePolyText8(DrawablePtr pDrawable,
 		    Linear8Bit, TT_POLY8);
     else
 	x = (*pGC->ops->PolyText8)(pDrawable, pGC, x, y, count, chars);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
     return x;
 }
@@ -1406,6 +1457,7 @@ damagePolyText16(DrawablePtr	pDrawable,
 		    TT_POLY16);
     else
 	x = (*pGC->ops->PolyText16)(pDrawable, pGC, x, y, count, chars);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
     return x;
 }
@@ -1425,6 +1477,7 @@ damageImageText8(DrawablePtr	pDrawable,
 		    Linear8Bit, TT_IMAGE8);
     else
 	(*pGC->ops->ImageText8)(pDrawable, pGC, x, y, count, chars);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1444,6 +1497,7 @@ damageImageText16(DrawablePtr	pDrawable,
 		    TT_IMAGE16);
     else
 	(*pGC->ops->ImageText16)(pDrawable, pGC, x, y, count, chars);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1462,6 +1516,7 @@ damageImageGlyphBlt(DrawablePtr	    pDrawable,
 		       nglyph, ppci, TRUE, pGC->subWindowMode);
     (*pGC->ops->ImageGlyphBlt)(pDrawable, pGC, x, y, nglyph,
 					ppci, pglyphBase);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1479,6 +1534,7 @@ damagePolyGlyphBlt(DrawablePtr	pDrawable,
 		       nglyph, ppci, FALSE, pGC->subWindowMode);
     (*pGC->ops->PolyGlyphBlt)(pDrawable, pGC, x, y, nglyph,
 				ppci, pglyphBase);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1512,6 +1568,7 @@ damagePushPixels(GCPtr		pGC,
 	   damageDamageBox (pDrawable, &box, pGC->subWindowMode);
     }
     (*pGC->ops->PushPixels)(pGC, pBitMap, pDrawable, dx, dy, xOrg, yOrg);
+    damageReportPostOp (pDrawable);
     DAMAGE_GC_OP_EPILOGUE(pGC, pDrawable);
 }
 
@@ -1591,10 +1648,12 @@ damagePaintWindow(WindowPtr pWindow,
     if(what == PW_BACKGROUND) {
 	unwrap (pScrPriv, pScreen, PaintWindowBackground);
 	(*pScreen->PaintWindowBackground) (pWindow, prgn, what);
+	damageReportPostOp (&pWindow->drawable);
 	wrap (pScrPriv, pScreen, PaintWindowBackground, damagePaintWindow);
     } else {
 	unwrap (pScrPriv, pScreen, PaintWindowBorder);
 	(*pScreen->PaintWindowBorder) (pWindow, prgn, what);
+	damageReportPostOp (&pWindow->drawable);
 	wrap (pScrPriv, pScreen, PaintWindowBorder, damagePaintWindow);
     }
 }
@@ -1623,6 +1682,7 @@ damageCopyWindow(WindowPtr	pWindow,
     }
     unwrap (pScrPriv, pScreen, CopyWindow);
     (*pScreen->CopyWindow) (pWindow, ptOldOrg, prgnSrc);
+    damageReportPostOp (&pWindow->drawable);
     wrap (pScrPriv, pScreen, CopyWindow, damageCopyWindow);
 }
 
@@ -1654,6 +1714,7 @@ damageRestoreAreas (PixmapPtr	pPixmap,
     unwrap (pScrPriv, pScreen, BackingStoreFuncs.RestoreAreas);
     (*pScreen->BackingStoreFuncs.RestoreAreas) (pPixmap, prgn,
 						xorg, yorg, pWindow);
+    damageReportPostOp (&pWindow->drawable);
     wrap (pScrPriv, pScreen, BackingStoreFuncs.RestoreAreas,
 			     damageRestoreAreas);
 }
@@ -1820,12 +1881,14 @@ DamageCreate (DamageReportFunc  damageReport,
     pDamage->pNext = 0;
     pDamage->pNextWin = 0;
     REGION_NULL(pScreen, &pDamage->damage);
+    REGION_NULL(pScreen, &pDamage->pendingDamage);
     
     pDamage->damageLevel = damageLevel;
     pDamage->isInternal = isInternal;
     pDamage->closure = closure;
     pDamage->isWindow = FALSE;
     pDamage->pDrawable = 0;
+    pDamage->reportAfter = FALSE;
 
     pDamage->damageReport = damageReport;
     pDamage->damageDestroy = damageDestroy;
@@ -1909,6 +1972,7 @@ DamageDestroy (DamagePtr    pDamage)
     if (pDamage->damageDestroy)
 	(*pDamage->damageDestroy) (pDamage, pDamage->closure);
     REGION_UNINIT (pDamage->pDrawable->pScreen, &pDamage->damage);
+    REGION_UNINIT (pDamage->pDrawable->pScreen, &pDamage->pendingDamage);
     xfree (pDamage);
 }
 
@@ -1962,4 +2026,16 @@ DamageDamageRegion (DrawablePtr	pDrawable,
 		    RegionPtr	pRegion)
 {
     damageDamageRegion (pDrawable, pRegion, FALSE, -1);
+
+    /* Go back and report this damage for DamagePtrs with reportAfter set, since
+     * this call isn't part of an in-progress drawing op in the call chain and
+     * the DDX probably just wants to know about it right away.
+     */
+    damageReportPostOp (pDrawable);
+}
+
+void
+DamageSetReportAfterOp (DamagePtr pDamage, Bool reportAfter)
+{
+    pDamage->reportAfter = reportAfter;
 }
diff --git a/miext/damage/damage.h b/miext/damage/damage.h
index c760f6bef..36a06545f 100755
--- a/miext/damage/damage.h
+++ b/miext/damage/damage.h
@@ -81,4 +81,7 @@ void
 DamageDamageRegion (DrawablePtr	    pDrawable,
 		    const RegionPtr pRegion);
 
+void
+DamageSetReportAfterOp (DamagePtr pDamage, Bool reportAfter);
+
 #endif /* _DAMAGE_H_ */
diff --git a/miext/damage/damagestr.h b/miext/damage/damagestr.h
index 0fe9e0ad7..93e213fd1 100755
--- a/miext/damage/damagestr.h
+++ b/miext/damage/damagestr.h
@@ -48,6 +48,9 @@ typedef struct _damage {
     
     DamageReportFunc	damageReport;
     DamageDestroyFunc	damageDestroy;
+
+    Bool		reportAfter;
+    RegionRec		pendingDamage;
 } DamageRec;
 
 typedef struct _damageScrPriv {
diff --git a/os/WaitFor.c b/os/WaitFor.c
index ba227a3b6..d39964f30 100644
--- a/os/WaitFor.c
+++ b/os/WaitFor.c
@@ -337,10 +337,7 @@ WaitForSomething(int *pClientsReady)
 	    if (XFD_ANYSET(&tmp_set))
 		QueueWorkProc(EstablishNewConnections, NULL,
 			      (pointer)&LastSelectMask);
-#ifdef DPMSExtension
-	    if (XFD_ANYSET (&devicesReadable) && (DPMSPowerLevel != DPMSModeOn))
-		DPMSSet(DPMSModeOn);
-#endif
+
 	    if (XFD_ANYSET (&devicesReadable) || XFD_ANYSET (&clientsReadable))
 		break;
 #ifdef WIN32
diff --git a/os/utils.c b/os/utils.c
index 9824501e7..7c725e38d 100644
--- a/os/utils.c
+++ b/os/utils.c
@@ -53,23 +53,6 @@ OR PERFORMANCE OF THIS SOFTWARE.
 #include <dix-config.h>
 #endif
 
-/* The world's most shocking hack, to ensure we get clock_gettime() and
- * CLOCK_MONOTONIC. */
-#ifdef sun              /* Needed to tell Solaris headers not to restrict to */
-#define __EXTENSIONS__  /* only the functions defined in POSIX 199309.       */
-#endif
-
-#ifdef _POSIX_C_SOURCE
-#define _SAVED_POSIX_C_SOURCE _POSIX_C_SOURCE
-#undef _POSIX_C_SOURCE
-#endif
-#define _POSIX_C_SOURCE 199309L
-#include <time.h>
-#undef _POSIX_C_SOURCE
-#ifdef _SAVED_POSIX_C_SOURCE
-#define _POSIX_C_SOURCE _SAVED_POSIX_C_SOURCE
-#endif
-
 #ifdef __CYGWIN__
 #include <stdlib.h>
 #include <signal.h>
@@ -80,6 +63,7 @@ OR PERFORMANCE OF THIS SOFTWARE.
 #endif
 #include <X11/Xos.h>
 #include <stdio.h>
+#include <time.h>
 #include "misc.h"
 #include <X11/X.h>
 #define XSERV_t
diff --git a/randr/randr.c b/randr/randr.c
index 1470035ca..5fa9baf84 100644
--- a/randr/randr.c
+++ b/randr/randr.c
@@ -243,6 +243,10 @@ Bool RRScreenInit(ScreenPtr pScreen)
     pScrPriv->maxWidth = pScrPriv->minWidth = pScreen->width;
     pScrPriv->maxHeight = pScrPriv->minHeight = pScreen->height;
     
+    pScrPriv->width = pScreen->width;
+    pScrPriv->height = pScreen->height;
+    pScrPriv->mmWidth = pScreen->mmWidth;
+    pScrPriv->mmHeight = pScreen->mmHeight;
 #if RANDR_12_INTERFACE
     pScrPriv->rrScreenSetSize = NULL;
     pScrPriv->rrCrtcSet = NULL;
diff --git a/randr/randrstr.h b/randr/randrstr.h
index 88f7588ae..505821269 100644
--- a/randr/randrstr.h
+++ b/randr/randrstr.h
@@ -224,6 +224,7 @@ typedef struct _rrScrPriv {
     CARD16		    minWidth, minHeight;
     CARD16		    maxWidth, maxHeight;
     CARD16		    width, height;	/* last known screen size */
+    CARD16		    mmWidth, mmHeight;	/* last known screen size */
 
     int			    numOutputs;
     RROutputPtr		    *outputs;
@@ -542,6 +543,16 @@ RRCrtcGammaSetSize (RRCrtcPtr	crtc,
 		    int		size);
 
 /*
+ * Set the allowable rotations of the CRTC.
+ */
+Bool
+RRCrtcSetRotations (RRCrtcPtr crtc,
+		    Rotation rotations);
+
+void
+RRCrtcGetScanoutSize(RRCrtcPtr crtc, int *width, int *height);
+
+/*
  * Destroy a Crtc at shutdown
  */
 void
diff --git a/randr/rrcrtc.c b/randr/rrcrtc.c
index 076742077..c84ec6178 100644
--- a/randr/rrcrtc.c
+++ b/randr/rrcrtc.c
@@ -397,6 +397,32 @@ RRCrtcGammaNotify (RRCrtcPtr	crtc)
     return TRUE;    /* not much going on here */
 }
 
+/**
+ * Returns the width/height that the crtc scans out from the framebuffer
+ */
+void
+RRCrtcGetScanoutSize(RRCrtcPtr crtc, int *width, int *height)
+{
+    if (crtc->mode == NULL) {
+	*width = 0;
+	*height = 0;
+	return;
+    }
+
+    switch (crtc->rotation & 0xf) {
+    case RR_Rotate_0:
+    case RR_Rotate_180:
+	*width = crtc->mode->mode.width;
+	*height = crtc->mode->mode.height;
+	break;
+    case RR_Rotate_90:
+    case RR_Rotate_270:
+	*width = crtc->mode->mode.height;
+	*height = crtc->mode->mode.width;
+	break;
+    }
+}
+
 /*
  * Set the size of the gamma table at server startup time
  */
@@ -427,6 +453,17 @@ RRCrtcGammaSetSize (RRCrtcPtr	crtc,
 }
 
 /*
+ * Set the allowable rotations of the CRTC.
+ */
+Bool
+RRCrtcSetRotations (RRCrtcPtr crtc,
+		    Rotation rotations)
+{
+    crtc->rotations = rotations;
+    return TRUE;
+}
+
+/*
  * Initialize crtc type
  */
 Bool
diff --git a/randr/rrinfo.c b/randr/rrinfo.c
index 85426f654..797cdb1b4 100644
--- a/randr/rrinfo.c
+++ b/randr/rrinfo.c
@@ -169,18 +169,7 @@ RRScanOldConfig (ScreenPtr pScreen, Rotation rotations)
 	if (height > maxHeight) maxHeight = height;
     }
 
-    if (minWidth != pScrPriv->minWidth) {
-	pScrPriv->minWidth = minWidth; pScrPriv->changed = TRUE;
-    }
-    if (maxWidth != pScrPriv->maxWidth) {
-	pScrPriv->maxWidth = maxWidth; pScrPriv->changed = TRUE;
-    }
-    if (minHeight != pScrPriv->minHeight) {
-	pScrPriv->minHeight = minHeight; pScrPriv->changed = TRUE;
-    }
-    if (maxHeight != pScrPriv->maxHeight) {
-	pScrPriv->maxHeight = maxHeight; pScrPriv->changed = TRUE;
-    }
+    RRScreenSetSizeRange (pScreen, minWidth, minHeight, maxWidth, maxHeight);
 
     /* notice current mode */
     if (newMode)
@@ -219,7 +208,6 @@ RRGetInfo (ScreenPtr pScreen)
     return TRUE;
 }
 
-#if RANDR_12_INTERFACE
 /*
  * Register the range of sizes for the screen
  */
@@ -234,12 +222,19 @@ RRScreenSetSizeRange (ScreenPtr	pScreen,
 
     if (!pScrPriv)
 	return;
+    if (pScrPriv->minWidth == minWidth && pScrPriv->minHeight == minHeight &&
+	pScrPriv->maxWidth == maxWidth && pScrPriv->maxHeight == maxHeight)
+    {
+	return;
+    }
+	
     pScrPriv->minWidth  = minWidth;
     pScrPriv->minHeight = minHeight;
     pScrPriv->maxWidth  = maxWidth;
     pScrPriv->maxHeight = maxHeight;
+    pScrPriv->changed = TRUE;
+    pScrPriv->configChanged = TRUE;
 }
-#endif
 
 #ifdef RANDR_10_INTERFACE
 static Bool
diff --git a/randr/rrpointer.c b/randr/rrpointer.c
index b9ee3bce2..bf9031543 100644
--- a/randr/rrpointer.c
+++ b/randr/rrpointer.c
@@ -35,11 +35,15 @@ static Bool
 RRCrtcContainsPosition (RRCrtcPtr crtc, int x, int y)
 {
     RRModePtr   mode = crtc->mode;
-    
+    int		scan_width, scan_height;
+
     if (!mode)
 	return FALSE;
-    if (crtc->x <= x && x < crtc->x + mode->mode.width &&
-	crtc->y <= y && y < crtc->y + mode->mode.height)
+
+    RRCrtcGetScanoutSize (crtc, &scan_width, &scan_height);
+
+    if (crtc->x <= x && x < crtc->x + scan_width &&
+	crtc->y <= y && y < crtc->y + scan_height)
 	return TRUE;
     return FALSE;
 }
@@ -55,28 +59,32 @@ RRPointerToNearestCrtc (ScreenPtr pScreen, int x, int y, RRCrtcPtr skip)
     RRCrtcPtr	nearest = NULL;
     int		best = 0;
     int		best_dx = 0, best_dy = 0;
-    
+
     for (c = 0; c < pScrPriv->numCrtcs; c++)
     {
 	RRCrtcPtr   crtc = pScrPriv->crtcs[c];
 	RRModePtr   mode = crtc->mode;
 	int	    dx, dy;
 	int	    dist;
+	int	    scan_width, scan_height;
 
 	if (!mode)
 	    continue;
 	if (crtc == skip)
 	    continue;
+
+	RRCrtcGetScanoutSize (crtc, &scan_width, &scan_height);
+
 	if (x < crtc->x)
 	    dx = crtc->x - x;
-	else if (x > crtc->x + mode->mode.width)
-	    dx = x - (crtc->x + mode->mode.width);
+	else if (x > crtc->x + scan_width)
+	    dx = x - (crtc->x + scan_width);
 	else
 	    dx = 0;
 	if (y < crtc->y)
 	    dy = crtc->y - x;
-	else if (y > crtc->y + mode->mode.height)
-	    dy = y - (crtc->y + mode->mode.height);
+	else if (y > crtc->y + scan_height)
+	    dy = y - (crtc->y + scan_height);
 	else
 	    dy = 0;
 	dist = dx + dy;
diff --git a/randr/rrproperty.c b/randr/rrproperty.c
index 56bb39a85..916caf030 100644
--- a/randr/rrproperty.c
+++ b/randr/rrproperty.c
@@ -125,6 +125,7 @@ RRChangeOutputProperty (RROutputPtr output, Atom property, Atom type,
 {
     RRPropertyPtr		    prop;
     xRROutputPropertyNotifyEvent    event;
+    rrScrPrivPtr		    pScrPriv = rrGetScrPriv(output->pScreen);
     int				    sizeInBytes;
     int				    totalSize;
     pointer			    data;
@@ -213,6 +214,13 @@ RRChangeOutputProperty (RROutputPtr output, Atom property, Atom type,
 	prop->next = output->properties;
 	output->properties = prop;
     }
+
+    if (!prop->is_pending) {
+	/* What should we do in case of failure? */
+	pScrPriv->rrOutputSetProperty(output->pScreen, output,
+				      prop->propertyName, prop_value);
+    }
+
     if (sendevent)
     {
 	event.type = RREventBase + RRNotify;
@@ -298,6 +306,12 @@ RRConfigureOutputProperty (RROutputPtr output, Atom property,
     if (prop->valid_values)
 	xfree (prop->valid_values);
     prop->valid_values = new_values;
+
+    if (add) {
+	prop->next = output->properties;
+	output->properties = prop;
+    }
+
     return Success;
 }
 
diff --git a/randr/rrscreen.c b/randr/rrscreen.c
index 6f7afaf7a..e10aa0362 100644
--- a/randr/rrscreen.c
+++ b/randr/rrscreen.c
@@ -158,11 +158,15 @@ RRScreenSizeNotify (ScreenPtr	pScreen)
      * pixel size
      */
     if (pScrPriv->width == pScreen->width &&
-	pScrPriv->height == pScreen->height)
+	pScrPriv->height == pScreen->height &&
+	pScrPriv->mmWidth == pScreen->mmWidth &&
+	pScrPriv->mmHeight == pScreen->mmHeight)
 	return;
     
     pScrPriv->width = pScreen->width;
     pScrPriv->height = pScreen->height;
+    pScrPriv->mmWidth = pScreen->mmWidth;
+    pScrPriv->mmHeight = pScreen->mmHeight;
     pScrPriv->changed = TRUE;
 /*    pScrPriv->sizeChanged = TRUE; */
 
@@ -234,7 +238,8 @@ ProcRRGetScreenSizeRange (ClientPtr client)
     
     if (pScrPriv) 
     {
-	RRGetInfo (pScreen);
+	if (!RRGetInfo (pScreen))
+	    return BadAlloc;
 	rep.minWidth  = pScrPriv->minWidth;
 	rep.minHeight = pScrPriv->minHeight;
 	rep.maxWidth  = pScrPriv->maxWidth;
@@ -349,7 +354,8 @@ ProcRRGetScreenResources (ClientPtr client)
     rep.pad = 0;
     
     if (pScrPriv)
-	RRGetInfo (pScreen);
+	if (!RRGetInfo (pScreen))
+	    return BadAlloc;
 
     if (!pScrPriv)
     {
@@ -591,7 +597,8 @@ ProcRRGetScreenInfo (ClientPtr client)
     rep.pad = 0;
     
     if (pScrPriv)
-	RRGetInfo (pScreen);
+	if (!RRGetInfo (pScreen))
+	    return BadAlloc;
 
     output = RRFirstOutput (pScreen);
     
diff --git a/randr/rrxinerama.c b/randr/rrxinerama.c
index 8b951455c..1db27f14c 100644
--- a/randr/rrxinerama.c
+++ b/randr/rrxinerama.c
@@ -290,10 +290,12 @@ ProcRRXineramaQueryScreens(ClientPtr client)
 	    RRCrtcPtr	crtc = pScrPriv->crtcs[i];
 	    if (RRXineramaCrtcActive (crtc))
 	    {
+	        int width, height;
+		RRCrtcGetScanoutSize (crtc, &width, &height);
 		scratch.x_org  = crtc->x;
 		scratch.y_org  = crtc->y;
-		scratch.width  = crtc->mode->mode.width;
-		scratch.height = crtc->mode->mode.height;
+		scratch.width  = width;
+		scratch.height = height;
 		if(client->swapped) {
 		    register int n;
 		    swaps(&scratch.x_org, n);
diff --git a/render/render.c b/render/render.c
index 126d08daf..348d4c611 100644
--- a/render/render.c
+++ b/render/render.c
@@ -47,6 +47,12 @@
 #include <X11/Xfuncproto.h>
 #include "cursorstr.h"
 
+#if HAVE_STDINT_H
+#include <stdint.h>
+#elif !defined(UINT32_MAX)
+#define UINT32_MAX 0xffffffffU
+#endif
+
 static int ProcRenderQueryVersion (ClientPtr pClient);
 static int ProcRenderQueryPictFormats (ClientPtr pClient);
 static int ProcRenderQueryPictIndexValues (ClientPtr pClient);
@@ -1105,11 +1111,14 @@ ProcRenderAddGlyphs (ClientPtr client)
     }
 
     nglyphs = stuff->nglyphs;
+    if (nglyphs > UINT32_MAX / sizeof(GlyphNewRec))
+	    return BadAlloc;
+
     if (nglyphs <= NLOCALGLYPH)
 	glyphsBase = glyphsLocal;
     else
     {
-	glyphsBase = (GlyphNewPtr) ALLOCATE_LOCAL (nglyphs * sizeof (GlyphNewRec));
+	glyphsBase = (GlyphNewPtr) Xalloc (nglyphs * sizeof (GlyphNewRec));
 	if (!glyphsBase)
 	    return BadAlloc;
     }
@@ -1166,7 +1175,7 @@ ProcRenderAddGlyphs (ClientPtr client)
     }
 
     if (glyphsBase != glyphsLocal)
-	DEALLOCATE_LOCAL (glyphsBase);
+	Xfree (glyphsBase);
     return client->noClientException;
 bail:
     while (glyphs != glyphsBase)
@@ -1175,7 +1184,7 @@ bail:
 	xfree (glyphs->glyph);
     }
     if (glyphsBase != glyphsLocal)
-	DEALLOCATE_LOCAL (glyphsBase);
+	Xfree (glyphsBase);
     return err;
 }
 
diff --git a/xkb/xkbUtils.c b/xkb/xkbUtils.c
index c9c5ed018..400306a22 100644
--- a/xkb/xkbUtils.c
+++ b/xkb/xkbUtils.c
@@ -1497,30 +1497,33 @@ XkbCopyKeymap(XkbDescPtr src, XkbDescPtr dst, Bool sendNotifies)
                 return FALSE;
         }
 
-        if (src->compat->sym_interpret) {
-            if (src->compat->size_si != dst->compat->size_si) {
+        if (src->compat->sym_interpret && src->compat->num_si) {
+            if (src->compat->num_si != dst->compat->size_si) {
                 if (dst->compat->sym_interpret)
                     tmp = xrealloc(dst->compat->sym_interpret,
-                                   src->compat->size_si *
+                                   src->compat->num_si *
                                      sizeof(XkbSymInterpretRec));
                 else
-                    tmp = xalloc(src->compat->size_si *
+                    tmp = xalloc(src->compat->num_si *
                                  sizeof(XkbSymInterpretRec));
                 if (!tmp)
                     return FALSE;
                 dst->compat->sym_interpret = tmp;
             }
             memcpy(dst->compat->sym_interpret, src->compat->sym_interpret,
-                   src->compat->size_si * sizeof(XkbSymInterpretRec));
+                   src->compat->num_si * sizeof(XkbSymInterpretRec));
+
+            dst->compat->num_si = src->compat->num_si;
+            dst->compat->size_si = src->compat->num_si;
         }
         else {
-            if (dst->compat->sym_interpret) {
+            if (dst->compat->sym_interpret && dst->compat->size_si)
                 xfree(dst->compat->sym_interpret);
-                dst->compat->sym_interpret = NULL;
-            }
+
+            dst->compat->sym_interpret = NULL;
+            dst->compat->num_si = 0;
+            dst->compat->size_si = 0;
         }
-        dst->compat->num_si = src->compat->num_si;
-        dst->compat->size_si = src->compat->size_si;
 
         memcpy(dst->compat->groups, src->compat->groups,
                XkbNumKbdGroups * sizeof(XkbModsRec));