diff options
author | Zhao Yakui <yakui.zhao@intel.com> | 2016-11-20 14:41:44 -0500 |
---|---|---|
committer | Xiang, Haihao <haihao.xiang@intel.com> | 2016-11-21 22:22:00 +0800 |
commit | f5a9331acb971ee68843ede0dba73555ebb6fdf7 (patch) | |
tree | 06f98f0c6b4e7c173412641fc56e18e81667eecd | |
parent | 0babac1c9d517862fe9239dc2c6f312d4edb0792 (diff) |
Add the support of 10bit I010 surface
And it is treated as non-tiling for I010 surfaces, which is like I420.
Every pixel also uses two bytes like P010 but it occupies the lower 10-bit.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
-rw-r--r-- | src/i965_drv_video.c | 23 | ||||
-rw-r--r-- | src/i965_fourcc.h | 4 |
2 files changed, 27 insertions, 0 deletions
diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c index 04670f4..fbb6407 100644 --- a/src/i965_drv_video.c +++ b/src/i965_drv_video.c @@ -96,6 +96,8 @@ static int get_sampling_from_fourcc(unsigned int fourcc); #define I_P010 2, 2, 2, {I965_16BITS, I965_8BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_1, OFFSET_16} } +#define I_I010 2, 2, 3, {I965_16BITS, I965_4BITS, I965_4BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_2, OFFSET_0} } + #define I_422H 2, 1, 3, {I965_8BITS, I965_4BITS, I965_4BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_2, OFFSET_0} } #define I_422V 1, 2, 3, {I965_8BITS, I965_4BITS, I965_4BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_2, OFFSET_0} } #define I_YV16 2, 1, 3, {I965_8BITS, I965_4BITS, I965_4BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_2, OFFSET_0}, {PLANE_1, OFFSET_0} } @@ -141,6 +143,7 @@ static const i965_fourcc_info i965_fourcc_infos[] = { DEF_YUV(IMC1, YUV420, I_S), DEF_YUV(P010, YUV420, I_SI), + DEF_YUV(I010, YUV420, I_S), DEF_YUV(422H, YUV422H, I_SI), DEF_YUV(422V, YUV422V, I_S), @@ -1288,6 +1291,7 @@ i965_surface_native_memory(VADriverContextP ctx, // todo, should we disable tiling for 422 format? if (expected_fourcc == VA_FOURCC_I420 || expected_fourcc == VA_FOURCC_IYUV || + expected_fourcc == VA_FOURCC_I010 || expected_fourcc == VA_FOURCC_YV12 || expected_fourcc == VA_FOURCC_YV16) tiling = 0; @@ -1357,6 +1361,7 @@ i965_suface_external_memory(VADriverContextP ctx, case VA_FOURCC_I420: case VA_FOURCC_IYUV: case VA_FOURCC_IMC3: + case VA_FOURCC_I010: ASSERT_RET(memory_attibute->num_planes == 3, VA_STATUS_ERROR_INVALID_PARAMETER); ASSERT_RET(memory_attibute->pitches[1] == memory_attibute->pitches[2], VA_STATUS_ERROR_INVALID_PARAMETER); @@ -4206,6 +4211,17 @@ i965_check_alloc_surface_bo(VADriverContextP ctx, region_height = obj_surface->height + obj_surface->height / 2; break; + case VA_FOURCC_I010: + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = obj_surface->height + obj_surface->height / 4; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->width = ALIGN(obj_surface->cb_cr_width * 2, i965->codec_info->min_linear_wpitch) * 2; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->cb_cr_pitch = obj_surface->width / 2; + region_width = obj_surface->width; + region_height = obj_surface->height + obj_surface->height / 2; + + break; case VA_FOURCC_YUY2: case VA_FOURCC_UYVY: obj_surface->width = ALIGN(obj_surface->orig_width * 2, i965->codec_info->min_linear_wpitch); @@ -4356,6 +4372,7 @@ VAStatus i965_DeriveImage(VADriverContextP ctx, break; case VA_FOURCC_I420: + case VA_FOURCC_I010: case VA_FOURCC_422H: case VA_FOURCC_IMC3: case VA_FOURCC_444P: @@ -5904,6 +5921,12 @@ i965_QuerySurfaceAttributes(VADriverContextP ctx, attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; attribs[i].value.value.i = VA_FOURCC_P010; i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_I010; + i++; } } } diff --git a/src/i965_fourcc.h b/src/i965_fourcc.h index 55daf50..c440dcd 100644 --- a/src/i965_fourcc.h +++ b/src/i965_fourcc.h @@ -33,6 +33,10 @@ #define VA_FOURCC_YVY2 VA_FOURCC('Y','V','Y','2') #endif +#ifndef VA_FOURCC_I010 +#define VA_FOURCC_I010 VA_FOURCC('I','0','1','0') +#endif + #define I965_MAX_PLANES 4 #define I965_MAX_COMONENTS 4 |