From 7c8bed62e0165a0be3363f7abf81bf9e30341e00 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 30 Oct 2009 15:33:11 -0700 Subject: intel: Use GTT mapping when available for swrast. This improves piglit quick.tests runtime from 19:33 minutes to 6:06 on my GM45. It should also hide most of the A17 swizzling issues, though they'll still exist when swapping occurs (which is the kernel's problem either way). --- src/mesa/drivers/dri/intel/intel_depthtmp.h | 10 ++++ src/mesa/drivers/dri/intel/intel_span.c | 73 ++++++++++++++++++++++++++++- src/mesa/drivers/dri/intel/intel_spantmp.h | 6 +++ 3 files changed, 88 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/intel/intel_depthtmp.h b/src/mesa/drivers/dri/intel/intel_depthtmp.h index 16d77084530..a9c75d44cf3 100644 --- a/src/mesa/drivers/dri/intel/intel_depthtmp.h +++ b/src/mesa/drivers/dri/intel/intel_depthtmp.h @@ -30,6 +30,16 @@ * all the tiling styles. */ +#define VALUE_TYPE INTEL_VALUE_TYPE +#define WRITE_DEPTH(_x, _y, d) \ + (*(INTEL_VALUE_TYPE *)(irb->region->buffer->virtual + \ + NO_TILE(_x, _y)) = d) +#define READ_DEPTH(d, _x, _y) \ + d = *(INTEL_VALUE_TYPE *)(irb->region->buffer->virtual + \ + NO_TILE(_x, _y)) +#define TAG(x) INTEL_TAG(intel_gttmap_##x) +#include "depthtmp.h" + #define VALUE_TYPE INTEL_VALUE_TYPE #define WRITE_DEPTH(_x, _y, d) INTEL_WRITE_DEPTH(NO_TILE(_x, _y), d) #define READ_DEPTH(d, _x, _y) d = INTEL_READ_DEPTH(NO_TILE(_x, _y)) diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c index b5e3cad3ff8..638e05f2add 100644 --- a/src/mesa/drivers/dri/intel/intel_span.c +++ b/src/mesa/drivers/dri/intel/intel_span.c @@ -266,8 +266,11 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, unsigned int num_cliprects; \ struct drm_clip_rect *cliprects; \ int x_off, y_off; \ + int pitch = irb->region->pitch * irb->region->cpp; \ + void *buf = irb->region->buffer->virtual; \ GLuint p; \ (void) p; \ + (void)buf; (void)pitch; /* unused for non-gttmap. */ \ intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off); /* XXX FBO: this is identical to the macro in spantmp2.h except we get @@ -347,6 +350,9 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, unsigned int num_cliprects; \ struct drm_clip_rect *cliprects; \ int x_off, y_off; \ + int pitch = irb->region->pitch * irb->region->cpp; \ + void *buf = irb->region->buffer->virtual; \ + (void)buf; (void)pitch; /* unused for non-gttmap. */ \ intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off); @@ -367,6 +373,15 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, #include "intel_depthtmp.h" +/** + ** 8-bit stencil function (XXX FBO: This is obsolete) + **/ +/* XXX */ +#define WRITE_STENCIL(_x, _y, d) pwrite_8(irb, NO_TILE(_x, _y) + 3, d) +#define READ_STENCIL(d, _x, _y) d = pread_8(irb, NO_TILE(_x, _y) + 3); +#define TAG(x) intel_gttmap_##x##_z24_s8 +#include "stenciltmp.h" + /** ** 8-bit stencil function (XXX FBO: This is obsolete) **/ @@ -399,6 +414,9 @@ intel_renderbuffer_map(struct intel_context *intel, struct gl_renderbuffer *rb) if (irb == NULL || irb->region == NULL) return; + if (intel->intelScreen->kernel_exec_fencing) + drm_intel_gem_bo_map_gtt(irb->region->buffer); + intel_set_span_functions(intel, rb); } @@ -411,7 +429,10 @@ intel_renderbuffer_unmap(struct intel_context *intel, if (irb == NULL || irb->region == NULL) return; - clear_span_cache(irb); + if (intel->intelScreen->kernel_exec_fencing) + drm_intel_gem_bo_unmap_gtt(irb->region->buffer); + else + clear_span_cache(irb); rb->GetRow = NULL; rb->PutRow = NULL; @@ -601,6 +622,56 @@ intel_set_span_functions(struct intel_context *intel, else tiling = I915_TILING_NONE; + if (intel->intelScreen->kernel_exec_fencing) { + switch (irb->texformat) { + case MESA_FORMAT_RGB565: + intel_gttmap_InitPointers_RGB565(rb); + break; + case MESA_FORMAT_ARGB4444: + intel_gttmap_InitPointers_ARGB4444(rb); + break; + case MESA_FORMAT_ARGB1555: + intel_gttmap_InitPointers_ARGB1555(rb); + break; + case MESA_FORMAT_XRGB8888: + intel_gttmap_InitPointers_xRGB8888(rb); + break; + case MESA_FORMAT_ARGB8888: + if (rb->_BaseFormat == GL_RGB) { + /* XXX remove this code someday when we enable XRGB surfaces */ + /* 8888 RGBx */ + intel_gttmap_InitPointers_xRGB8888(rb); + } else { + intel_gttmap_InitPointers_ARGB8888(rb); + } + break; + case MESA_FORMAT_Z16: + intel_gttmap_InitDepthPointers_z16(rb); + break; + case MESA_FORMAT_X8_Z24: + intel_gttmap_InitDepthPointers_z24_x8(rb); + break; + case MESA_FORMAT_S8_Z24: + /* There are a few different ways SW asks us to access the S8Z24 data: + * Z24 depth-only depth reads + * S8Z24 depth reads + * S8Z24 stencil reads. + */ + if (rb->Format == MESA_FORMAT_S8_Z24) { + intel_gttmap_InitDepthPointers_z24_x8(rb); + } else if (rb->Format == MESA_FORMAT_S8) { + intel_gttmap_InitStencilPointers_z24_s8(rb); + } + break; + default: + _mesa_problem(NULL, + "Unexpected MesaFormat %d in intelSetSpanFunctions", + irb->texformat); + break; + } + return; + } + switch (irb->texformat) { case MESA_FORMAT_RGB565: switch (tiling) { diff --git a/src/mesa/drivers/dri/intel/intel_spantmp.h b/src/mesa/drivers/dri/intel/intel_spantmp.h index ead0b1c1683..98cc6585f4a 100644 --- a/src/mesa/drivers/dri/intel/intel_spantmp.h +++ b/src/mesa/drivers/dri/intel/intel_spantmp.h @@ -30,6 +30,12 @@ * all the tiling styles. */ +#define SPANTMP_PIXEL_FMT INTEL_PIXEL_FMT +#define SPANTMP_PIXEL_TYPE INTEL_PIXEL_TYPE +#define TAG(x) INTEL_TAG(intel_gttmap_##x) +#define TAG2(x, y) INTEL_TAG(intel_gttmap_##x##y) +#include "spantmp2.h" + #define SPANTMP_PIXEL_FMT INTEL_PIXEL_FMT #define SPANTMP_PIXEL_TYPE INTEL_PIXEL_TYPE #define PUT_VALUE(_x, _y, v) INTEL_WRITE_VALUE(NO_TILE(_x, _y), v) -- cgit v1.2.3