From 7b0f748efa5af84668cc3609a0070163bfa22607 Mon Sep 17 00:00:00 2001 From: Chad Versace Date: Tue, 20 Sep 2011 13:43:17 -0700 Subject: intel: Add HiZ operations to intel_context::vtbl for all drivers Add the following to the vtbl: hiz_resolve_depthbuffer hiz_resolve_hizbuffer For all drivers for which HiZ is not enabled, the methods are set to be no-ops. If HiZ is enabled, the methods are currently to set to empty stubs. Reviewed-by: Eric Anholt Signed-off-by: Chad Versace --- src/mesa/drivers/dri/i915/i830_vtbl.c | 9 +++++++ src/mesa/drivers/dri/i915/i915_vtbl.c | 9 +++++++ src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_vtbl.c | 15 +++++++++++ src/mesa/drivers/dri/i965/gen6_hiz.c | 40 ++++++++++++++++++++++++++++++ src/mesa/drivers/dri/i965/gen6_hiz.h | 35 ++++++++++++++++++++++++++ src/mesa/drivers/dri/intel/intel_context.h | 16 ++++++++++++ 7 files changed, 125 insertions(+) create mode 100644 src/mesa/drivers/dri/i965/gen6_hiz.c create mode 100644 src/mesa/drivers/dri/i965/gen6_hiz.h diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index d29f9799a86..b30f9812e63 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -885,6 +885,13 @@ i830_is_hiz_depth_format(struct intel_context *intel, gl_format format) return false; } +void +i830_hiz_resolve_noop(struct intel_context *intel, + struct intel_region *region) +{ + /* empty */ +} + void i830InitVtbl(struct i830_context *i830) { @@ -903,4 +910,6 @@ i830InitVtbl(struct i830_context *i830) i830->intel.vtbl.invalidate_state = i830_invalidate_state; i830->intel.vtbl.render_target_supported = i830_render_target_supported; i830->intel.vtbl.is_hiz_depth_format = i830_is_hiz_depth_format; + i830->intel.vtbl.hiz_resolve_depthbuffer = i830_hiz_resolve_noop; + i830->intel.vtbl.hiz_resolve_hizbuffer = i830_hiz_resolve_noop; } diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c index 072a692767a..c73bee41604 100644 --- a/src/mesa/drivers/dri/i915/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915/i915_vtbl.c @@ -852,6 +852,13 @@ i915_is_hiz_depth_format(struct intel_context *intel, return false; } +void +i915_hiz_resolve_noop(struct intel_context *intel, + struct intel_region *region) +{ + /* empty */ +} + static void i915_invalidate_state(struct intel_context *intel, GLuint new_state) { @@ -880,4 +887,6 @@ i915InitVtbl(struct i915_context *i915) i915->intel.vtbl.invalidate_state = i915_invalidate_state; i915->intel.vtbl.render_target_supported = i915_render_target_supported; i915->intel.vtbl.is_hiz_depth_format = i915_is_hiz_depth_format; + i915->intel.vtbl.hiz_resolve_depthbuffer = i915_hiz_resolve_noop; + i915->intel.vtbl.hiz_resolve_hizbuffer = i915_hiz_resolve_noop; } diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources index da7a952e61f..1b9ca6f2321 100644 --- a/src/mesa/drivers/dri/i965/Makefile.sources +++ b/src/mesa/drivers/dri/i965/Makefile.sources @@ -88,6 +88,7 @@ i965_C_SOURCES := \ gen6_clip_state.c \ gen6_depthstencil.c \ gen6_gs_state.c \ + gen6_hiz.c \ gen6_sampler_state.c \ gen6_scissor_state.c \ gen6_sf_state.c \ diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index 8b3677b422e..52be1754a95 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -49,6 +49,8 @@ #include "brw_vs.h" #include "brw_wm.h" +#include "gen6_hiz.h" + #include "glsl/ralloc.h" static void @@ -237,6 +239,11 @@ static bool brw_is_hiz_depth_format(struct intel_context *intel, return intel->has_hiz && (format == MESA_FORMAT_X8_Z24); } +static void brw_hiz_resolve_noop(struct intel_context *intel, + struct intel_region *depth_region) +{ + /* empty */ +} void brwInitVtbl( struct brw_context *brw ) { @@ -254,4 +261,12 @@ void brwInitVtbl( struct brw_context *brw ) brw->intel.vtbl.debug_batch = brw_debug_batch; brw->intel.vtbl.render_target_supported = brw_render_target_supported; brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format; + + if (brw->intel.has_hiz) { + brw->intel.vtbl.hiz_resolve_hizbuffer = gen6_hiz_resolve_hizbuffer; + brw->intel.vtbl.hiz_resolve_depthbuffer = gen6_hiz_resolve_depthbuffer; + } else { + brw->intel.vtbl.hiz_resolve_hizbuffer = brw_hiz_resolve_noop; + brw->intel.vtbl.hiz_resolve_depthbuffer = brw_hiz_resolve_noop; + } } diff --git a/src/mesa/drivers/dri/i965/gen6_hiz.c b/src/mesa/drivers/dri/i965/gen6_hiz.c new file mode 100644 index 00000000000..fc6344b0aa9 --- /dev/null +++ b/src/mesa/drivers/dri/i965/gen6_hiz.c @@ -0,0 +1,40 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "gen6_hiz.h" + +#include + +void +gen6_hiz_resolve_depthbuffer(struct intel_context *intel, + struct intel_region *depth_region) +{ + assert("!stub"); +} + +void +gen6_hiz_resolve_hizbuffer(struct intel_context *intel, + struct intel_region *depth_region) +{ + assert("!stub"); +} diff --git a/src/mesa/drivers/dri/i965/gen6_hiz.h b/src/mesa/drivers/dri/i965/gen6_hiz.h new file mode 100644 index 00000000000..4611182b980 --- /dev/null +++ b/src/mesa/drivers/dri/i965/gen6_hiz.h @@ -0,0 +1,35 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#pragma once + +struct intel_context; +struct intel_region; + +void +gen6_hiz_resolve_depthbuffer(struct intel_context *intel, + struct intel_region *depth_region); + +void +gen6_hiz_resolve_hizbuffer(struct intel_context *intel, + struct intel_region *depth_region); diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index 49bc16705a0..3994883dc47 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -154,6 +154,22 @@ struct intel_context /** Can HiZ be enabled on a depthbuffer of the given format? */ bool (*is_hiz_depth_format)(struct intel_context *intel, gl_format format); + + /** + * \name HiZ operations + * + * See the following sections of the Sandy Bridge PRM, Volume 1, Part2: + * - 7.5.3.1 Depth Buffer Clear + * - 7.5.3.2 Depth Buffer Resolve + * - 7.5.3.3 Hierarchical Depth Buffer Resolve + * \{ + */ + void (*hiz_resolve_depthbuffer)(struct intel_context *intel, + struct intel_region *depth_region); + void (*hiz_resolve_hizbuffer)(struct intel_context *intel, + struct intel_region *depth_region); + /** \} */ + } vtbl; GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */ -- cgit v1.2.3