From 07c83d25fd1c44dbc37677bc0e0ed2a567e900ff Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Tue, 12 Feb 2019 15:03:13 -0500 Subject: radeonsi: add a cs parameter into si_cp_copy_data MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tested-by: Dieter Nützel Acked-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_compute.c | 2 +- src/gallium/drivers/radeonsi/si_cp_dma.c | 9 ++++----- src/gallium/drivers/radeonsi/si_perfcounter.c | 2 +- src/gallium/drivers/radeonsi/si_pipe.h | 2 +- src/gallium/drivers/radeonsi/si_state_draw.c | 2 +- 5 files changed, 8 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index f92ab591036..51da06fe550 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -722,7 +722,7 @@ static void si_setup_tgsi_user_data(struct si_context *sctx, if (info->indirect) { if (program->uses_grid_size) { for (unsigned i = 0; i < 3; ++i) { - si_cp_copy_data(sctx, + si_cp_copy_data(sctx, sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i, COPY_DATA_SRC_MEM, si_resource(info->indirect), info->indirect_offset + 4 * i); diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c index f5c54ca0d52..37ab31a410b 100644 --- a/src/gallium/drivers/radeonsi/si_cp_dma.c +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c @@ -607,18 +607,17 @@ void si_cp_write_data(struct si_context *sctx, struct si_resource *buf, radeon_emit_array(cs, (const uint32_t*)data, size/4); } -void si_cp_copy_data(struct si_context *sctx, +void si_cp_copy_data(struct si_context *sctx, struct radeon_cmdbuf *cs, unsigned dst_sel, struct si_resource *dst, unsigned dst_offset, unsigned src_sel, struct si_resource *src, unsigned src_offset) { - struct radeon_cmdbuf *cs = sctx->gfx_cs; - + /* cs can point to the compute IB, which has the buffer list in gfx_cs. */ if (dst) { - radeon_add_to_buffer_list(sctx, cs, dst, + radeon_add_to_buffer_list(sctx, sctx->gfx_cs, dst, RADEON_USAGE_WRITE, RADEON_PRIO_CP_DMA); } if (src) { - radeon_add_to_buffer_list(sctx, cs, src, + radeon_add_to_buffer_list(sctx, sctx->gfx_cs, src, RADEON_USAGE_READ, RADEON_PRIO_CP_DMA); } diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c index c777dc0ae49..ad7f1eb3d99 100644 --- a/src/gallium/drivers/radeonsi/si_perfcounter.c +++ b/src/gallium/drivers/radeonsi/si_perfcounter.c @@ -671,7 +671,7 @@ static void si_pc_emit_start(struct si_context *sctx, { struct radeon_cmdbuf *cs = sctx->gfx_cs; - si_cp_copy_data(sctx, + si_cp_copy_data(sctx, sctx->gfx_cs, COPY_DATA_DST_MEM, buffer, va - buffer->gpu_address, COPY_DATA_IMM, NULL, 1); diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 369d090d77c..488ae74f4c1 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -1240,7 +1240,7 @@ void si_test_gds(struct si_context *sctx); void si_cp_write_data(struct si_context *sctx, struct si_resource *buf, unsigned offset, unsigned size, unsigned dst_sel, unsigned engine, const void *data); -void si_cp_copy_data(struct si_context *sctx, +void si_cp_copy_data(struct si_context *sctx, struct radeon_cmdbuf *cs, unsigned dst_sel, struct si_resource *dst, unsigned dst_offset, unsigned src_sel, struct si_resource *src, unsigned src_offset); diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index a5dcc042406..4483cee4f4a 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -681,7 +681,7 @@ static void si_emit_draw_packets(struct si_context *sctx, radeon_set_context_reg(cs, R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE, t->stride_in_dw); - si_cp_copy_data(sctx, + si_cp_copy_data(sctx, sctx->gfx_cs, COPY_DATA_REG, NULL, R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE >> 2, COPY_DATA_SRC_MEM, t->buf_filled_size, -- cgit v1.2.3