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29 hoursilo: fix fb height of HiZ opsChia-I Wu1-1/+1
39 hoursilo: correctly propagate resource renames to hardwareChia-I Wu3-14/+30
39 hoursilo: add ilo_resource_get_bo() helperChia-I Wu2-17/+18
40 hoursilo: unblock an inline write with a staging boChia-I Wu1-13/+31
40 hoursilo: try unblocking a transfer with a staging boChia-I Wu4-19/+209
40 hoursilo: enable persistent and coherent transfersChia-I Wu3-8/+35
40 hoursilo: drop ptr from ilo_transferChia-I Wu2-35/+36
40 hoursilo: s/TRANSFER_MAP_UNSYNC/TRANSFER_MAP_GTT_UNSYNC/Chia-I Wu2-6/+6
40 hoursilo: drop unused context param from transfer functionsChia-I Wu1-115/+100
40 hoursilo: tidy up transfer mapping/unmappingChia-I Wu1-88/+89
40 hoursilo: tidy up choose_transfer_method()Chia-I Wu1-84/+164
40 hoursilo: free transfers with util_slab_free()Chia-I Wu1-1/+1
4 daysilo: simplify ilo_flush()Chia-I Wu3-20/+30
6 daysilo: check the tilings of imported handlesChia-I Wu1-30/+36
6 daysilo: clean up resource bo renamingChia-I Wu4-51/+63
6 daysilo: share some code between {tex,buf}_create_boChia-I Wu1-59/+55
6 daysilo: use native 3-component vertex formats on GEN7.5+Chia-I Wu2-1/+6
6 daysilo: allow for device-dependent format translationChia-I Wu5-32/+39
2014-07-16ilo: add some missing formatsChia-I Wu1-21/+22
2014-07-16ilo: update and tailor the surface format tableChia-I Wu1-286/+258
2014-07-15ilo: raise texture size limitsChia-I Wu2-17/+9
2014-07-15ilo: move away from drm_intel_bo_alloc_tiledChia-I Wu5-304/+359
2014-07-08ilo: fix fence reference countingChia-I Wu1-12/+9
2014-07-02targets/dri-ilo: Convert to static/shared pipe-driverEmil Velikov5-104/+10
2014-06-19target-helpers: add dd_configuration(), dd_driver_name()Emil Velikov2-0/+82
2014-05-20egl: Add EGL_CHROMIUM_sync_control extension.Sarah Sharp11-0/+84
2014-05-20Import eglextchromium.h from Chromium.Sarah Sharp3-0/+62
2014-05-10ilo: destroy the mutex, if winsys creation failsEmil Velikov1-0/+1
2014-04-14ilo: remove GPE state size estimationChia-I Wu7-326/+97
2014-04-14ilo: remove GPE command size estimationChia-I Wu6-403/+87
2014-04-14ilo: remove unused headersChia-I Wu3-566/+0
2014-04-14ilo: use only defines from genhw headersChia-I Wu7-106/+87
2014-04-14ilo: scripted conversion to genhw headersChia-I Wu25-1626/+1626
2014-04-14ilo: add genhw headersChia-I Wu22-131/+3504
2014-04-14ilo: avoid brw_wm_barycentric_interp_mode in compilerChia-I Wu1-17/+46
2014-04-14ilo: add TOY_OPCODE_DOChia-I Wu6-7/+10
2014-03-16targets/dri-ilo: make the driver installableChia-I Wu1-4/+3
2014-03-10ilo: do not set I915_EXEC_NO_RELOCChia-I Wu1-11/+1
2014-03-10ilo: add support for PIPE_QUERY_PIPELINE_STATISTICSChia-I Wu4-3/+108
2014-03-10ilo: add ILO_3D_PIPELINE_WRITE_STATISTICSChia-I Wu5-0/+90
2014-03-10ilo: add some MI commands to GPEChia-I Wu4-0/+116
2014-03-10ilo: set PIPE_CONTROL_GLOBAL_GTT_WRITE automaticallyChia-I Wu2-2/+16
2014-03-10ilo: print a warning when PPGTT is disabledChia-I Wu4-0/+24
2014-03-10ilo: require hardware logical context supportChia-I Wu7-14/+32
2014-03-10ilo: protect the decode context with a mutexChia-I Wu1-7/+20
2014-03-10ilo: set I915_EXEC_NO_RELOC when availableChia-I Wu2-3/+15
2014-03-10ilo: move ring types to winsysChia-I Wu8-49/+30
2014-03-10ilo: winsys may limit the batch buffer sizeChia-I Wu7-4/+15
2014-03-10ilo: PIPE_CAP_QUERY_TIMESTAMP may not be supportedChia-I Wu4-1/+19
2014-03-10ilo: rework winsys batch buffer functionsChia-I Wu5-54/+58