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3 daysilo: set INTEL_RELOC_GGTT only on GEN6Chia-I Wu1-7/+17
3 daysilo: fix bound check for 3DSTATE_URB_VSChia-I Wu1-3/+3
3 daysilo: replace cmd by dw0 in GPEChia-I Wu2-167/+236
5 daysgallium/ilo: cleanup intel_winsys.hEmil Velikov7-8/+13
8 daysilo: use genhw command opcodesChia-I Wu5-134/+184
8 daysilo: rename intel_bo_map_unsynchronized()Chia-I Wu4-13/+11
8 daysilo: remove max_batch_sizeChia-I Wu5-14/+4
8 daysilo: replace domains by reloc flagsChia-I Wu11-125/+90
2014-08-19ilo: fix PIPE_CAP_VIDEO_MEMORYChia-I Wu1-2/+2
2014-08-19ilo: enable HiZ in more cases on GEN6Chia-I Wu3-31/+44
2014-08-19ilo: remove layer offsettingChia-I Wu7-393/+27
2014-08-19ilo: migrate to ilo_layoutChia-I Wu8-1454/+213
2014-08-19ilo: add new resource layout codeChia-I Wu3-0/+1779
2014-08-19ilo: fold drm_intel_get_aperture_sizes() within probe_winsys()Emil Velikov4-15/+15
2014-08-15gallium/ilo: handle query_renderer capsEmil Velikov4-1/+38
2014-08-09vc4: Initial skeleton driver import.Eric Anholt34-1/+4628
2014-08-08ilo: break down the format tableChia-I Wu1-299/+431
2014-07-29ilo: fix fb height of HiZ opsChia-I Wu1-1/+1
2014-07-28ilo: correctly propagate resource renames to hardwareChia-I Wu3-14/+30
2014-07-28ilo: add ilo_resource_get_bo() helperChia-I Wu2-17/+18
2014-07-28ilo: unblock an inline write with a staging boChia-I Wu1-13/+31
2014-07-28ilo: try unblocking a transfer with a staging boChia-I Wu4-19/+209
2014-07-28ilo: enable persistent and coherent transfersChia-I Wu3-8/+35
2014-07-28ilo: drop ptr from ilo_transferChia-I Wu2-35/+36
2014-07-28ilo: s/TRANSFER_MAP_UNSYNC/TRANSFER_MAP_GTT_UNSYNC/Chia-I Wu2-6/+6
2014-07-28ilo: drop unused context param from transfer functionsChia-I Wu1-115/+100
2014-07-28ilo: tidy up transfer mapping/unmappingChia-I Wu1-88/+89
2014-07-28ilo: tidy up choose_transfer_method()Chia-I Wu1-84/+164
2014-07-28ilo: free transfers with util_slab_free()Chia-I Wu1-1/+1
2014-07-26ilo: simplify ilo_flush()Chia-I Wu3-20/+30
2014-07-24ilo: check the tilings of imported handlesChia-I Wu1-30/+36
2014-07-24ilo: clean up resource bo renamingChia-I Wu4-51/+63
2014-07-24ilo: share some code between {tex,buf}_create_boChia-I Wu1-59/+55
2014-07-24ilo: use native 3-component vertex formats on GEN7.5+Chia-I Wu2-1/+6
2014-07-24ilo: allow for device-dependent format translationChia-I Wu5-32/+39
2014-07-16ilo: add some missing formatsChia-I Wu1-21/+22
2014-07-16ilo: update and tailor the surface format tableChia-I Wu1-286/+258
2014-07-15ilo: raise texture size limitsChia-I Wu2-17/+9
2014-07-15ilo: move away from drm_intel_bo_alloc_tiledChia-I Wu5-304/+359
2014-07-08ilo: fix fence reference countingChia-I Wu1-12/+9
2014-07-02targets/dri-ilo: Convert to static/shared pipe-driverEmil Velikov5-104/+10
2014-06-19target-helpers: add dd_configuration(), dd_driver_name()Emil Velikov2-0/+82
2014-05-20egl: Add EGL_CHROMIUM_sync_control extension.Sarah Sharp11-0/+84
2014-05-20Import eglextchromium.h from Chromium.Sarah Sharp3-0/+62
2014-05-10ilo: destroy the mutex, if winsys creation failsEmil Velikov1-0/+1
2014-04-14ilo: remove GPE state size estimationChia-I Wu7-326/+97
2014-04-14ilo: remove GPE command size estimationChia-I Wu6-403/+87
2014-04-14ilo: remove unused headersChia-I Wu3-566/+0
2014-04-14ilo: use only defines from genhw headersChia-I Wu7-106/+87
2014-04-14ilo: scripted conversion to genhw headersChia-I Wu25-1626/+1626