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AgeCommit message (Expand)AuthorFilesLines
40 hoursi965/fs: Emit compressed BFI2 instructions on Gen > 7.Matt Turner1-1/+1
2014-08-12i965/vp: Use the sampler for pull constant loads on Gen7/7.5.Kenneth Graunke1-5/+12
2014-08-12i965/eu: Emulate F32TO16 and F16TO32 on Broadwell.Kenneth Graunke1-2/+50
2014-08-12i965/fs: Don't set flag_subreg_nr = 1 on predicated FB write setup.Kenneth Graunke1-0/+1
2014-08-11i965/eu: Use Haswell atomic messages on Broadwell.Kenneth Graunke1-2/+2
2014-08-04mesa: Actually use the Mesa IR optimizer for ARB programs.Kenneth Graunke1-0/+7
2014-07-28glapi: add indexed blend functions (GL 4.0)Tapani Pälli2-5/+31
2014-07-24Add an accelerated version of F_TO_I for x86_64Jason Ekstrand1-1/+5
2014-07-16Revert "i965: Implement GL_PRIMITIVES_GENERATED with non-zero streams."Kenneth Graunke2-26/+7
2014-07-16ilo: add some missing formatsChia-I Wu1-21/+22
2014-07-07i965/fs: Disable unlit_centroid_workaround on Haswell.Matt Turner1-2/+4
2014-06-30i965/disasm: Improve disassembly of atomic messages on Haswell+.Kenneth Graunke1-7/+21
2014-06-26i965: Extend is_haswell checks to gen >= 8 in Gen4-7 generators.Kenneth Graunke2-7/+7
2014-06-23i965: Allow the blorp blit between BGR and RGBNeil Roberts1-7/+21
2014-06-17i965: Use 8x4 aligned rectangles for HiZ operations on Broadwell.Kenneth Graunke1-4/+16
2014-06-12i965: Fix Haswell discard regressions since Gen4-5 line AA fix.Kenneth Graunke1-2/+7
2014-05-30i965: Fix Line Stipple enable bit in 3DSTATE_SF for Haswell.Pavel Popov1-1/+1
2014-04-20i965: Use ctx->Texture._MaxEnabledTexImageUnit for upper boundChris Forbes2-2/+4
2014-04-17meta: Clip src/dest rects in BlitFramebuffer, using the scissorChris Forbes2-2/+43
2014-04-10i965: Pretend we don't support BRW_SURFACEFORMAT_R16G16B16_FLOAT for textures.Chris Forbes1-1/+1
2014-03-25i965: Set Broadwell MOCS values everywhere it's possible.Kenneth Graunke6-12/+27
2014-03-18i965: Allocate register sets at screen creation, not context creation.Kenneth Graunke6-88/+88
2014-03-02i965: Widen sampler key bitfields for 32 samplersChris Forbes1-3/+3
2014-02-27i965: Only emit VS state pipe control workaround on IVB and BYT.Kenneth Graunke3-3/+5
2014-02-20i965: Store absolute thread count in max_wm_threads on Broadwell.Kenneth Graunke2-2/+5
2014-02-11i965/vec4: Support arbitrarily large sampler indices on Broadwell+.Kenneth Graunke1-3/+22
2014-02-11i965/fs: Support arbitrarily large sampler indices on Broadwell+.Kenneth Graunke1-1/+18
2014-02-01i965: Update BLEND_STATE for Broadwell.Kenneth Graunke4-1/+216
2014-01-23i965: Support 32 texture image units on Haswell+.Kenneth Graunke2-4/+7
2014-01-23i965/vec4: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2-3/+26
2014-01-23i965/fs: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2-2/+22
2014-01-19i965: Double the push constant space multipliers on Broadwell too.Kenneth Graunke1-2/+4
2014-01-19i965: Add a new infrastructure for generating Broadwell shader assembly.Kenneth Graunke3-0/+842
2014-01-14i965: Emit 3DSTATE_VF on Broadwell too.Kenneth Graunke1-1/+1
2014-01-14i965: Disable workaround flush for push constants on Broadwell.Kenneth Graunke1-1/+1
2014-01-14ilo: emit gen7_wa_pipe_control_wm_max_threads_stall on HaswellChia-I Wu1-7/+9
2014-01-07glsl: Optimize pow(2, x) --> exp2(x).Kenneth Graunke1-0/+11
2013-12-20i965: Add BRW_REGISTER_TYPE_DF.Kenneth Graunke3-0/+6
2013-12-14i965: Treat Haswell as 75 in the surface format table.Kenneth Graunke1-1/+1
2013-12-07i965: Don't flag gather quirks for Gen8+Chris Forbes1-1/+1
2013-12-07i965/wm: Set copy of sample mask in 3DSTATE_PS correctly for HaswellChris Forbes1-2/+7
2013-12-07i965: refactor sample mask calculationChris Forbes4-33/+41
2013-12-03i965: Add extra-alignment for non-msrt fast color clear for all hw (v2)Chad Versace1-24/+11
2013-12-02i965: Fix texture swizzling on Broadwell.Kenneth Graunke1-1/+1
2013-12-02i965/hsw: Apply non-msrt fast color clear w/a to all HSW GTsChad Versace1-6/+12
2013-11-20i965/fs: Emit compressed 3-source instructions on Haswell.Matt Turner1-3/+3
2013-11-04i965/gen7: Add instruction latency estimates for untyped atomics and reads.Francisco Jerez1-0/+39
2013-10-31i965: Enable ARB_transform_feedback2 on Gen7+ if register writes work.Kenneth Graunke1-1/+61
2013-10-23i965/fs: Only unroll high-accuracy dFdy() from SIMD16 to SIMD8 on gen4 and IVB.Paul Berry1-10/+27
2013-10-15i965/gs: Set the REORDER bit in 3DSTATE_GS.Paul Berry2-0/+29