diff options
author | Anuj Phogat <anuj.phogat@gmail.com> | 2021-03-04 15:30:41 -0800 |
---|---|---|
committer | Marge Bot <eric+marge@anholt.net> | 2021-03-16 16:40:12 +0000 |
commit | e66e8a0109b67c19779ac3e3e2db01b739a47895 (patch) | |
tree | 0e31f852f2039556cfbfae7f37b73f73b0650396 | |
parent | 1d0295ea2ca92c10e627841d8985fbce26883243 (diff) |
intel: Remove GEN_IS_G4X macro
GEN_GEN and GEN_VERSIONx10 macros provide a consistent way to do platform
version checks. We can avoid platform specific macros.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9608>
-rw-r--r-- | src/intel/genxml/gen_macros.h | 1 | ||||
-rw-r--r-- | src/intel/isl/isl_surface_state.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/genX_pipe_control.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/genX_state_upload.c | 6 |
4 files changed, 6 insertions, 7 deletions
diff --git a/src/intel/genxml/gen_macros.h b/src/intel/genxml/gen_macros.h index 838b28d20be..56af7093449 100644 --- a/src/intel/genxml/gen_macros.h +++ b/src/intel/genxml/gen_macros.h @@ -57,7 +57,6 @@ #endif #define GEN_GEN ((GEN_VERSIONx10) / 10) -#define GEN_IS_G4X ((GEN_VERSIONx10) == 45) /* Prefixing macros */ #if (GEN_VERSIONx10 == 40) diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index 1fcd24ef9f6..d73718d3acf 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl/isl_surface_state.c @@ -547,7 +547,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state, s.MOCS = info->mocs; #endif -#if GEN_GEN > 4 || GEN_IS_G4X +#if GEN_GEN > 4 || GEN_VERSIONx10 == 45 if (info->x_offset_sa != 0 || info->y_offset_sa != 0) { /* There are fairly strict rules about when the offsets can be used. * These are mostly taken from the Sky Lake PRM documentation for diff --git a/src/mesa/drivers/dri/i965/genX_pipe_control.c b/src/mesa/drivers/dri/i965/genX_pipe_control.c index 55585f548a7..d0f244b7b88 100644 --- a/src/mesa/drivers/dri/i965/genX_pipe_control.c +++ b/src/mesa/drivers/dri/i965/genX_pipe_control.c @@ -492,14 +492,14 @@ genX(emit_raw_pipe_control)(struct brw_context *brw, uint32_t flags, pc.InstructionCacheInvalidateEnable = flags & PIPE_CONTROL_INSTRUCTION_INVALIDATE; pc.NotifyEnable = flags & PIPE_CONTROL_NOTIFY_ENABLE; - #if GEN_GEN >= 5 || GEN_IS_G4X + #if GEN_GEN >= 5 || GEN_VERSIONx10 == 45 pc.IndirectStatePointersDisable = flags & PIPE_CONTROL_INDIRECT_STATE_POINTERS_DISABLE; #endif #if GEN_GEN >= 6 pc.TextureCacheInvalidationEnable = flags & PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE; - #elif GEN_GEN == 5 || GEN_IS_G4X + #elif GEN_GEN == 5 || GEN_VERSIONx10 == 45 pc.TextureCacheFlushEnable = flags & PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE; #endif diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index 633d57b2864..a6c780f5115 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -1332,7 +1332,7 @@ genX(upload_clip_state)(struct brw_context *brw) ctx->Transform.DepthClampFar); /* _NEW_TRANSFORM */ - if (GEN_GEN == 5 || GEN_IS_G4X) { + if (GEN_GEN == 5 || GEN_VERSIONx10 == 45) { clip.UserClipDistanceClipTestEnableBitmask = ctx->Transform.ClipPlanesEnabled; } else { @@ -1352,7 +1352,7 @@ genX(upload_clip_state)(struct brw_context *brw) clip.ClipMode = brw->clip.prog_data->clip_mode; -#if GEN_IS_G4X +#if GEN_VERSIONx10 == 45 clip.NegativeWClipTestEnable = true; #endif } @@ -1679,7 +1679,7 @@ genX(upload_sf)(struct brw_context *brw) sf.SmoothPointEnable = false; #endif -#if GEN_IS_G4X || GEN_GEN >= 5 +#if GEN_VERSIONx10 == 45 || GEN_GEN >= 5 sf.AALineDistanceMode = AALINEDISTANCE_TRUE; #endif |