i965: Convert SF_STATE to genxml.

This patch finishes the work done by Ken of converting SF_STATE to genxml, and
merges it with gen6+ code for emitting that state.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

5 files changed, 83 insertions, 288 deletions

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources
index 041cd079884..8bac8039ce2 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -45,7 +45,6 @@ i965_FILES = \
 	brw_reset.c \
 	brw_sampler_state.c \
 	brw_sf.c \
-	brw_sf_state.c \
 	brw_state_batch.c \
 	brw_state.h \
 	brw_state_upload.c \
diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c
deleted file mode 100644
index 0c3cbce2d20..00000000000
--- a/src/mesa/drivers/dri/i965/brw_sf_state.c
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics to
- develop this 3D driver.
-
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
-
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keithw@vmware.com>
-  */
-
-
-
-#include "main/mtypes.h"
-#include "main/macros.h"
-#include "main/fbobject.h"
-#include "main/viewport.h"
-#include "intel_batchbuffer.h"
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "brw_util.h"
-
-static void upload_sf_unit( struct brw_context *brw )
-{
-   struct gl_context *ctx = &brw->ctx;
-   struct brw_sf_unit_state *sf;
-   int chipset_max_threads;
-   bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
-
-   sf = brw_state_batch(brw, sizeof(*sf), 64, &brw->sf.state_offset);
-
-   memset(sf, 0, sizeof(*sf));
-
-   /* BRW_NEW_PROGRAM_CACHE | BRW_NEW_SF_PROG_DATA */
-   sf->thread0.grf_reg_count = ALIGN(brw->sf.prog_data->total_grf, 16) / 16 - 1;
-   sf->thread0.kernel_start_pointer =
-      brw_program_reloc(brw,
-			brw->sf.state_offset +
-			offsetof(struct brw_sf_unit_state, thread0),
-			brw->sf.prog_offset +
-			(sf->thread0.grf_reg_count << 1)) >> 6;
-
-   sf->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
-
-   sf->thread3.dispatch_grf_start_reg = 3;
-   sf->thread3.urb_entry_read_offset = BRW_SF_URB_ENTRY_READ_OFFSET;
-
-   /* BRW_NEW_SF_PROG_DATA */
-   sf->thread3.urb_entry_read_length = brw->sf.prog_data->urb_read_length;
-
-   /* BRW_NEW_URB_FENCE */
-   sf->thread4.nr_urb_entries = brw->urb.nr_sf_entries;
-   sf->thread4.urb_entry_allocation_size = brw->urb.sfsize - 1;
-
-   /* Each SF thread produces 1 PUE, and there can be up to 24 (Pre-Ironlake) or
-    * 48 (Ironlake) threads.
-    */
-   if (brw->gen == 5)
-      chipset_max_threads = 48;
-   else
-      chipset_max_threads = 24;
-
-   /* BRW_NEW_URB_FENCE */
-   sf->thread4.max_threads = MIN2(chipset_max_threads,
-				  brw->urb.nr_sf_entries) - 1;
-
-   /* BRW_NEW_SF_VP */
-   sf->sf5.sf_viewport_state_offset = (brw->batch.bo->offset64 +
-				       brw->sf.vp_offset) >> 5; /* reloc */
-
-   sf->sf5.viewport_transform = 1;
-
-   sf->sf6.scissor = 1;
-
-   /* _NEW_POLYGON */
-   if (ctx->Polygon._FrontBit)
-      sf->sf5.front_winding = BRW_FRONTWINDING_CW;
-   else
-      sf->sf5.front_winding = BRW_FRONTWINDING_CCW;
-
-   /* _NEW_BUFFERS
-    * The viewport is inverted for rendering to a FBO, and that inverts
-    * polygon front/back orientation.
-    */
-   sf->sf5.front_winding ^= render_to_fbo;
-
-   /* _NEW_POLYGON */
-   switch (ctx->Polygon.CullFlag ? ctx->Polygon.CullFaceMode : GL_NONE) {
-   case GL_FRONT:
-      sf->sf6.cull_mode = BRW_CULLMODE_FRONT;
-      break;
-   case GL_BACK:
-      sf->sf6.cull_mode = BRW_CULLMODE_BACK;
-      break;
-   case GL_FRONT_AND_BACK:
-      sf->sf6.cull_mode = BRW_CULLMODE_BOTH;
-      break;
-   case GL_NONE:
-      sf->sf6.cull_mode = BRW_CULLMODE_NONE;
-      break;
-   default:
-      unreachable("not reached");
-   }
-
-   /* _NEW_LINE */
-   sf->sf6.line_width = U_FIXED(brw_get_line_width(brw), 1);
-
-   if (ctx->Line.SmoothFlag) {
-      sf->sf6.aa_enable = 1;
-      sf->sf6.line_endcap_aa_region_width = 1;
-   }
-
-   sf->sf6.point_rast_rule = BRW_RASTRULE_UPPER_RIGHT;
-
-   /* _NEW_POINT */
-   sf->sf7.sprite_point = ctx->Point.PointSprite;
-
-   float point_sz;
-   point_sz = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
-   point_sz = CLAMP(point_sz, 0.125f, 255.875f);
-   sf->sf7.point_size = U_FIXED(point_sz, 3);
-
-   /* _NEW_PROGRAM | _NEW_POINT, BRW_NEW_VUE_MAP_GEOM_OUT */
-   sf->sf7.use_point_size_state = use_state_point_size(brw);
-   sf->sf7.aa_line_distance_mode = brw->is_g4x || brw->gen == 5;
-
-   /* might be BRW_NEW_PRIMITIVE if we have to adjust pv for polygons:
-    * _NEW_LIGHT
-    */
-   if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
-      sf->sf7.trifan_pv = 2;
-      sf->sf7.linestrip_pv = 1;
-      sf->sf7.tristrip_pv = 2;
-   } else {
-      sf->sf7.trifan_pv = 1;
-      sf->sf7.linestrip_pv = 0;
-      sf->sf7.tristrip_pv = 0;
-   }
-   sf->sf7.line_last_pixel_enable = 0;
-
-   /* Set bias for OpenGL rasterization rules:
-    */
-   sf->sf6.dest_org_vbias = 0x8;
-   sf->sf6.dest_org_hbias = 0x8;
-
-   /* STATE_PREFETCH command description describes this state as being
-    * something loaded through the GPE (L2 ISC), so it's INSTRUCTION domain.
-    */
-
-   /* Emit SF viewport relocation */
-   brw_emit_reloc(&brw->batch,
-                  brw->sf.state_offset +
-		  offsetof(struct brw_sf_unit_state, sf5),
-                  brw->batch.bo,
-                  brw->sf.vp_offset | sf->sf5.front_winding |
-                  (sf->sf5.viewport_transform << 1),
-                  I915_GEM_DOMAIN_INSTRUCTION, 0);
-
-   brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE;
-}
-
-const struct brw_tracked_state brw_sf_unit = {
-   .dirty = {
-      .mesa  = _NEW_BUFFERS |
-               _NEW_LIGHT |
-               _NEW_LINE |
-               _NEW_POINT |
-               _NEW_POLYGON |
-               _NEW_PROGRAM,
-      .brw   = BRW_NEW_BATCH |
-               BRW_NEW_BLORP |
-               BRW_NEW_PROGRAM_CACHE |
-               BRW_NEW_SF_PROG_DATA |
-               BRW_NEW_SF_VP |
-               BRW_NEW_VUE_MAP_GEOM_OUT |
-               BRW_NEW_URB_FENCE,
-   },
-   .emit = upload_sf_unit,
-};
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index d9c35c0e16a..5f5ba647f75 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -58,7 +58,6 @@ extern const struct brw_tracked_state brw_gs_unit;
 extern const struct brw_tracked_state brw_binding_table_pointers;
 extern const struct brw_tracked_state brw_depthbuffer;
 extern const struct brw_tracked_state brw_recalculate_urb_fence;
-extern const struct brw_tracked_state brw_sf_unit;
 extern const struct brw_tracked_state brw_sf_vp;
 extern const struct brw_tracked_state brw_vs_samplers;
 extern const struct brw_tracked_state brw_tcs_samplers;
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index 73641da74a4..6d3f80dab19 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -272,65 +272,6 @@ struct brw_cc_unit_state
    } cc7;
 };
 
-struct brw_sf_unit_state
-{
-   struct thread0 thread0;
-   struct thread1 thread1;
-   struct thread2 thread2;
-   struct thread3 thread3;
-
-   struct
-   {
-      unsigned pad0:10;
-      unsigned stats_enable:1;
-      unsigned nr_urb_entries:7;
-      unsigned pad1:1;
-      unsigned urb_entry_allocation_size:5;
-      unsigned pad2:1;
-      unsigned max_threads:6;
-      unsigned pad3:1;
-   } thread4;
-
-   struct
-   {
-      unsigned front_winding:1;
-      unsigned viewport_transform:1;
-      unsigned pad0:3;
-      unsigned sf_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */
-   } sf5;
-
-   struct
-   {
-      unsigned pad0:9;
-      unsigned dest_org_vbias:4;
-      unsigned dest_org_hbias:4;
-      unsigned scissor:1;
-      unsigned disable_2x2_trifilter:1;
-      unsigned disable_zero_pix_trifilter:1;
-      unsigned point_rast_rule:2;
-      unsigned line_endcap_aa_region_width:2;
-      unsigned line_width:4;
-      unsigned fast_scissor_disable:1;
-      unsigned cull_mode:2;
-      unsigned aa_enable:1;
-   } sf6;
-
-   struct
-   {
-      unsigned point_size:11;
-      unsigned use_point_size_state:1;
-      unsigned subpixel_precision:1;
-      unsigned sprite_point:1;
-      unsigned aa_line_distance_mode:1;
-      unsigned pad0:10;
-      unsigned trifan_pv:2;
-      unsigned linestrip_pv:2;
-      unsigned tristrip_pv:2;
-      unsigned line_last_pixel_enable:1;
-   } sf7;
-
-};
-
 struct brw_gs_unit_state
 {
    struct thread0 thread0;
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index a5ad2ca4739..a5a9d51bde4 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -154,6 +154,29 @@ vertex_bo(struct brw_bo *bo, uint32_t offset)
    };
 }
 
+#if GEN_GEN == 4
+static inline struct brw_address
+KSP(struct brw_context *brw, uint32_t offset)
+{
+   return instruction_bo(brw->cache.bo, offset);
+}
+
+static inline struct brw_address
+KSP_ro(struct brw_context *brw, uint32_t offset)
+{
+   return instruction_ro_bo(brw->cache.bo, offset);
+}
+#else
+static inline uint32_t
+KSP(struct brw_context *brw, uint32_t offset)
+{
+   return offset;
+}
+
+#define KSP_ro KSP
+
+#endif
+
 #include "genxml/genX_pack.h"
 
 #define _brw_cmd_length(cmd) cmd ## _length
@@ -1357,7 +1380,6 @@ static const struct brw_tracked_state genX(clip_state) = {
 
 /* ---------------------------------------------------------------------- */
 
-#if GEN_GEN >= 6
 static void
 genX(upload_sf)(struct brw_context *brw)
 {
@@ -1367,11 +1389,48 @@ genX(upload_sf)(struct brw_context *brw)
 #if GEN_GEN <= 7
    /* _NEW_BUFFERS */
    bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
-   const bool multisampled_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
+   UNUSED const bool multisampled_fbo =
+      _mesa_geometric_samples(ctx->DrawBuffer) > 1;
 #endif
 
+#if GEN_GEN < 6
+   const struct brw_sf_prog_data *sf_prog_data = brw->sf.prog_data;
+
+   ctx->NewDriverState |= BRW_NEW_GEN4_UNIT_STATE;
+
+   brw_state_emit(brw, GENX(SF_STATE), 64, &brw->sf.state_offset, sf) {
+      sf.KernelStartPointer = KSP_ro(brw, brw->sf.prog_offset);
+      sf.FloatingPointMode = FLOATING_POINT_MODE_Alternate;
+      sf.GRFRegisterCount = DIV_ROUND_UP(sf_prog_data->total_grf, 16) - 1;
+      sf.DispatchGRFStartRegisterForURBData = 3;
+      sf.VertexURBEntryReadOffset = BRW_SF_URB_ENTRY_READ_OFFSET;
+      sf.VertexURBEntryReadLength = sf_prog_data->urb_read_length;
+      sf.NumberofURBEntries = brw->urb.nr_sf_entries;
+      sf.URBEntryAllocationSize = brw->urb.sfsize - 1;
+
+      /* STATE_PREFETCH command description describes this state as being
+       * something loaded through the GPE (L2 ISC), so it's INSTRUCTION
+       * domain.
+       */
+      sf.SetupViewportStateOffset =
+         instruction_ro_bo(brw->batch.bo, brw->sf.vp_offset);
+
+      sf.PointRasterizationRule = RASTRULE_UPPER_RIGHT;
+
+      /* sf.ConstantURBEntryReadLength = stage_prog_data->curb_read_length; */
+      /* sf.ConstantURBEntryReadOffset = brw->curbe.vs_start * 2; */
+
+      sf.MaximumNumberofThreads =
+         MIN2(GEN_GEN == 5 ? 48 : 24, brw->urb.nr_sf_entries) - 1;
+
+      sf.SpritePointEnable = ctx->Point.PointSprite;
+
+      sf.DestinationOriginHorizontalBias = 0.5;
+      sf.DestinationOriginVerticalBias = 0.5;
+#else
    brw_batch_emit(brw, GENX(3DSTATE_SF), sf) {
       sf.StatisticsEnable = true;
+#endif
       sf.ViewportTransformEnable = true;
 
 #if GEN_GEN == 7
@@ -1382,6 +1441,7 @@ genX(upload_sf)(struct brw_context *brw)
 #if GEN_GEN <= 7
       /* _NEW_POLYGON */
       sf.FrontWinding = ctx->Polygon._FrontBit == render_to_fbo;
+#if GEN_GEN >= 6
       sf.GlobalDepthOffsetEnableSolid = ctx->Polygon.OffsetFill;
       sf.GlobalDepthOffsetEnableWireframe = ctx->Polygon.OffsetLine;
       sf.GlobalDepthOffsetEnablePoint = ctx->Polygon.OffsetPoint;
@@ -1414,6 +1474,14 @@ genX(upload_sf)(struct brw_context *brw)
             unreachable("not reached");
       }
 
+      if (multisampled_fbo && ctx->Multisample.Enabled)
+         sf.MultisampleRasterizationMode = MSRASTMODE_ON_PATTERN;
+
+      sf.GlobalDepthOffsetConstant = ctx->Polygon.OffsetUnits * 2;
+      sf.GlobalDepthOffsetScale = ctx->Polygon.OffsetFactor;
+      sf.GlobalDepthOffsetClamp = ctx->Polygon.OffsetClamp;
+#endif
+
       sf.ScissorRectangleEnable = true;
 
       if (ctx->Polygon.CullFlag) {
@@ -1438,12 +1506,6 @@ genX(upload_sf)(struct brw_context *brw)
       sf.LineStippleEnable = ctx->Line.StippleFlag;
 #endif
 
-      if (multisampled_fbo && ctx->Multisample.Enabled)
-         sf.MultisampleRasterizationMode = MSRASTMODE_ON_PATTERN;
-
-      sf.GlobalDepthOffsetConstant = ctx->Polygon.OffsetUnits * 2;
-      sf.GlobalDepthOffsetScale = ctx->Polygon.OffsetFactor;
-      sf.GlobalDepthOffsetClamp = ctx->Polygon.OffsetClamp;
 #endif
 
       /* _NEW_LINE */
@@ -1479,7 +1541,9 @@ genX(upload_sf)(struct brw_context *brw)
          sf.SmoothPointEnable = true;
 #endif
 
+#if GEN_IS_G4X || GEN_GEN >= 5
       sf.AALineDistanceMode = AALINEDISTANCE_TRUE;
+#endif
 
       /* _NEW_LIGHT */
       if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
@@ -1529,14 +1593,21 @@ static const struct brw_tracked_state genX(sf_state) = {
    .dirty = {
       .mesa  = _NEW_LIGHT |
                _NEW_LINE |
-               _NEW_MULTISAMPLE |
                _NEW_POINT |
                _NEW_PROGRAM |
+               (GEN_GEN >= 6 ? _NEW_MULTISAMPLE : 0) |
                (GEN_GEN <= 7 ? _NEW_BUFFERS | _NEW_POLYGON : 0),
       .brw   = BRW_NEW_BLORP |
-               BRW_NEW_CONTEXT |
                BRW_NEW_VUE_MAP_GEOM_OUT |
-               (GEN_GEN <= 7 ? BRW_NEW_GS_PROG_DATA |
+               (GEN_GEN <= 5 ? BRW_NEW_BATCH |
+                               BRW_NEW_PROGRAM_CACHE |
+                               BRW_NEW_SF_PROG_DATA |
+                               BRW_NEW_SF_VP |
+                               BRW_NEW_URB_FENCE
+                             : 0) |
+               (GEN_GEN >= 6 ? BRW_NEW_CONTEXT : 0) |
+               (GEN_GEN >= 6 && GEN_GEN <= 7 ?
+                               BRW_NEW_GS_PROG_DATA |
                                BRW_NEW_PRIMITIVE |
                                BRW_NEW_TES_PROG_DATA
                              : 0) |
@@ -1546,7 +1617,6 @@ static const struct brw_tracked_state genX(sf_state) = {
    },
    .emit = genX(upload_sf),
 };
-#endif
 
 /* ---------------------------------------------------------------------- */
 
@@ -1731,20 +1801,6 @@ static const struct brw_tracked_state genX(wm_state) = {
 
 /* ---------------------------------------------------------------------- */
 
-#if GEN_GEN == 4
-static inline struct brw_address
-KSP(struct brw_context *brw, uint32_t offset)
-{
-   return instruction_bo(brw->cache.bo, offset);
-}
-#else
-static inline uint32_t
-KSP(struct brw_context *brw, uint32_t offset)
-{
-   return offset;
-}
-#endif
-
 #define INIT_THREAD_DISPATCH_FIELDS(pkt, prefix) \
    pkt.KernelStartPointer = KSP(brw, stage_state->prog_offset);           \
    pkt.SamplerCount       =                                               \
@@ -4178,7 +4234,7 @@ genX(init_atoms)(struct brw_context *brw)
       /* These set up state for brw_psp_urb_cbs */
       &brw_wm_unit,
       &genX(sf_clip_viewport),
-      &brw_sf_unit,
+      &genX(sf_state),
       &genX(vs_state), /* always required, enabled or not */
       &brw_clip_unit,
       &brw_gs_unit,