diff options
| author | Connor Abbott <connor.abbott@intel.com> | 2014-08-01 14:13:31 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2014-10-15 17:04:47 -0700 |
| commit | a71455bc992975d11660871b9e46cc88edf16e2e (patch) | |
| tree | 65cc724da8f39e3ae306cecc621f9b759bbba2ed | |
| parent | 1f76fcf231cf7c8c19586e93ba8e4d800ad3be72 (diff) | |
i965/fs: don't use ir->offset in emit_texture_gen5.
v2 (Ken): Refactor the Gen7 code separately; rebase.
Signed-off-by: Connor Abbott <connor.abbott@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.h | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 8 |
3 files changed, 8 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index bba8d08ca89..f127b3ad0b7 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -475,7 +475,8 @@ public: uint32_t sampler); fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate, fs_reg shadow_comp, fs_reg lod, fs_reg lod2, - fs_reg sample_index, uint32_t sampler); + fs_reg sample_index, uint32_t sampler, + bool has_offset); fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate, fs_reg shadow_comp, fs_reg lod, fs_reg lod2, fs_reg sample_index, fs_reg mcs, fs_reg sampler, diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp index fb24c5897c2..b1745dd2cb6 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp @@ -490,7 +490,7 @@ fs_visitor::emit_fragment_program_code() if (brw->gen >= 7) { inst = emit_texture_gen7(ir, dst, coordinate, shadow_c, lod, dpdy, sample_index, fs_reg(0u), fs_reg(fpi->TexSrcUnit), texel_offset); } else if (brw->gen >= 5) { - inst = emit_texture_gen5(ir, dst, coordinate, shadow_c, lod, dpdy, sample_index, fpi->TexSrcUnit); + inst = emit_texture_gen5(ir, dst, coordinate, shadow_c, lod, dpdy, sample_index, fpi->TexSrcUnit, false); } else { inst = emit_texture_gen4(ir, dst, coordinate, shadow_c, lod, dpdy, fpi->TexSrcUnit); } diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index e4b87bbd5da..45c7570b3ac 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -1341,7 +1341,8 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate, fs_inst * fs_visitor::emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate, fs_reg shadow_c, fs_reg lod, fs_reg lod2, - fs_reg sample_index, uint32_t sampler) + fs_reg sample_index, uint32_t sampler, + bool has_offset) { int reg_width = dispatch_width / 8; bool header_present = false; @@ -1351,7 +1352,7 @@ fs_visitor::emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate, fs_reg message(MRF, 2, BRW_REGISTER_TYPE_F, dispatch_width); fs_reg msg_coords = message; - if (ir->offset) { + if (has_offset) { /* The offsets set up by the ir_texture visitor are in the * m1 header, so we can't go headerless. */ @@ -1998,7 +1999,8 @@ fs_visitor::visit(ir_texture *ir) offset_value); } else if (brw->gen >= 5) { inst = emit_texture_gen5(ir, dst, coordinate, shadow_comparitor, - lod, lod2, sample_index, sampler); + lod, lod2, sample_index, sampler, + ir->offset != NULL); } else { inst = emit_texture_gen4(ir, dst, coordinate, shadow_comparitor, lod, lod2, sampler); |