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authorAlex Deucher <alexdeucher@gmail.com>2010-01-16 03:56:55 (GMT)
committerAlex Deucher <alexdeucher@gmail.com>2010-01-16 04:06:18 (GMT)
commit8b704396a32f054e1a896ea2ee17506580793b30 (patch)
tree81a1749707558ce312f374765290d0cb76bb34cb
parent7283a246ce659e69ea9931098a8076848be4b9da (diff)
r600: improve blit support
- fill in more src/dst formats - disable depth copies for now - set proper data formats in render target regs - fill in additional default state The swizzles on some of the less used mesa formats are probably wrong.
-rw-r--r--src/mesa/drivers/dri/r600/r600_blit.c1319
-rw-r--r--src/mesa/drivers/dri/r600/r600_context.h2
2 files changed, 1074 insertions, 247 deletions
diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c
index 6ea1a07..19071ef 100644
--- a/src/mesa/drivers/dri/r600/r600_blit.c
+++ b/src/mesa/drivers/dri/r600/r600_blit.c
@@ -32,99 +32,266 @@
#include "r600_blit_shaders.h"
#include "r600_cmdbuf.h"
-static uint32_t mesa_format_to_cb_format(gl_format mesa_format)
+static inline void
+set_render_target(context_t *context, struct radeon_bo *bo, gl_format mesa_format,
+ int pitch, int w, int h, intptr_t dst_offset)
{
- uint32_t comp_swap, format, color_info = 0;
- //fprintf(stderr,"format for copy %s\n",_mesa_get_format_name(mesa_format));
+ uint32_t cb_color0_base, cb_color0_size = 0, cb_color0_info = 0, cb_color0_view = 0;
+ int nPitchInPixel, id = 0;
+ uint32_t comp_swap, format, bpp = _mesa_get_format_bytes(mesa_format);
+ BATCH_LOCALS(&context->radeon);
+
+ cb_color0_base = dst_offset / 256;
+
+ nPitchInPixel = pitch/bpp;
+ SETfield(cb_color0_size, (nPitchInPixel / 8) - 1,
+ PITCH_TILE_MAX_shift, PITCH_TILE_MAX_mask);
+ SETfield(cb_color0_size, ((nPitchInPixel * h) / 64) - 1,
+ SLICE_TILE_MAX_shift, SLICE_TILE_MAX_mask);
+
+ SETfield(cb_color0_info, ENDIAN_NONE, ENDIAN_shift, ENDIAN_mask);
+ SETfield(cb_color0_info, ARRAY_LINEAR_GENERAL,
+ CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask);
+
+ SETbit(cb_color0_info, BLEND_BYPASS_bit);
+
switch(mesa_format) {
- /* XXX check and add these */
- case MESA_FORMAT_RGBA8888:
+ case MESA_FORMAT_RGBA8888:
+ format = COLOR_8_8_8_8;
+ comp_swap = SWAP_STD_REV;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_SIGNED_RGBA8888:
+ format = COLOR_8_8_8_8;
+ comp_swap = SWAP_STD_REV;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_SNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_RGBA8888_REV:
+ format = COLOR_8_8_8_8;
+ comp_swap = SWAP_STD;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_SIGNED_RGBA8888_REV:
+ format = COLOR_8_8_8_8;
+ comp_swap = SWAP_STD;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_SNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_ARGB8888:
+ case MESA_FORMAT_XRGB8888:
+ format = COLOR_8_8_8_8;
+ comp_swap = SWAP_ALT;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_ARGB8888_REV:
+ case MESA_FORMAT_XRGB8888_REV:
+ format = COLOR_8_8_8_8;
+ comp_swap = SWAP_ALT_REV;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_RGB565:
+ format = COLOR_5_6_5;
comp_swap = SWAP_STD_REV;
- format = FMT_8_8_8_8;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
break;
- case MESA_FORMAT_RGBA8888_REV:
+ case MESA_FORMAT_RGB565_REV:
+ format = COLOR_5_6_5;
comp_swap = SWAP_STD;
- format = FMT_8_8_8_8;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
break;
- case MESA_FORMAT_ARGB8888:
- case MESA_FORMAT_XRGB8888:
+ case MESA_FORMAT_ARGB4444:
+ format = COLOR_4_4_4_4;
comp_swap = SWAP_ALT;
- format = FMT_8_8_8_8;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_ARGB4444_REV:
+ format = COLOR_4_4_4_4;
+ comp_swap = SWAP_ALT_REV;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_ARGB1555:
+ format = COLOR_1_5_5_5;
+ comp_swap = SWAP_ALT;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_ARGB1555_REV:
+ format = COLOR_1_5_5_5;
+ comp_swap = SWAP_ALT_REV;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
break;
- case MESA_FORMAT_ARGB8888_REV:
+ case MESA_FORMAT_AL88:
+ format = COLOR_8_8;
+ comp_swap = SWAP_STD;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_AL88_REV:
+ format = COLOR_8_8;
+ comp_swap = SWAP_STD_REV;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_RGB332:
+ format = COLOR_3_3_2;
+ comp_swap = SWAP_STD_REV;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_A8:
+ format = COLOR_8;
comp_swap = SWAP_ALT_REV;
- format = FMT_8_8_8_8;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_I8:
+ case MESA_FORMAT_CI8:
+ format = COLOR_8;
+ comp_swap = SWAP_STD;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_L8:
+ format = COLOR_8;
+ comp_swap = SWAP_ALT;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_RGBA_FLOAT32:
+ format = COLOR_32_32_32_32_FLOAT;
+ comp_swap = SWAP_STD_REV;
+ SETbit(cb_color0_info, BLEND_FLOAT32_bit);
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_FLOAT, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
break;
- case MESA_FORMAT_RGB565:
+ case MESA_FORMAT_RGBA_FLOAT16:
+ format = COLOR_16_16_16_16_FLOAT;
+ comp_swap = SWAP_STD_REV;
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_FLOAT, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_ALPHA_FLOAT32:
+ format = COLOR_32_FLOAT;
comp_swap = SWAP_ALT_REV;
- format = FMT_5_6_5;
+ SETbit(cb_color0_info, BLEND_FLOAT32_bit);
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_FLOAT, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
break;
- case MESA_FORMAT_ARGB1555:
+ case MESA_FORMAT_ALPHA_FLOAT16:
+ format = COLOR_16_FLOAT;
comp_swap = SWAP_ALT_REV;
- format = FMT_1_5_5_5;
- break;
- case MESA_FORMAT_ARGB4444:
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_FLOAT, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_LUMINANCE_FLOAT32:
+ format = COLOR_32_FLOAT;
comp_swap = SWAP_ALT;
- format = FMT_4_4_4_4;
+ SETbit(cb_color0_info, BLEND_FLOAT32_bit);
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_FLOAT, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_LUMINANCE_FLOAT16:
+ format = COLOR_16_FLOAT;
+ comp_swap = SWAP_ALT;
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_FLOAT, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32:
+ format = COLOR_32_32_FLOAT;
+ comp_swap = SWAP_ALT_REV;
+ SETbit(cb_color0_info, BLEND_FLOAT32_bit);
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_FLOAT, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16:
+ format = COLOR_16_16_FLOAT;
+ comp_swap = SWAP_ALT_REV;
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_FLOAT, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */
+ format = COLOR_32_FLOAT;
+ comp_swap = SWAP_STD;
+ SETbit(cb_color0_info, BLEND_FLOAT32_bit);
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_FLOAT, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */
+ format = COLOR_16_FLOAT;
+ comp_swap = SWAP_STD;
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_FLOAT, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_X8_Z24:
+ case MESA_FORMAT_S8_Z24:
+ format = COLOR_8_24;
+ comp_swap = SWAP_STD;
+ SETfield(cb_color0_info, ARRAY_1D_TILED_THIN1,
+ CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask);
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_Z24_S8:
+ format = COLOR_24_8;
+ comp_swap = SWAP_STD;
+ SETfield(cb_color0_info, ARRAY_1D_TILED_THIN1,
+ CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask);
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_Z16:
+ format = COLOR_16;
+ comp_swap = SWAP_STD;
+ SETfield(cb_color0_info, ARRAY_1D_TILED_THIN1,
+ CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask);
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
break;
- case MESA_FORMAT_S8_Z24:
- format = FMT_8_24;
+ case MESA_FORMAT_Z32:
+ format = COLOR_32;
comp_swap = SWAP_STD;
+ SETfield(cb_color0_info, ARRAY_1D_TILED_THIN1,
+ CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask);
+ CLEARbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_SRGBA8:
+ format = COLOR_8_8_8_8;
+ comp_swap = SWAP_STD_REV;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_SRGB, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_SLA8:
+ format = COLOR_8_8;
+ comp_swap = SWAP_ALT_REV;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_SRGB, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ break;
+ case MESA_FORMAT_SL8:
+ format = COLOR_8;
+ comp_swap = SWAP_ALT_REV;
+ SETbit(cb_color0_info, SOURCE_FORMAT_bit);
+ SETfield(cb_color0_info, NUMBER_SRGB, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
break;
- default:
+ default:
fprintf(stderr,"Invalid format for copy %s\n",_mesa_get_format_name(mesa_format));
assert("Invalid format for US output\n");
- return 0;
+ return;
}
- SETfield(color_info, format, CB_COLOR0_INFO__FORMAT_shift,
+ SETfield(cb_color0_info, format, CB_COLOR0_INFO__FORMAT_shift,
CB_COLOR0_INFO__FORMAT_mask);
- SETfield(color_info, comp_swap, COMP_SWAP_shift, COMP_SWAP_mask);
-
- return color_info;
-
-}
-
-static inline void
-set_render_target(context_t *context, struct radeon_bo *bo, gl_format format,
- int pitch, int bpp, int w, int h, intptr_t dst_offset)
-{
- uint32_t cb_color0_base, cb_color0_size = 0, cb_color0_info = 0, cb_color0_view;
- int nPitchInPixel, id = 0;
- BATCH_LOCALS(&context->radeon);
-
- cb_color0_base = dst_offset / 256;
- cb_color0_view = 0;
-
- cb_color0_info = mesa_format_to_cb_format(format);
-
- nPitchInPixel = pitch/bpp;
- SETfield(cb_color0_size, (nPitchInPixel / 8) - 1,
- PITCH_TILE_MAX_shift, PITCH_TILE_MAX_mask);
- SETfield(cb_color0_size, ((nPitchInPixel * h) / 64) - 1,
- SLICE_TILE_MAX_shift, SLICE_TILE_MAX_mask);
- SETfield(cb_color0_info, ENDIAN_NONE, ENDIAN_shift, ENDIAN_mask);
- SETfield(cb_color0_info, ARRAY_LINEAR_GENERAL,
- CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask);
-/*
- if(4 == bpp)
- {
- SETfield(cb_color0_info, COLOR_8_8_8_8,
- CB_COLOR0_INFO__FORMAT_shift, CB_COLOR0_INFO__FORMAT_mask);
- SETfield(cb_color0_info, SWAP_ALT, COMP_SWAP_shift, COMP_SWAP_mask);
- }
- else
- {
- SETfield(cb_color0_info, COLOR_5_6_5,
- CB_COLOR0_INFO__FORMAT_shift, CB_COLOR0_INFO__FORMAT_mask);
- SETfield(cb_color0_info, SWAP_ALT_REV,
- COMP_SWAP_shift, COMP_SWAP_mask);
- }
-*/
- SETbit(cb_color0_info, SOURCE_FORMAT_bit);
- //SETbit(cb_color0_info, BLEND_CLAMP_bit);
- SETbit(cb_color0_info, BLEND_BYPASS_bit);
- SETfield(cb_color0_info, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
+ SETfield(cb_color0_info, comp_swap, COMP_SWAP_shift, COMP_SWAP_mask);
BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
R600_OUT_BATCH_REGSEQ(CB_COLOR0_BASE + (4 * id), 1);
@@ -161,14 +328,14 @@ static inline void load_shaders(GLcontext * ctx)
radeonContextPtr radeonctx = RADEON_CONTEXT(ctx);
context_t *context = R700_CONTEXT(ctx);
- int i, size;
+ int i, size;
uint32_t *shader;
if (context->blit_bo_loaded == 1)
return;
size = 4096;
- context->blit_bo = radeon_bo_open(radeonctx->radeonScreen->bom, 0,
+ context->blit_bo = radeon_bo_open(radeonctx->radeonScreen->bom, 0,
size, 256, RADEON_GEM_DOMAIN_GTT, 0);
radeon_bo_map(context->blit_bo, 1);
shader = context->blit_bo->ptr;
@@ -204,14 +371,9 @@ set_shaders(context_t *context)
uint32_t sq_pgm_cf_offset_ps = 0;
uint32_t sq_pgm_exports_ps = (1 << 1);
- radeon_cs_space_check_with_bo(context->radeon.cmdbuf.cs,
- pbo,
- RADEON_GEM_DOMAIN_GTT, 0);
-
r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
/* FS */
-
BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
R600_OUT_BATCH_REGSEQ(SQ_PGM_START_FS, 1);
R600_OUT_BATCH(sq_pgm_start_fs);
@@ -227,7 +389,6 @@ set_shaders(context_t *context)
END_BATCH();
/* VS */
-
BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
R600_OUT_BATCH_REGSEQ(SQ_PGM_START_VS, 1);
R600_OUT_BATCH(sq_pgm_start_vs);
@@ -243,7 +404,6 @@ set_shaders(context_t *context)
END_BATCH();
/* PS */
-
BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
R600_OUT_BATCH_REGSEQ(SQ_PGM_START_PS, 1);
R600_OUT_BATCH(sq_pgm_start_ps);
@@ -261,7 +421,7 @@ set_shaders(context_t *context)
BEGIN_BATCH_NO_AUTOSTATE(18);
R600_OUT_BATCH_REGVAL(SPI_VS_OUT_CONFIG, 0); //EXPORT_COUNT is - 1
- R600_OUT_BATCH_REGVAL(SPI_VS_OUT_ID_0, 0);
+ R600_OUT_BATCH_REGVAL(SPI_VS_OUT_ID_0, 0);
R600_OUT_BATCH_REGVAL(SPI_PS_INPUT_CNTL_0, SEL_CENTROID_bit);
R600_OUT_BATCH_REGVAL(SPI_PS_IN_CONTROL_0, (1 << NUM_INTERP_shift));
R600_OUT_BATCH_REGVAL(SPI_PS_IN_CONTROL_1, 0);
@@ -316,65 +476,544 @@ set_vtx_resource(context_t *context)
END_BATCH();
COMMIT_BATCH();
- radeon_cs_space_check_with_bo(context->radeon.cmdbuf.cs,
- bo,
- RADEON_GEM_DOMAIN_GTT, 0);
-
}
-static void
+static inline void
set_tex_resource(context_t * context,
- gl_format format, struct radeon_bo *bo, int w, int h,
+ gl_format mesa_format, struct radeon_bo *bo, int w, int h,
int pitch, intptr_t src_offset)
{
uint32_t sq_tex_resource0, sq_tex_resource1, sq_tex_resource2, sq_tex_resource4, sq_tex_resource6;
- int bpp = _mesa_get_format_bytes(format);
+ int bpp = _mesa_get_format_bytes(mesa_format);
int TexelPitch = pitch/bpp;
- // int tex_format = mesa_format_to_us_format(format);
sq_tex_resource0 = sq_tex_resource1 = sq_tex_resource2 = sq_tex_resource4 = sq_tex_resource6 = 0;
BATCH_LOCALS(&context->radeon);
-
+
SETfield(sq_tex_resource0, SQ_TEX_DIM_2D, DIM_shift, DIM_mask);
SETfield(sq_tex_resource0, ARRAY_LINEAR_GENERAL,
SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
- if (bpp == 4) {
- SETfield(sq_tex_resource1, FMT_8_8_8_8,
- SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift,
- SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
-
- SETfield(sq_tex_resource4, SQ_SEL_Z,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
- SETfield(sq_tex_resource4, SQ_SEL_Y,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
- SETfield(sq_tex_resource4, SQ_SEL_X,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
- SETfield(sq_tex_resource4, SQ_SEL_W,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
- } else {
- SETfield(sq_tex_resource1, FMT_5_6_5,
- SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift,
- SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
- SETfield(sq_tex_resource4, SQ_SEL_Z,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
- SETfield(sq_tex_resource4, SQ_SEL_Y,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
- SETfield(sq_tex_resource4, SQ_SEL_X,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
- SETfield(sq_tex_resource4, SQ_SEL_1,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift,
- SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
-
- }
+ switch (mesa_format) {
+ case MESA_FORMAT_RGBA8888:
+ case MESA_FORMAT_SIGNED_RGBA8888:
+ SETfield(sq_tex_resource1, FMT_8_8_8_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888) {
+ SETfield(sq_tex_resource4, SQ_FORMAT_COMP_SIGNED,
+ FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
+ SETfield(sq_tex_resource4, SQ_FORMAT_COMP_SIGNED,
+ FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
+ SETfield(sq_tex_resource4, SQ_FORMAT_COMP_SIGNED,
+ FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
+ SETfield(sq_tex_resource4, SQ_FORMAT_COMP_SIGNED,
+ FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
+ }
+ break;
+ case MESA_FORMAT_RGBA8888_REV:
+ case MESA_FORMAT_SIGNED_RGBA8888_REV:
+ SETfield(sq_tex_resource1, FMT_8_8_8_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888_REV) {
+ SETfield(sq_tex_resource4, SQ_FORMAT_COMP_SIGNED,
+ FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
+ SETfield(sq_tex_resource4, SQ_FORMAT_COMP_SIGNED,
+ FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
+ SETfield(sq_tex_resource4, SQ_FORMAT_COMP_SIGNED,
+ FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
+ SETfield(sq_tex_resource4, SQ_FORMAT_COMP_SIGNED,
+ FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
+ }
+ break;
+ case MESA_FORMAT_ARGB8888:
+ SETfield(sq_tex_resource1, FMT_8_8_8_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_XRGB8888:
+ SETfield(sq_tex_resource1, FMT_8_8_8_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_ARGB8888_REV:
+ SETfield(sq_tex_resource1, FMT_8_8_8_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_XRGB8888_REV:
+ SETfield(sq_tex_resource1, FMT_8_8_8_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_RGB565:
+ SETfield(sq_tex_resource1, FMT_5_6_5,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_RGB565_REV:
+ SETfield(sq_tex_resource1, FMT_5_6_5,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_ARGB4444:
+ SETfield(sq_tex_resource1, FMT_4_4_4_4,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_ARGB4444_REV:
+ SETfield(sq_tex_resource1, FMT_4_4_4_4,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_ARGB1555:
+ SETfield(sq_tex_resource1, FMT_1_5_5_5,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_ARGB1555_REV:
+ SETfield(sq_tex_resource1, FMT_1_5_5_5,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_AL88:
+ case MESA_FORMAT_AL88_REV: /* TODO : Check this. */
+ SETfield(sq_tex_resource1, FMT_8_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_RGB332:
+ SETfield(sq_tex_resource1, FMT_3_3_2,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_A8: /* ZERO, ZERO, ZERO, X */
+ SETfield(sq_tex_resource1, FMT_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_L8: /* X, X, X, ONE */
+ SETfield(sq_tex_resource1, FMT_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_I8: /* X, X, X, X */
+ case MESA_FORMAT_CI8:
+ SETfield(sq_tex_resource1, FMT_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_RGBA_FLOAT32:
+ SETfield(sq_tex_resource1, FMT_32_32_32_32_FLOAT,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_RGBA_FLOAT16:
+ SETfield(sq_tex_resource1, FMT_16_16_16_16_FLOAT,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_ALPHA_FLOAT32: /* ZERO, ZERO, ZERO, X */
+ SETfield(sq_tex_resource1, FMT_32_FLOAT,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_ALPHA_FLOAT16: /* ZERO, ZERO, ZERO, X */
+ SETfield(sq_tex_resource1, FMT_16_FLOAT,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_LUMINANCE_FLOAT32: /* X, X, X, ONE */
+ SETfield(sq_tex_resource1, FMT_32_FLOAT,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_LUMINANCE_FLOAT16: /* X, X, X, ONE */
+ SETfield(sq_tex_resource1, FMT_16_FLOAT,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32:
+ SETfield(sq_tex_resource1, FMT_32_32_FLOAT,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16:
+ SETfield(sq_tex_resource1, FMT_16_16_FLOAT,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */
+ SETfield(sq_tex_resource1, FMT_32_FLOAT,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */
+ SETfield(sq_tex_resource1, FMT_16_FLOAT,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_Z16:
+ SETbit(sq_tex_resource0, TILE_TYPE_bit);
+ SETfield(sq_tex_resource0, ARRAY_1D_TILED_THIN1,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
+ SETfield(sq_tex_resource1, FMT_16,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_X8_Z24:
+ SETbit(sq_tex_resource0, TILE_TYPE_bit);
+ SETfield(sq_tex_resource0, ARRAY_1D_TILED_THIN1,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
+ SETfield(sq_tex_resource1, FMT_8_24,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_S8_Z24:
+ SETbit(sq_tex_resource0, TILE_TYPE_bit);
+ SETfield(sq_tex_resource0, ARRAY_1D_TILED_THIN1,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
+ SETfield(sq_tex_resource1, FMT_8_24,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_Z24_S8:
+ SETbit(sq_tex_resource0, TILE_TYPE_bit);
+ SETfield(sq_tex_resource0, ARRAY_1D_TILED_THIN1,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
+ SETfield(sq_tex_resource1, FMT_24_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_0,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_Z32:
+ SETbit(sq_tex_resource0, TILE_TYPE_bit);
+ SETfield(sq_tex_resource0, ARRAY_1D_TILED_THIN1,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
+ SETfield(sq_tex_resource1, FMT_32,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_S8:
+ SETbit(sq_tex_resource0, TILE_TYPE_bit);
+ SETfield(sq_tex_resource0, ARRAY_1D_TILED_THIN1,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
+ SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
+ SETfield(sq_tex_resource1, FMT_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ break;
+ case MESA_FORMAT_SRGBA8:
+ SETfield(sq_tex_resource1, FMT_8_8_8_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_W,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Z,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ SETbit(sq_tex_resource4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
+ break;
+ case MESA_FORMAT_SLA8:
+ SETfield(sq_tex_resource1, FMT_8_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_Y,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ SETbit(sq_tex_resource4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
+ break;
+ case MESA_FORMAT_SL8: /* X, X, X, ONE */
+ SETfield(sq_tex_resource1, FMT_8,
+ SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_X,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+ SETfield(sq_tex_resource4, SQ_SEL_1,
+ SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+ SETbit(sq_tex_resource4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
+ break;
+ default:
+ fprintf(stderr,"Invalid format for copy %s\n",_mesa_get_format_name(mesa_format));
+ assert("Invalid format for US output\n");
+ return;
+ };
SETfield(sq_tex_resource0, (TexelPitch/8)-1, PITCH_shift, PITCH_mask);
SETfield(sq_tex_resource0, w - 1, TEX_WIDTH_shift, TEX_WIDTH_mask);
@@ -411,34 +1050,16 @@ set_tex_resource(context_t * context,
RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
END_BATCH();
COMMIT_BATCH();
-/*
- if (h < 1)
- h = 1;
-
- sq_tex_resource_word0 = (1 << 0);
- sq_tex_resource_word0 |= ((((pitch >> 3) - 1) << 8) |
- ((w - 1) << 19));
-
- sq_tex_resource_word1 = (format << 26);
- sq_tex_resource_word1 |= ((h - 1) << 0);
-
- sq_tex_resource_word4 = ((1 << 14) |
- (0 << 16) |
- (1 << 19) |
- (2 << 22) |
- (3 << 25));
-
-*/
}
-static void
+static inline void
set_tex_sampler(context_t * context)
{
uint32_t sq_tex_sampler_word0 = 0, sq_tex_sampler_word1 = 0, sq_tex_sampler_word2 = 0;
int i = 0;
-
+
SETbit(sq_tex_sampler_word2, SQ_TEX_SAMPLER_WORD2_0__TYPE_bit);
-
+
BATCH_LOCALS(&context->radeon);
BEGIN_BATCH_NO_AUTOSTATE(5);
@@ -454,22 +1075,9 @@ set_tex_sampler(context_t * context)
static inline void
set_scissors(context_t *context, int x1, int y1, int x2, int y2)
{
-
- int i;
- uint32_t clip_tl = 0, clip_br = 0;
-
- SETfield(clip_tl, 0, PA_SC_CLIPRECT_0_TL__TL_X_shift,
- PA_SC_CLIPRECT_0_TL__TL_X_mask);
- SETfield(clip_tl, 0, PA_SC_CLIPRECT_0_TL__TL_Y_shift,
- PA_SC_CLIPRECT_0_TL__TL_Y_mask);
- SETfield(clip_br, 8191, PA_SC_CLIPRECT_0_BR__BR_X_shift,
- PA_SC_CLIPRECT_0_BR__BR_X_mask);
- SETfield(clip_br, 8191, PA_SC_CLIPRECT_0_BR__BR_Y_shift,
- PA_SC_CLIPRECT_0_BR__BR_Y_mask);
-
BATCH_LOCALS(&context->radeon);
- BEGIN_BATCH_NO_AUTOSTATE(13);
+ BEGIN_BATCH_NO_AUTOSTATE(17);
R600_OUT_BATCH_REGSEQ(PA_SC_SCREEN_SCISSOR_TL, 2);
R600_OUT_BATCH((x1 << 0) | (y1 << 16));
R600_OUT_BATCH((x2 << 0) | (y2 << 16));
@@ -479,44 +1087,22 @@ set_scissors(context_t *context, int x1, int y1, int x2, int y2)
R600_OUT_BATCH((x1 << 0) | (y1 << 16) | (WINDOW_OFFSET_DISABLE_bit)); //PA_SC_WINDOW_SCISSOR_TL
R600_OUT_BATCH((x2 << 0) | (y2 << 16));
-/* clip disabled ?
- R600_OUT_BATCH(CLIP_RULE_mask); //PA_SC_CLIPRECT_RULE);
- R600_OUT_BATCH(clip_tl); //PA_SC_CLIPRECT_0_TL
- R600_OUT_BATCH(clip_br); //PA_SC_CLIPRECT_0_BR
- R600_OUT_BATCH(clip_tl); // 1
- R600_OUT_BATCH(clip_br);
- R600_OUT_BATCH(clip_tl); // 2
- R600_OUT_BATCH(clip_br);
- R600_OUT_BATCH(clip_tl); // 3
- R600_OUT_BATCH(clip_br);
-*/
-
R600_OUT_BATCH_REGSEQ(PA_SC_GENERIC_SCISSOR_TL, 2);
R600_OUT_BATCH((x1 << 0) | (y1 << 16) | (WINDOW_OFFSET_DISABLE_bit));
R600_OUT_BATCH((x2 << 0) | (y2 << 16));
END_BATCH();
/* XXX 16 of these PA_SC_VPORT_SCISSOR_0_TL_num ... */
- BEGIN_BATCH_NO_AUTOSTATE(4);
R600_OUT_BATCH_REGSEQ(PA_SC_VPORT_SCISSOR_0_TL, 2 );
R600_OUT_BATCH((x1 << 0) | (y1 << 16) | (WINDOW_OFFSET_DISABLE_bit));
R600_OUT_BATCH((x2 << 0) | (y2 << 16));
END_BATCH();
-/*
- BEGIN_BATCH_NO_AUTOSTATE(2 + 2 * PA_SC_VPORT_ZMIN_0_num);
- R600_OUT_BATCH_REGSEQ(PA_SC_VPORT_ZMIN_0, 2 * PA_SC_VPORT_ZMIN_0_num);
- for(i = 0 i < PA_SC_VPORT_ZMIN_0_num; i++)
- R600_OUT_BATCH(radeonPackFloat32(0.0F));
- R600_OUT_BATCH(radeonPackFloat32(1.0F));
- }
- END_BATCH();
-*/
COMMIT_BATCH();
}
-static void
+static inline void
set_vb_data(context_t * context, int src_x, int src_y, int dst_x, int dst_y,
int w, int h, int src_h, unsigned flip_y)
{
@@ -548,7 +1134,7 @@ draw_auto(context_t *context)
{
BATCH_LOCALS(&context->radeon);
uint32_t vgt_primitive_type = 0, vgt_index_type = 0, vgt_draw_initiator = 0, vgt_num_indices;
-
+
SETfield(vgt_primitive_type, DI_PT_RECTLIST,
VGT_PRIMITIVE_TYPE__PRIM_TYPE_shift,
VGT_PRIMITIVE_TYPE__PRIM_TYPE_mask);
@@ -583,16 +1169,236 @@ draw_auto(context_t *context)
static inline void
set_default_state(context_t *context)
{
- int i;
+ int ps_prio = 0;
+ int vs_prio = 1;
+ int gs_prio = 2;
+ int es_prio = 3;
+ int num_ps_gprs;
+ int num_vs_gprs;
+ int num_gs_gprs;
+ int num_es_gprs;
+ int num_temp_gprs;
+ int num_ps_threads;
+ int num_vs_threads;
+ int num_gs_threads;
+ int num_es_threads;
+ int num_ps_stack_entries;
+ int num_vs_stack_entries;
+ int num_gs_stack_entries;
+ int num_es_stack_entries;
+ uint32_t sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2;
+ uint32_t sq_thread_resource_mgmt, sq_stack_resource_mgmt_1, sq_stack_resource_mgmt_2;
+ uint32_t ta_cntl_aux, db_watermarks, sq_dyn_gpr_cntl_ps_flush_req, db_debug;
BATCH_LOCALS(&context->radeon);
-/*
- BEGIN_BATCH_NO_AUTOSTATE(sizeof(r7xx_default_state)/4);
- for(i=0; i< sizeof(r7xx_default_state)/4; i++)
- R600_OUT_BATCH(r7xx_default_state[i]);
- END_BATCH();
-*/
- BEGIN_BATCH_NO_AUTOSTATE(45);
- R600_OUT_BATCH_REGVAL(CB_CLRCMP_CONTROL,
+
+ switch (context->radeon.radeonScreen->chip_family) {
+ case CHIP_FAMILY_R600:
+ num_ps_gprs = 192;
+ num_vs_gprs = 56;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 136;
+ num_vs_threads = 48;
+ num_gs_threads = 4;
+ num_es_threads = 4;
+ num_ps_stack_entries = 128;
+ num_vs_stack_entries = 128;
+ num_gs_stack_entries = 0;
+ num_es_stack_entries = 0;
+ break;
+ case CHIP_FAMILY_RV630:
+ case CHIP_FAMILY_RV635:
+ num_ps_gprs = 84;
+ num_vs_gprs = 36;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 144;
+ num_vs_threads = 40;
+ num_gs_threads = 4;
+ num_es_threads = 4;
+ num_ps_stack_entries = 40;
+ num_vs_stack_entries = 40;
+ num_gs_stack_entries = 32;
+ num_es_stack_entries = 16;
+ break;
+ case CHIP_FAMILY_RV610:
+ case CHIP_FAMILY_RV620:
+ case CHIP_FAMILY_RS780:
+ case CHIP_FAMILY_RS880:
+ default:
+ num_ps_gprs = 84;
+ num_vs_gprs = 36;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 136;
+ num_vs_threads = 48;
+ num_gs_threads = 4;
+ num_es_threads = 4;
+ num_ps_stack_entries = 40;
+ num_vs_stack_entries = 40;
+ num_gs_stack_entries = 32;
+ num_es_stack_entries = 16;
+ break;
+ case CHIP_FAMILY_RV670:
+ num_ps_gprs = 144;
+ num_vs_gprs = 40;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 136;
+ num_vs_threads = 48;
+ num_gs_threads = 4;
+ num_es_threads = 4;
+ num_ps_stack_entries = 40;
+ num_vs_stack_entries = 40;
+ num_gs_stack_entries = 32;
+ num_es_stack_entries = 16;
+ break;
+ case CHIP_FAMILY_RV770:
+ num_ps_gprs = 192;
+ num_vs_gprs = 56;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 188;
+ num_vs_threads = 60;
+ num_gs_threads = 0;
+ num_es_threads = 0;
+ num_ps_stack_entries = 256;
+ num_vs_stack_entries = 256;
+ num_gs_stack_entries = 0;
+ num_es_stack_entries = 0;
+ break;
+ case CHIP_FAMILY_RV730:
+ case CHIP_FAMILY_RV740:
+ num_ps_gprs = 84;
+ num_vs_gprs = 36;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 188;
+ num_vs_threads = 60;
+ num_gs_threads = 0;
+ num_es_threads = 0;
+ num_ps_stack_entries = 128;
+ num_vs_stack_entries = 128;
+ num_gs_stack_entries = 0;
+ num_es_stack_entries = 0;
+ break;
+ case CHIP_FAMILY_RV710:
+ num_ps_gprs = 192;
+ num_vs_gprs = 56;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 144;
+ num_vs_threads = 48;
+ num_gs_threads = 0;
+ num_es_threads = 0;
+ num_ps_stack_entries = 128;
+ num_vs_stack_entries = 128;
+ num_gs_stack_entries = 0;
+ num_es_stack_entries = 0;
+ break;
+ }
+
+ sq_config = 0;
+ if ((context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV610) ||
+ (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV620) ||
+ (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RS780) ||
+ (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RS880) ||
+ (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV710))
+ CLEARbit(sq_config, VC_ENABLE_bit);
+ else
+ SETbit(sq_config, VC_ENABLE_bit);
+ SETbit(sq_config, DX9_CONSTS_bit);
+ SETbit(sq_config, ALU_INST_PREFER_VECTOR_bit);
+ SETfield(sq_config, ps_prio, PS_PRIO_shift, PS_PRIO_mask);
+ SETfield(sq_config, vs_prio, VS_PRIO_shift, VS_PRIO_mask);
+ SETfield(sq_config, gs_prio, GS_PRIO_shift, GS_PRIO_mask);
+ SETfield(sq_config, es_prio, ES_PRIO_shift, ES_PRIO_mask);
+
+ sq_gpr_resource_mgmt_1 = 0;
+ SETfield(sq_gpr_resource_mgmt_1, num_ps_gprs, NUM_PS_GPRS_shift, NUM_PS_GPRS_mask);
+ SETfield(sq_gpr_resource_mgmt_1, num_vs_gprs, NUM_VS_GPRS_shift, NUM_VS_GPRS_mask);
+ SETfield(sq_gpr_resource_mgmt_1, num_temp_gprs,
+ NUM_CLAUSE_TEMP_GPRS_shift, NUM_CLAUSE_TEMP_GPRS_mask);
+
+ sq_gpr_resource_mgmt_2 = 0;
+ SETfield(sq_gpr_resource_mgmt_2, num_gs_gprs, NUM_GS_GPRS_shift, NUM_GS_GPRS_mask);
+ SETfield(sq_gpr_resource_mgmt_2, num_es_gprs, NUM_ES_GPRS_shift, NUM_ES_GPRS_mask);
+
+ sq_thread_resource_mgmt = 0;
+ SETfield(sq_thread_resource_mgmt, num_ps_threads,
+ NUM_PS_THREADS_shift, NUM_PS_THREADS_mask);
+ SETfield(sq_thread_resource_mgmt, num_vs_threads,
+ NUM_VS_THREADS_shift, NUM_VS_THREADS_mask);
+ SETfield(sq_thread_resource_mgmt, num_gs_threads,
+ NUM_GS_THREADS_shift, NUM_GS_THREADS_mask);
+ SETfield(sq_thread_resource_mgmt, num_es_threads,
+ NUM_ES_THREADS_shift, NUM_ES_THREADS_mask);
+
+ sq_stack_resource_mgmt_1 = 0;
+ SETfield(sq_stack_resource_mgmt_1, num_ps_stack_entries,
+ NUM_PS_STACK_ENTRIES_shift, NUM_PS_STACK_ENTRIES_mask);
+ SETfield(sq_stack_resource_mgmt_1, num_vs_stack_entries,
+ NUM_VS_STACK_ENTRIES_shift, NUM_VS_STACK_ENTRIES_mask);
+
+ sq_stack_resource_mgmt_2 = 0;
+ SETfield(sq_stack_resource_mgmt_2, num_gs_stack_entries,
+ NUM_GS_STACK_ENTRIES_shift, NUM_GS_STACK_ENTRIES_mask);
+ SETfield(sq_stack_resource_mgmt_2, num_es_stack_entries,
+ NUM_ES_STACK_ENTRIES_shift, NUM_ES_STACK_ENTRIES_mask);
+
+ ta_cntl_aux = 0;
+ SETfield(ta_cntl_aux, 28, TD_FIFO_CREDIT_shift, TD_FIFO_CREDIT_mask);
+ db_watermarks = 0;
+ SETfield(db_watermarks, 4, DEPTH_FREE_shift, DEPTH_FREE_mask);
+ SETfield(db_watermarks, 16, DEPTH_FLUSH_shift, DEPTH_FLUSH_mask);
+ SETfield(db_watermarks, 0, FORCE_SUMMARIZE_shift, FORCE_SUMMARIZE_mask);
+ SETfield(db_watermarks, 4, DEPTH_PENDING_FREE_shift, DEPTH_PENDING_FREE_mask);
+ sq_dyn_gpr_cntl_ps_flush_req = 0;
+ db_debug = 0;
+ if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770) {
+ SETfield(ta_cntl_aux, 3, GRADIENT_CREDIT_shift, GRADIENT_CREDIT_mask);
+ db_debug = 0x82000000;
+ SETfield(db_watermarks, 16, DEPTH_CACHELINE_FREE_shift, DEPTH_CACHELINE_FREE_mask);
+ } else {
+ SETfield(ta_cntl_aux, 2, GRADIENT_CREDIT_shift, GRADIENT_CREDIT_mask);
+ SETfield(db_watermarks, 4, DEPTH_CACHELINE_FREE_shift, DEPTH_CACHELINE_FREE_mask);
+ SETbit(sq_dyn_gpr_cntl_ps_flush_req, VS_PC_LIMIT_ENABLE_bit);
+ }
+
+ BEGIN_BATCH_NO_AUTOSTATE(117);
+ R600_OUT_BATCH_REGSEQ(SQ_CONFIG, 6);
+ R600_OUT_BATCH(sq_config);
+ R600_OUT_BATCH(sq_gpr_resource_mgmt_1);
+ R600_OUT_BATCH(sq_gpr_resource_mgmt_2);
+ R600_OUT_BATCH(sq_thread_resource_mgmt);
+ R600_OUT_BATCH(sq_stack_resource_mgmt_1);
+ R600_OUT_BATCH(sq_stack_resource_mgmt_2);
+
+ R600_OUT_BATCH_REGVAL(TA_CNTL_AUX, ta_cntl_aux);
+ R600_OUT_BATCH_REGVAL(VC_ENHANCE, 0);
+ R600_OUT_BATCH_REGVAL(R7xx_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, sq_dyn_gpr_cntl_ps_flush_req);
+ R600_OUT_BATCH_REGVAL(DB_DEBUG, db_debug);
+ R600_OUT_BATCH_REGVAL(DB_WATERMARKS, db_watermarks);
+
+ R600_OUT_BATCH_REGSEQ(SQ_ESGS_RING_ITEMSIZE, 9);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+
+ R600_OUT_BATCH_REGVAL(CB_CLRCMP_CONTROL,
(CLRCMP_SEL_SRC << CLRCMP_FCN_SEL_shift));
R600_OUT_BATCH_REGVAL(SQ_VTX_BASE_VTX_LOC, 0);
R600_OUT_BATCH_REGVAL(SQ_VTX_START_INST_LOC, 0);
@@ -603,57 +1409,51 @@ set_default_state(context_t *context)
R600_OUT_BATCH_REGVAL(R7xx_CB_SHADER_CONTROL, (RT0_ENABLE_bit));
R600_OUT_BATCH_REGVAL(CB_COLOR_CONTROL, (0xcc << ROP3_shift));
-/*
- R600_OUT_BATCH_REGSEQ(PA_CL_VPORT_XSCALE_0, 6);
- R600_OUT_BATCH(0.0f); // PA_CL_VPORT_XSCALE
- R600_OUT_BATCH(0.0f); // PA_CL_VPORT_XOFFSET
- R600_OUT_BATCH(0.0f); // PA_CL_VPORT_YSCALE
- R600_OUT_BATCH(0.0f); // PA_CL_VPORT_YOFFSET
- R600_OUT_BATCH(0.0f); // PA_CL_VPORT_ZSCALE
- R600_OUT_BATCH(0.0f); // PA_CL_VPORT_ZOFFSET
-*/
R600_OUT_BATCH_REGVAL(PA_CL_VTE_CNTL, VTX_XY_FMT_bit);
- R600_OUT_BATCH_REGVAL(PA_CL_VS_OUT_CNTL, 0 );
+ R600_OUT_BATCH_REGVAL(PA_CL_VS_OUT_CNTL, 0);
R600_OUT_BATCH_REGVAL(PA_CL_CLIP_CNTL, CLIP_DISABLE_bit);
R600_OUT_BATCH_REGVAL(PA_SU_SC_MODE_CNTL, (FACE_bit) |
(POLYMODE_PTYPE__TRIANGLES << POLYMODE_FRONT_PTYPE_shift) |
- (POLYMODE_PTYPE__TRIANGLES << POLYMODE_BACK_PTYPE_shift));
+ (POLYMODE_PTYPE__TRIANGLES << POLYMODE_BACK_PTYPE_shift));
R600_OUT_BATCH_REGVAL(PA_SU_VTX_CNTL, (PIX_CENTER_bit) |
(X_ROUND_TO_EVEN << PA_SU_VTX_CNTL__ROUND_MODE_shift) |
(X_1_256TH << QUANT_MODE_shift));
- R600_OUT_BATCH_REGVAL(VGT_MAX_VTX_INDX, 2048);
+
+ R600_OUT_BATCH_REGSEQ(VGT_MAX_VTX_INDX, 4);
+ R600_OUT_BATCH(2048);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+
+ R600_OUT_BATCH_REGSEQ(VGT_OUTPUT_PATH_CNTL, 13);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+
+ R600_OUT_BATCH_REGVAL(VGT_PRIMITIVEID_EN, 0);
+ R600_OUT_BATCH_REGVAL(VGT_MULTI_PRIM_IB_RESET_EN, 0);
+ R600_OUT_BATCH_REGVAL(VGT_INSTANCE_STEP_RATE_0, 0);
+ R600_OUT_BATCH_REGVAL(VGT_INSTANCE_STEP_RATE_1, 0);
+
+ R600_OUT_BATCH_REGSEQ(VGT_STRMOUT_EN, 3);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+ R600_OUT_BATCH(0);
+
+ R600_OUT_BATCH_REGVAL(VGT_STRMOUT_BUFFER_EN, 0);
+
END_BATCH();
-/*
- if (dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) {
- BEGIN_RING(r7xx_default_size + 10);
- for (i = 0; i < r7xx_default_size; i++)
- OUT_RING(r7xx_default_state[i]);
- } else {
- BEGIN_RING(r6xx_default_size + 10);
- for (i = 0; i < r6xx_default_size; i++)
- OUT_RING(r6xx_default_state[i]);
- }
- OUT_RING(CP_PACKET3(R600_IT_EVENT_WRITE, 0));
- OUT_RING(R600_CACHE_FLUSH_AND_INV_EVENT);
-
- //OR :
- r700WaitForIdleClean(context_t *context);
-*/
- /* SQ config */
- /*XXX*/
-/*
- r700SendSQConfig(GLcontext *ctx, struct radeon_state_atom *atom);
- // OR:
- OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 6));
- OUT_RING((R600_SQ_CONFIG - R600_SET_CONFIG_REG_OFFSET) >> 2);
- OUT_RING(sq_config);
- OUT_RING(sq_gpr_resource_mgmt_1);
- OUT_RING(sq_gpr_resource_mgmt_2);
- OUT_RING(sq_thread_resource_mgmt);
- OUT_RING(sq_stack_resource_mgmt_1);
- OUT_RING(sq_stack_resource_mgmt_2);
- ADVANCE_RING();
-*/
+ COMMIT_BATCH();
}
static GLboolean validate_buffers(context_t *rmesa,
@@ -667,6 +1467,15 @@ static GLboolean validate_buffers(context_t *rmesa,
radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+ radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
+ rmesa->blit_bo, RADEON_GEM_DOMAIN_GTT, 0);
+
+ ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
+ rmesa->blit_bo,
+ RADEON_GEM_DOMAIN_GTT, 0);
+ if (ret)
+ return GL_FALSE;
+
ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
first_elem(&rmesa->radeon.dma.reserved)->bo,
RADEON_GEM_DOMAIN_GTT, 0);
@@ -698,7 +1507,10 @@ GLboolean r600_blit(context_t *context,
unsigned flip_y)
{
int id = 0;
- uint32_t cb_bpp;
+
+ /* not sure blit to depth works or not yet */
+ if (_mesa_get_format_bits(src_mesaformat, GL_DEPTH_BITS) > 0)
+ return GL_FALSE;
if (src_bo == dst_bo) {
return GL_FALSE;
@@ -718,42 +1530,55 @@ GLboolean r600_blit(context_t *context,
/* Flush is needed to make sure that source buffer has correct data */
radeonFlush(context->radeon.glCtx);
+ rcommonEnsureCmdBufSpace(&context->radeon, 302, __FUNCTION__);
+
+ /* load shaders */
+ load_shaders(context->radeon.glCtx);
+
if (!validate_buffers(context, src_bo, dst_bo))
return GL_FALSE;
- rcommonEnsureCmdBufSpace(&context->radeon, 200, __FUNCTION__);
-
/* set clear state */
+ /* 117 */
set_default_state(context);
+
+ /* shaders */
+ /* 72 */
+ set_shaders(context);
+
/* src */
+ /* 20 */
set_tex_resource(context, src_mesaformat, src_bo,
src_width, src_height, src_pitch, src_offset);
+ /* 5 */
set_tex_sampler(context);
/* dst */
- cb_bpp = _mesa_get_format_bytes(dst_mesaformat);
+ /* 25 */
set_render_target(context, dst_bo, dst_mesaformat,
- dst_pitch, cb_bpp, dst_width, dst_height, dst_offset);
- /* shaders */
- load_shaders(context->radeon.glCtx);
-
- set_shaders(context);
-
+ dst_pitch, dst_width, dst_height, dst_offset);
/* scissors */
- set_scissors(context, 0, 0, 8191, 8191);
+ /* 17 */
+ set_scissors(context, dst_x, dst_y, dst_x + dst_width, dst_y + dst_height);
set_vb_data(context, src_x, src_y, dst_x, dst_y, w, h, src_height, flip_y);
/* Vertex buffer setup */
+ /* 24 */
set_vtx_resource(context);
/* draw */
+ /* 10 */
draw_auto(context);
+ /* 7 */
r700SyncSurf(context, dst_bo, 0,
RADEON_GEM_DOMAIN_VRAM|RADEON_GEM_DOMAIN_GTT,
CB_ACTION_ENA_bit | (1 << (id + 6)));
+ /* 5 */
+ r700WaitForIdleClean(context);
+
radeonFlush(context->radeon.glCtx);
return GL_TRUE;
diff --git a/src/mesa/drivers/dri/r600/r600_context.h b/src/mesa/drivers/dri/r600/r600_context.h
index 774b30e..1f7cd40 100644
--- a/src/mesa/drivers/dri/r600/r600_context.h
+++ b/src/mesa/drivers/dri/r600/r600_context.h
@@ -180,6 +180,8 @@ extern GLboolean r700SyncSurf(context_t *context,
uint32_t write_domain,
uint32_t sync_type);
+extern void r700WaitForIdleClean(context_t *context);
+
extern void r700Start3D(context_t *context);
extern void r600InitAtoms(context_t *context);
extern void r700InitDraw(GLcontext *ctx);