diff options
author | Jerome Glisse <jglisse@redhat.com> | 2010-07-29 14:51:06 -0400 |
---|---|---|
committer | Jerome Glisse <jglisse@redhat.com> | 2010-07-29 19:05:57 -0400 |
commit | 7a73390f9126fd270d9891cd9d2bf38ef56d9b80 (patch) | |
tree | 3d580316fe80f02b74b0cfbd79b0d9f337009b53 | |
parent | e3e25dee2019b2c75acadeaf4358cd9a8d93db0b (diff) |
r600g: mipmap early support + EX2/ABS instruction + culling
Add mipmap support (demos/src/redbook/mipmap is working)
Add EX2/ABS shader instruction support.
Add face culling support.
Misc fixes.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
-rw-r--r-- | src/gallium/drivers/r600/r600_asm.c | 2 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_resource.h | 4 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_shader.c | 16 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_state.c | 56 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_texture.c | 24 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600d.h | 40 |
6 files changed, 108 insertions, 34 deletions
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index e678a2fdf2c..e560f65dcde 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -296,2 +296,3 @@ int r600_bc_alu_build(struct r600_bc *bc, struct r600_bc_alu *alu, unsigned id) S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) | + S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) | S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) | @@ -311,2 +312,3 @@ int r600_bc_alu_build(struct r600_bc *bc, struct r600_bc_alu *alu, unsigned id) S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) | + S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) | S_SQ_ALU_WORD1_OP2_SRC0_ABS(alu->src[0].abs) | diff --git a/src/gallium/drivers/r600/r600_resource.h b/src/gallium/drivers/r600/r600_resource.h index 0139a3b777f..bb90e76fb78 100644 --- a/src/gallium/drivers/r600/r600_resource.h +++ b/src/gallium/drivers/r600/r600_resource.h @@ -46,5 +46,5 @@ struct r600_resource_texture { unsigned long pitch[PIPE_MAX_TEXTURE_LEVELS]; - unsigned long stride[PIPE_MAX_TEXTURE_LEVELS]; unsigned long layer_size[PIPE_MAX_TEXTURE_LEVELS]; - unsigned long stride_override; + unsigned long pitch_override; + unsigned long bpt; unsigned long size; diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 3f1979b9ccb..c61cc11e885 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -251,6 +251,2 @@ static int tgsi_is_supported(struct r600_shader_ctx *ctx) } - if (i->Instruction.Saturate) { - R600_ERR("staturate unsupported\n"); - return -EINVAL; - } if (i->Instruction.Predicate) { @@ -509,2 +505,4 @@ static int tgsi_dst(struct r600_shader_ctx *ctx, { + struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; + r600_dst->sel = tgsi_dst->Register.Index; @@ -513,2 +511,5 @@ static int tgsi_dst(struct r600_shader_ctx *ctx, r600_dst->write = 1; + if (inst->Instruction.Saturate) { + r600_dst->clamp = 1; + } return 0; @@ -542,2 +543,5 @@ static int tgsi_op2(struct r600_shader_ctx *ctx) break; + case TGSI_OPCODE_ABS: + alu.src[0].abs = 1; + break; default: @@ -1042,3 +1046,3 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = { {TGSI_OPCODE_ROUND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_EX2, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {TGSI_OPCODE_EX2, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE, tgsi_trans}, {TGSI_OPCODE_LG2, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, @@ -1048,3 +1052,3 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = { {32, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_ABS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, + {TGSI_OPCODE_ABS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2}, {TGSI_OPCODE_RCC, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 57879e8d8b8..0191070daa9 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -26,2 +26,3 @@ #include <stdio.h> +#include <errno.h> #include "util/u_inlines.h" @@ -651,4 +652,4 @@ static struct radeon_state *r600_cb0(struct r600_context *rctx) rstate->nbo = 3; - pitch = rtex->pitch[level] / 8 - 1; - slice = rtex->pitch[level] * state->cbufs[0]->height / 64 - 1; + pitch = (rtex->pitch[level] / rtex->bpt) / 8 - 1; + slice = (rtex->pitch[level] / rtex->bpt) * state->cbufs[0]->height / 64 - 1; rstate->states[R600_CB0__CB_COLOR0_BASE] = 0x00000000; @@ -668,2 +669,18 @@ static struct radeon_state *r600_cb0(struct r600_context *rctx) +int r600_db_format(unsigned pformat, unsigned *format) +{ + switch (pformat) { + case PIPE_FORMAT_Z24X8_UNORM: + *format = V_028010_DEPTH_X8_24; + return 0; + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: + *format = V_028010_DEPTH_8_24; + return 0; + default: + *format = V_028010_DEPTH_INVALID; + R600_ERR("unsupported %d\n", pformat); + return -EINVAL; + } +} + static struct radeon_state *r600_db(struct r600_context *rctx) @@ -676,3 +693,3 @@ static struct radeon_state *r600_db(struct r600_context *rctx) unsigned level = state->cbufs[0]->level; - unsigned pitch, slice; + unsigned pitch, slice, format; @@ -691,6 +708,11 @@ static struct radeon_state *r600_db(struct r600_context *rctx) level = state->zsbuf->level; - pitch = rtex->pitch[level] / 8 - 1; - slice = rtex->pitch[level] * state->zsbuf->height / 64 - 1; + pitch = (rtex->pitch[level] / rtex->bpt) / 8 - 1; + slice = (rtex->pitch[level] / rtex->bpt) * state->zsbuf->height / 64 - 1; + if (r600_db_format(state->zsbuf->texture->format, &format)) { + radeon_state_decref(rstate); + return NULL; + } rstate->states[R600_DB__DB_DEPTH_BASE] = 0x00000000; - rstate->states[R600_DB__DB_DEPTH_INFO] = 0x00010006; + rstate->states[R600_DB__DB_DEPTH_INFO] = 0x00010000 | + S_028010_FORMAT(format); rstate->states[R600_DB__DB_DEPTH_VIEW] = 0x00000000; @@ -718,3 +740,6 @@ static struct radeon_state *r600_rasterizer(struct r600_context *rctx) rstate->states[R600_RASTERIZER__PA_CL_CLIP_CNTL] = 0x00000000; - rstate->states[R600_RASTERIZER__PA_SU_SC_MODE_CNTL] = 0x00080000; + rstate->states[R600_RASTERIZER__PA_SU_SC_MODE_CNTL] = 0x00080000 | + S_028814_CULL_FRONT((state->cull_face & PIPE_FACE_FRONT) ? 1 : 0) | + S_028814_CULL_BACK((state->cull_face & PIPE_FACE_BACK) ? 1 : 0) | + S_028814_FACE(!state->front_ccw); rstate->states[R600_RASTERIZER__PA_CL_VS_OUT_CNTL] = 0x00000000; @@ -912,2 +937,7 @@ static inline unsigned r600_tex_compare(unsigned compare) +static INLINE u32 S_FIXED(float value, u32 frac_bits) +{ + return value * (1 << frac_bits); +} + static struct radeon_state *r600_sampler(struct r600_context *rctx, @@ -932,5 +962,5 @@ static struct radeon_state *r600_sampler(struct r600_context *rctx, rstate->states[R600_PS_SAMPLER__SQ_TEX_SAMPLER_WORD1_0] = - S_03C004_MIN_LOD(0) | - S_03C004_MAX_LOD(0) | - S_03C004_LOD_BIAS(0); + S_03C004_MIN_LOD(S_FIXED(CLAMP(state->min_lod, 0, 15), 6)) | + S_03C004_MAX_LOD(S_FIXED(CLAMP(state->max_lod, 0, 15), 6)) | + S_03C004_LOD_BIAS(S_FIXED(CLAMP(state->lod_bias, -16, 16), 6)); rstate->states[R600_PS_SAMPLER__SQ_TEX_SAMPLER_WORD2_0] = S_03C008_TYPE(1); @@ -1022,3 +1052,3 @@ static struct radeon_state *r600_resource(struct r600_context *rctx, S_038000_DIM(r600_tex_dim(view->texture->target)) | - S_038000_PITCH((tmp->pitch[0] / 8) - 1) | + S_038000_PITCH(((tmp->pitch[0] / tmp->bpt) / 8) - 1) | S_038000_TEX_WIDTH(view->texture->width0 - 1); @@ -1038,5 +1068,5 @@ static struct radeon_state *r600_resource(struct r600_context *rctx, S_038010_REQUEST_SIZE(1) | - S_038010_DST_SEL_X(r600_tex_swizzle(view->swizzle_r)) | + S_038010_DST_SEL_X(r600_tex_swizzle(view->swizzle_b)) | S_038010_DST_SEL_Y(r600_tex_swizzle(view->swizzle_g)) | - S_038010_DST_SEL_Z(r600_tex_swizzle(view->swizzle_b)) | + S_038010_DST_SEL_Z(r600_tex_swizzle(view->swizzle_r)) | S_038010_DST_SEL_W(r600_tex_swizzle(view->swizzle_a)) | diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c index ab20e97948a..96173b0ed6e 100644 --- a/src/gallium/drivers/r600/r600_texture.c +++ b/src/gallium/drivers/r600/r600_texture.c @@ -61,4 +61,5 @@ static void r600_setup_miptree(struct r600_screen *rscreen, struct r600_resource struct pipe_resource *ptex = &rtex->resource.base.b; - unsigned long w, h, stride, size, layer_size, i, offset; + unsigned long w, h, pitch, size, layer_size, i, offset; + rtex->bpt = util_format_get_blocksize(ptex->format); for (i = 0, offset = 0; i <= ptex->last_level; i++) { @@ -66,4 +67,4 @@ static void r600_setup_miptree(struct r600_screen *rscreen, struct r600_resource h = u_minify(ptex->height0, i); - stride = align(util_format_get_stride(ptex->format, w), 32); - layer_size = stride * h; + pitch = util_format_get_stride(ptex->format, align(w, 64)); + layer_size = pitch * h; if (ptex->target == PIPE_TEXTURE_CUBE) @@ -74,7 +75,4 @@ static void r600_setup_miptree(struct r600_screen *rscreen, struct r600_resource rtex->layer_size[i] = layer_size; - rtex->pitch[i] = stride / util_format_get_blocksize(ptex->format); - rtex->pitch[i] += R600_TEXEL_PITCH_ALIGNMENT_MASK; - rtex->pitch[i] &= ~R600_TEXEL_PITCH_ALIGNMENT_MASK; - rtex->stride[i] = stride; - offset += align(size, 32); + rtex->pitch[i] = pitch; + offset += size; } @@ -185,7 +183,7 @@ struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen, resource->bo = bo; - rtex->stride_override = whandle->stride; - rtex->pitch[0] = whandle->stride / util_format_get_blocksize(templ->format); - rtex->stride[0] = whandle->stride; + rtex->pitch_override = whandle->stride; + rtex->bpt = util_format_get_blocksize(templ->format); + rtex->pitch[0] = whandle->stride; rtex->offset[0] = 0; - rtex->size = align(rtex->stride[0] * templ->height0, 32); + rtex->size = align(rtex->pitch[0] * templ->height0, 64); @@ -218,3 +216,3 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx, trans->transfer.box = *box; - trans->transfer.stride = rtex->stride[sr.level]; + trans->transfer.stride = rtex->pitch[sr.level]; trans->offset = r600_texture_get_offset(rtex, sr.level, box->z, sr.face); diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h index 593b95c9c71..c1acfcd29ea 100644 --- a/src/gallium/drivers/r600/r600d.h +++ b/src/gallium/drivers/r600/r600d.h @@ -318,2 +318,42 @@ #define C_028010_ZRANGE_PRECISION 0x7FFFFFFF +#define R_028814_PA_SU_SC_MODE_CNTL 0x028814 +#define S_028814_CULL_FRONT(x) (((x) & 0x1) << 0) +#define G_028814_CULL_FRONT(x) (((x) >> 0) & 0x1) +#define C_028814_CULL_FRONT 0xFFFFFFFE +#define S_028814_CULL_BACK(x) (((x) & 0x1) << 1) +#define G_028814_CULL_BACK(x) (((x) >> 1) & 0x1) +#define C_028814_CULL_BACK 0xFFFFFFFD +#define S_028814_FACE(x) (((x) & 0x1) << 2) +#define G_028814_FACE(x) (((x) >> 2) & 0x1) +#define C_028814_FACE 0xFFFFFFFB +#define S_028814_POLY_MODE(x) (((x) & 0x3) << 3) +#define G_028814_POLY_MODE(x) (((x) >> 3) & 0x3) +#define C_028814_POLY_MODE 0xFFFFFFE7 +#define S_028814_POLYMODE_FRONT_PTYPE(x) (((x) & 0x7) << 5) +#define G_028814_POLYMODE_FRONT_PTYPE(x) (((x) >> 5) & 0x7) +#define C_028814_POLYMODE_FRONT_PTYPE 0xFFFFFF1F +#define S_028814_POLYMODE_BACK_PTYPE(x) (((x) & 0x7) << 8) +#define G_028814_POLYMODE_BACK_PTYPE(x) (((x) >> 8) & 0x7) +#define C_028814_POLYMODE_BACK_PTYPE 0xFFFFF8FF +#define S_028814_POLY_OFFSET_FRONT_ENABLE(x) (((x) & 0x1) << 11) +#define G_028814_POLY_OFFSET_FRONT_ENABLE(x) (((x) >> 11) & 0x1) +#define C_028814_POLY_OFFSET_FRONT_ENABLE 0xFFFFF7FF +#define S_028814_POLY_OFFSET_BACK_ENABLE(x) (((x) & 0x1) << 12) +#define G_028814_POLY_OFFSET_BACK_ENABLE(x) (((x) >> 12) & 0x1) +#define C_028814_POLY_OFFSET_BACK_ENABLE 0xFFFFEFFF +#define S_028814_POLY_OFFSET_PARA_ENABLE(x) (((x) & 0x1) << 13) +#define G_028814_POLY_OFFSET_PARA_ENABLE(x) (((x) >> 13) & 0x1) +#define C_028814_POLY_OFFSET_PARA_ENABLE 0xFFFFDFFF +#define S_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((x) & 0x1) << 16) +#define G_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((x) >> 16) & 0x1) +#define C_028814_VTX_WINDOW_OFFSET_ENABLE 0xFFFEFFFF +#define S_028814_PROVOKING_VTX_LAST(x) (((x) & 0x1) << 19) +#define G_028814_PROVOKING_VTX_LAST(x) (((x) >> 19) & 0x1) +#define C_028814_PROVOKING_VTX_LAST 0xFFF7FFFF +#define S_028814_PERSP_CORR_DIS(x) (((x) & 0x1) << 20) +#define G_028814_PERSP_CORR_DIS(x) (((x) >> 20) & 0x1) +#define C_028814_PERSP_CORR_DIS 0xFFEFFFFF +#define S_028814_MULTI_PRIM_IB_ENA(x) (((x) & 0x1) << 21) +#define G_028814_MULTI_PRIM_IB_ENA(x) (((x) >> 21) & 0x1) +#define C_028814_MULTI_PRIM_IB_ENA 0xFFDFFFFF #define R_028000_DB_DEPTH_SIZE 0x028000 |