i965/fs: Allow LRPs with uniform registers.

Improves GLB2.7 performance on my HSW by 0.671455% +/- 0.225037% (n=62).

v2: Make is_valid_3src() a method of the fs_reg. (recommended by Ken)

Reviewed-by: Matt Turner <mattst88@gmail.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)

3 files changed, 11 insertions, 1 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index b45035e80f0..a8610eea92a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -441,12 +441,18 @@ fs_reg::is_one() const
    if (file != IMM)
       return false;
 
    return type == BRW_REGISTER_TYPE_F ? imm.f == 1.0 : imm.i == 1;
 }
 
+bool
+fs_reg::is_valid_3src() const
+{
+   return file == GRF || file == UNIFORM;
+}
+
 int
 fs_visitor::type_size(const struct glsl_type *type)
 {
    unsigned int size, i;
 
    switch (type->base_type) {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index efe90f4ae01..c9c9856748d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -90,12 +90,13 @@ public:
    fs_reg(enum register_file file, int reg, uint32_t type);
    fs_reg(class fs_visitor *v, const struct glsl_type *type);
 
    bool equals(const fs_reg &r) const;
    bool is_zero() const;
    bool is_one() const;
+   bool is_valid_3src() const;
 
    /** Register file: ARF, GRF, MRF, IMM. */
    enum register_file file;
    /**
     * Register number.  For ARF/MRF, it's the hardware register.  For
     * GRF, it's a virtual register number until register allocation
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index f1539d5c3a7..55ae6898866 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -198,13 +198,16 @@ fs_visitor::visit(ir_dereference_array *ir)
    this->result = src;
 }
 
 void
 fs_visitor::emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a)
 {
-   if (intel->gen < 6 || x.file != GRF || y.file != GRF || a.file != GRF) {
+   if (intel->gen < 6 ||
+       !x.is_valid_3src() ||
+       !y.is_valid_3src() ||
+       !a.is_valid_3src()) {
       /* We can't use the LRP instruction.  Emit x*(1-a) + y*a. */
       fs_reg y_times_a           = fs_reg(this, glsl_type::float_type);
       fs_reg one_minus_a         = fs_reg(this, glsl_type::float_type);
       fs_reg x_times_one_minus_a = fs_reg(this, glsl_type::float_type);
 
       emit(MUL(y_times_a, y, a));