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authorTom Stellard <thomas.stellard@amd.com>2012-04-19 11:47:08 -0400
committerTom Stellard <thomas.stellard@amd.com>2012-04-23 09:34:05 -0400
commit3c0f521cbfb551bf69cc14c606dcdd20c0529589 (patch)
tree41acaad276d0ac85714d70f1292c2364047cd5f0
parentb3863eb9a5a7a844f04acde5f15151c898ff3bac (diff)
r600g/llvm: Only emit an instruction's explicit operands
-rw-r--r--src/gallium/drivers/radeon/R600CodeEmitter.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/R600CodeEmitter.cpp b/src/gallium/drivers/radeon/R600CodeEmitter.cpp
index 4d9ca4fab12..2367713500c 100644
--- a/src/gallium/drivers/radeon/R600CodeEmitter.cpp
+++ b/src/gallium/drivers/radeon/R600CodeEmitter.cpp
@@ -285,7 +285,7 @@ bool R600CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
void R600CodeEmitter::emitALUInstr(MachineInstr &MI)
{
- unsigned numOperands = MI.getNumOperands();
+ unsigned numOperands = MI.getNumExplicitOperands();
/* Some instructions are just place holder instructions that represent
* operations that the GPU does automatically. They should be ignored. */
@@ -351,7 +351,7 @@ void R600CodeEmitter::emitSrc(const MachineOperand & MO)
emitTwoBytes(getHWReg(reg));
if (reg == AMDIL::ALU_LITERAL_X) {
const MachineInstr * parent = MO.getParent();
- unsigned immOpIndex = parent->getNumOperands() - 1;
+ unsigned immOpIndex = parent->getNumExplicitOperands() - 1;
MachineOperand immOp = parent->getOperand(immOpIndex);
if (immOp.isFPImm()) {
value = immOp.getFPImm()->getValueAPF().bitcastToAPInt().getZExtValue();